International Rrectifier IR2117, IR2118 User Manual

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Preliminary Data Sheet No. PD60146-L

IR2117/IR2118 (S)

SINGLE CHANNEL DRIVER

Features

Floating channel designed for bootstrap operation

•

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V

•

Undervoltage lockout

•

CMOS Schmitt-triggered inputs with pull-down

•

• Output in phase with input (IR2117) or out of

phase with input (IR2118)

Description

The IR2117/IR2118(S) is a high voltage, high speed
power MOSFET and IGBT driver. Proprietary HVIC
and latch immune CMOS technologies enable rug­gedized monolithic construction. The logic input is
compatible with standard CMOS outputs. The out­put driver features a high pulse current buffer stage
designed for minimum cross-conduction. The float­ing channel can be used to drive an N-channel power
MOSFET or IGBT in the high or low side configura­tion which operates up to 600 volts.

Typical Connection

V

CC

IN

V

CC

COM

V

B

HOIN

V

S

Product Summary

V

OFFSET

I

O

V

t

on/off

Packages

8-Lead PDIP

IR2117/IR2118

up to 600V

TO

LOAD

600V max.

+/- 200 mA / 420 mA

OUT

10 - 20V

(typ.) 125 & 105 ns

8-Lead SOIC

IR2117S/IR2118S

IR2117

up to 600V

(Refer to Lead Assignments for correct pin configuration).
This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for
proper circuit board layout.

V

CC

IN

V

CC

COM

V

B

HOIN

V

S

TO

LOAD

IR2118

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IR2117/IR2118 (S)

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 5 through 8.

Symbol Definition Min. Max. Units

V

B

V

S

V

HO

V

CC

V

IN

dVs/dt Allowable offset supply voltage transient (figure 2) — 50 V/ns

P

D

Rth

JA

T

J

T

S

T

L

High side floating supply voltage -0.3 625
High side floating supply offset voltage VB - 25 VB + 0.3
High side floating output voltage VS - 0.3 V
Logic supply voltage -0.3 25
Logic input voltage -0.3 V

Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0

(8 lead SOIC) — 0.625

Thermal resistance, junction to ambient (8 lead PDIP) — 125

(8 lead SOIC) — 200
Junction temperature — 150
Storage temperature -55 150
Lead temperature (soldering, 10 seconds) — 300

B

CC

+ 0.3

+ 0.3

W

°C/W

°C

V

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V

Symbol Definition Min. Max. Units

V

B

V

S

V

HO

V

CC

V

IN

T

A

Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).

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High side floating supply absolute voltage VS + 10 VS + 20
High side floating supply offset voltage Note 1 600
High side floating output voltage V
Logic supply voltage 10 20
Logic input voltage 0 V
Ambient temperature -40 125 °C

offset rating is tested with all supplies biased at 15V differential.

S

S

V

CC

B

V

IR2117/IR2118 (S)

Dynamic Electrical Characteristics

V

(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics

BIAS

are measured using the test circuit shown in Figure 3.

Symbol Definition Min. Typ. Max. Units Test Conditions

t

on

t

off

t
t

Static Electrical Characteristics

V

(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to

BIAS

COM. The V

Symbol Definition Min. Typ. Max. Units Test Conditions

V
V

V

OH

V

OL

I

LK

I

QBS

I

QCC

I

IN+

I

IN-

V

BSUV+VBS

V

BSUV-

V

CCUV+VCC

V

CCUV-

I

O+

I

O-

Turn-on propagation delay — 125 200 VS = 0V
Turn-off propagation delay — 105 180 VS = 600V
Turn-on rise time — 80 130

r

Turn-off fall time — 40 65

f

and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.

O

input voltage - logic “1” (IR2117) logic “0” (IR2118) 9.5 — —

IH

Input voltage - logic “0” (IR2117) logic “1” (IR2118) — — 6.0

IL

High level output voltage, V
Low level output voltage, V
Offset supply leakage current — — 50 VB = VS = 600V
Quiescent VBS supply current — 50 240 V
Quiescent VCC Supply Current — 70 340 VIN = 0V or V
Logic “1” input bias current (IR2117) VIN = V

(IR2118) VIN = 0V

Logic “0” input bias current (IR2117) VIN = 0V

(IR2118) VIN = V

supply undervoltage positive going threshold 7.6 8.6 9.6

VBS supply undervoltage negative going threshold 7.2 8.2 9.2

supply undervoltage positive going threshold 7.6 8.6 9.6

V

supply undervoltage negative going threshold 7.2 8.2 9.2

CC

Output high short circuit pulsed current 200 250 — VO = 0V

Output low short circuit pulsed current 420 500 — VO = 15V

BIAS

O

- V

O

— — 100 IO = 0A
— — 100 IO = 0A

— 20 40

— — 1.0

ns

V

mV

µA

V

mA

= 0V or V

IN

= Logic “1”

V

IN

PW ≤ 10 µs

= Logic “0”

V

IN

PW ≤ 10 µs

CC
CC

CC

CC

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