International Rrectifier IR2110L6 User Manual

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Data Sheet No. PD-6.074

IR2110L6

HIGH AND LOW SIDE DRIVER

Features

n Floating channel designed for bootstrap operation

Fully operational to +600V
Tolerant to negative tr ansient voltage
dV/dt immune

n Gate drive supply range from 10 to 20V
n Undervoltage lockout for both channels

Product Summary

V

OFFSET

IO+/- 2A / 2A

V

OUT

t

Delay Matching 10 ns

(typ.) 120 & 94 ns

on/off

600V max.

10 - 20V

n Separate logic supply range from 5 to 20V

Logic and power ground ±5V offset

n CMOS Schmitt-triggered inputs with pull-down
n Cycle by cycle edge-triggered shutdown logic
n Matched propagation delay for both channels

n Outputs in phase with inputs

Description

The IR2110L6 is a high voltage, high speed power
MOSFET and IGBT driver with independent high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge­dized monolithic construction. Logic inputs are com­patible with standard CMOS or LSTTL outputs. The
output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. Propa­gation delays are matched to simplify use in high fre­quency applications. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute volt­ages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions.

Parameter Min. Max. Units

V

B

V

S

V

HO

V

CC

V

LO

V

DD

V

SS

V

IN

dVs/dt Allowab le Offset Supply V oltage Transient (Figure 2) — 50 V/ns

P

D

R

θJA

T

J

T

S

T

L

High Side Floating Supply Voltage -0.5 VS + 20
High Side Floating Supply Offset Voltage — 600
High Side Floating Output Voltage VS - 0.5 V
Low Side Fixed Supply Voltage -0.5 20
Low Side Output Voltage -0.5 VCC + 0.5 V
Logic Supply Voltage -0.5 VSS + 20
Logic Supply Offset Voltage VCC - 20 V
Logic Input Voltage (HIN, LIN & SD) VSS - 0.5 V

Pac kage P ow er Dissipation @ TA ≤ +25°C — 1.6 W
Thermal Resistance, Junction to Ambient — 75 °C/W
Junction T emperature -55 12 5
Storage T emperature -55 150 °C
Lead Temperature (Soldering, 10 seconds) — 300
Weight 1.5 (typical) g

CC
DD

B

+ 0.5

+ 0.5
+ 0.5

IR2110L6

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in Figures 36 and 37.

Parameter Min. Max. Units

V

B

V

S

V

HO

V

CC

V

LO

V

DD

V

SS

V

IN

Dynamic Electrical Characteristics

V

(VCC, VBS, VDD) = 15V , and VSS = COM unless otherwise specified. The dynamic electrical characteristics are

BIAS

measured using the test circuit shown in Figure 3.

t

on

t

off

t

sd

t

r

t

f

MT Delay Matching, HS & LS Turn-On/Off — — 10 — — |

High Side Floating Supply Absolute Voltage VS + 10 VS + 20
High Side Floating Supply Offset Voltage -4 600
High Side Floating Output Voltage V

S

V

B

Low Side Fixed Supply Voltage 10 20 V
Low Side Output Voltage 0 V

CC

Logic Supply Voltage VSS + 5 VSS + 20
Logic Supply Offset Voltage -5 5
Logic Input Voltage (HIN, LIN & SD) V

SS

V

DD

Tj = 25°C Tj =

-55 to 125°C

Parameter Min. T yp. Max. Min. Max. Units Test Conditions

T urn-On Propagation Delay — 120 150 — 260 VS = 0V
Turn-Off Propagation Delay — 94 12 5 — 220 VS = 600V
Shutdown Propagation Delay — 11 0 140 — 235 VS = 600V
Turn-On Rise Time — 2535—50 CL = 1000pf
T urn-Off F all Time — 17 25 — 40 CL = 1000pf

ns

H

t

on

- Lt

H

| / |

t

on

off

- Lt

|

off

T ypical Connection

V

DD

HIN

SD
LIN

V

SS

V

CC

V
HIN
SD
LIN
V

600V

up to 500V

HO

V

COM

LO

V

B

V

S

CC

TO

LOAD

DD

SS

IR2110L6

Static Electrical Characteristics

V

(VCC, VBS, VDD) = 15V, unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are

BIAS

applicable to all three logic input pins: HIN, LIN and SD. The VO and IO parameters are referenced to COM or VS and are
applicable to the respective output pins: HO or LO.

Tj = 25°C Tj =

-55 to 125°C

Parameter Min. T yp. Max. Min. Max. Units Test Conditions

V

V

V
V

I

LK

I

QBS

I

QCC

I

QDD

I

IN+

I

IN-

V

BSUV+VBS

V

BSUV-VBS

V

CCUV+VCC

V

CCUV-VCC

I

O+

I

Logic “1” Input Voltage 3.1 — — 3.3 — VDD = 5V

IH

6.4 — — 6.8 — V

9.5 — — 10 —

V

12.5 — — 13.3 — VDD = 20V

Logic “0” Input V oltage — — 1.8 — 1.7 VDD = 5V

IL

— — 3.8 — 3.6 V
— — 6 — 5.7

V

— — 8.3 — 7.9 VDD = 20V

High Level Output Voltage , V

OH

Low Level Output Voltage, V

OL

- VO— 0.7 1.2 — 1.5 V

BIAS
O

— — 0.1 — 0.1 V
Offset Supply Leakage Current — — 50 — 250 VB = VS = 600V
Quiescent VBS Supply Current — 125 230 — 500 µA V
Quiescent VCC Supply Current — 180 340 — 600 V
Quiescent VDD Supply Current — 5 30 — 60 V
Logic “1” Input Bias Current — 15 40 — 70 VIN = V
Logic “0” Input Bias Current — — 1.0 — 10 V

Supply Undervoltage P ositive 7.5 8.6 9.7 — —

Going Threshold

Supply Undervoltage Negative 7.0 8.2 9.4 — —

Going Threshold

Supply Undervoltage Positiv e 7.4 8.5 9.6 — — V

Going Threshold

Supply Undervoltage Negative 7.0 8.2 9.4 — —
Going Threshold
Output High Short Circuit Pulsed 2.0 — — — — VO = 0V, VIN = V
Current APW ≤ 10 µs
Output Low Short Circuit Pulsed 2.0 — — — — VO = 15V, VIN = 0V

O-

Current PW ≤ 10 µs

= 10V

DD

VDD = 15V

= 10V

DD

VDD = 15V

IN =VIH, IO
IN =VIH, IO

=0V or V

IN

=0V, or V

IN

=0V, or V

IN

= 0V

IN

= 0A
= 0A

DD
DD
DD

DD

DD

IR2110L6

Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient T est Circuit

HV = 10 to 600V

50%

t

off

90% 90%

t

f

(0 to 600V)

HIN
LIN

50%

t

on

t

r

HO
LO

Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition

HIN
LIN

SD

50%

t

sd

HO

90%

LO

Figure 5. Shutdown Waveform Definitions

Figure 6. Delay Matching Waveform Definitions

10% 10%

50% 50%

LO

MT

HO

10%

MT

90%

HOLO

IR2110L6

s)

T

s)

s)

T

s)

S

s)

S

s)

250

200

150

Max.

Typ.

100

urn-On Delay Time (n

50

0

-50 -25 0 25 50 75 100 125
Temperature (°C)

250

200

Max.

Typ.

150

100

Turn-On Delay Time (n

50

0

10 12 14 16 18 20

V

Supply Voltage (V)

BIAS

Figure 7A. T urn-On Time vs. Temperature Figure 7B. Turn-On Time vs. V oltage

250

200

150

Max.

100

Typ.

Turn-Off Delay Time (n

50

250

200

Max.

150

Typ.

100

urn-Off Delay Time (n

50

0

-50 -25 0 25 50 75 100 125
Temperature (°C)

0

10 12 14 16 18 20

V

Supply Voltage (V)

BIAS

Figure 8A. Turn-Off Time vs. T emperature Figure 8B. Turn-Off Time vs. V oltage

250

200

150

Max.

100

Typ.

hutdown Delay Time (n

50

0

-50 -25 0 25 50 75 100 125
Temperature (°C)

Figure 9A. Shutdown Time vs. Temperature

250

200

Max.

150

Typ.

100

hutdown Delay time (n

50

0

10 12 14 16 18 20

V

Supply Voltage (V)

BIAS

Figure 9B. Shutdown Time vs . Voltag e