International Rrectifier IR2104-S User Manual

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Data Sheet No. PD60046-P

IR2104

(S)

HALF-BRIDGE DRIVER

Features

Floating channel designed for bootstrap operation

•

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V

•

Undervoltage lockout

•

3.3V , 5V and 15V input logic compatib le

•

Cross-conduction prevention logic

•

Internally set deadtime

•

High side output in phase with input

•

Shut down input turns off both channels

•

Matched propagation delay for both channels

•

Description

The IR2104(s) are high voltage, high speed power
MOSFET and IGBT drivers with dependent high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge­dized monolithic construction. The logic input is com­patible with standard CMOS or LSTTL output, down to

3.3V logic. The output driv ers feature a high pulse cur­rent buffer stage designed f or minimum driver cross-conduction. The floating channel can be used to drive an N­channel power MOSFET or IGBT in the high side configuration which operates from 10 to 600 volts.

Product Summary

V

OFFSET

+/ - 130 mA / 270 mA

I

O

V

OUT

t

(typ.) 680 & 150 ns

on/off

Deadtime (typ.) 520 ns

600V max.

10 - 20V

Packages

8 Lead SOIC

IR2104S

8 Lead PDIP

IR2104

T ypical Connection

up to 600V

V

CC

V

CC

IN

SD

(Refer to Lead Assignment for correct pin configuration) This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

IN
SD

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V

HO

V

LOCOM

B

TO

S

LOAD

IR2104

(S)

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.

Symbol Definition Min. Max. Units

V

B

V

S

V

HO

V

CC

V

LO

V

IN

dVs/dt Allowable offset supply voltage transient — 50 V/ns

P

D

Rth

JA

T

J

T

S

T

L

High side floating absolute voltage -0.3 625
High side floating supply offset voltage VB - 25 VB + 0.3
High side floating output voltage VS - 0.3 V
Low side and logic fixed supply voltage -0.3 25
Low side output voltage -0.3 VCC + 0.3
Logic input voltage (IN & SD) -0.3 V

Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0

(8 lead SOIC) — 0.625

Thermal resistance, junction to ambient (8 lead PDIP) — 125

(8 lead SOIC) — 200
Junction temperature — 150
Storage temperature - 55 150
Lead temperature (soldering, 10 seconds) — 300

CC

B

+ 0.3

+ 0.3

V

W

°C/W

°C

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.

Symbol Definition Min. Max. Units

V

B

V

S

V

HO

V

CC

V

LO

V

IN

T

A

Note 1: Logic operational f or VS of -5 to +600V. Logic state held f or VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).

2

High side floating supply absolute voltage VS + 10 VS + 20
High side floating supply offset voltage Note 1 600
High side floating output voltage V
Low side and logic fixed supply voltage 10 20
Low side output voltage 0 V
Logic input voltage (IN & SD)0V

Ambient temperature -40 125

S

V

B

CC

CC

°C

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V

IR2104

(S)

Dynamic Electrical Characteristics

V

(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.

BIAS

Symbol Definition Min. Typ. Max. Units Test Conditions

t

on

t

off

t

sd
t

t

DT Deadtime, LS turn-off to HS turn-on & 400 520 650

MT Delay matching, HS & LS turn-on/off ——60

Turn-on propagation delay — 680 820 VS = 0V
Turn-off propagation delay — 150 220 VS = 600V
Shutdown propagation delay — 160 220
Turn-on rise time — 100 170

r

Turn-off fall time — 50 90

f

HS turn-on to LS turn-off

ns

Static Electrical Characteristics

V

(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to

BIAS

COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.

Symbol Definition Min. Typ. Max. Units Test Conditions

V

SD,TH+

V

SD,TH-

V
V

I

QBS

I

QCC

I

V

CCUV+

V

CCUV-

I

V
V

I

I

I

IH

OH
OL

LK

IN+

IN-

O+

O-

Logic “1” (HO) & Logic “0” (LO) input voltage 3 —— VCC = 10V to 20V
Logic “0” (HO) & Logic “1” (LO) input voltage ——0.8 VCC = 10V to 20V

IL

SD input positive going threshold 3 —— VCC = 10V to 20V
SD input negative going threshold ——0.8 VCC = 10V to 20V
High level output voltage, V
Low level output voltage, V
Offset supply leakage current ——50 VB = VS = 600V
Quiescent VBS supply current — 30 55 V
Quiescent VCC supply current — 150 270 VIN = 0V or 5V
Logic “1” input bias current — 310 VIN = 5V
Logic “0” input bias current ——1V
VCC supply undervoltage positive going 8 8.9 9.8

threshold
VCC supply undervoltage negative going 7.4 8.2 9
threshold
Output high short circuit pulsed current 130 210 — VO = 0V

Output low short circuit pulsed current 270 360 — VO = 15V

BIAS

O

- V

O

——100 IO = 0A
——100 IO = 0A

V

mV

µA

V

mA

IN

PW ≤ 10 µs

PW ≤ 10 µs

= 0V or 5V

= 0V

IN

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3

IR2104

(S)

Functional Block Diagram

V

B

HV

DEAD

TIME

IN

UV

DETECT

PULSE

GEN

LEVEL

SHIFT

PULSE

FILTER

Q

R
S

Vcc

SD

DEAD

TIME

Lead Definitions

Symbol Description

IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO

SD

V

B

HO High side gate drive output
V

S

V

CC

LO Low side gate drive output
COM Low side return

Logic input for shutdown
High side floating supply

High side floating supply return
Low side and logic fixed supply

HO

V

S

V

LO

COM

CC

Lead Assignments

1

V

CC

2

IN

3

SD

4

COM

8 Lead PDIP 8 Lead SOIC

IR2104 IR2104S

4

V

HO

V
LO

V

8

B

7
6

S

5

1

CC

IN

2

SD

3

COM

4

V

HO

V
LO

8

B

7
6

S

5

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