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Data Sheet No. PD60043-N
IR2101
IR2102
(S)
(S)
HIGH AND LOW SIDE DRIVER
Features
• Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout
• 3.3V, 5V, and 15V logic input compatible
• Matched propagation delay for both channels
• Outputs in phase with inputs (IR2101) or out of
phase with inputs (IR2102)
Description
The IR2101(S)/IR2102(S) are high voltage, high
speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS
technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The
output drivers feature a high pulse current buffer
stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Product Summary
V
OFFSET
+/- 130 mA / 270 mA
I
O
V
OUT
t
(typ.) 160 & 150 ns
on/off
Delay Matching 50 ns
600V max.
10 - 20V
Packages
8 Lead SOIC
8 Lead PDIP
Typical Connection
up to 600V
V
CC
HIN
LIN
(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
V
HIN
LIN
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CC
IR2101
HO
LOCOM
V
B
V
HIN
LIN
TO
LOAD
up to 600V
V
CC
HO
LOCOM
B
V
S
TO
LOAD
V
S
V
CC
HIN
LIN
IR2102
IR2101/IR2102
(S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dVS/dt Allowable offset supply voltage transient — 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
High side floating supply voltage -0.3 625
High side floating supply offset voltage VB - 25 VB + 0.3
CC
B
+ 0.3
+ 0.3
High side floating output voltage VS - 0.3 V
Low side and logic fixed supply voltage -0.3 25
Low side output voltage -0.3 VCC + 0.3
Logic input voltage (HIN & LIN) -0.3 V
Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
(8 lead SOIC) — 0.625
Thermal resistance, junction to ambient (8 lead PDIP) — 125
(8 lead SOIC) — 200
Junction temperature — 150
Storage temperature -55 150
Lead temperature (soldering, 10 seconds) — 300
V
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
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High side floating supply absolute voltage VS + 10 VS + 20
High side floating supply offset voltage Note 1 600
High side floating output voltage V
Low side and logic fixed supply voltage 10 20
Low side output voltage 0 V
Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102) 0 V
Ambient temperature -40 125
S
V
B
CC
CC
V
°C
IR2101/IR2102
(S)
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
BIAS
Symbol Definition Min. T yp. Max. Units T est Conditions
t
on
t
off
t
t
MT Delay matching, HS & LS turn-on/off — — 50
Turn-on propagation delay — 160 220 VS = 0V
Turn-off propagation delay — 150 220 VS = 600V
Turn-on rise time — 100 170
r
Turn-off fall time — 50 90
f
ns
Static Electrical Characteristics
V
(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
BIAS
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol Definition Min. T yp. Max. Units Test Conditions
V
V
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+VCC
V
CCUV-
I
O+
I
O-
Logic “1” input voltage (IR2101)
IH
Logic “0” input voltage (IR2102)
Logic “0” input voltage (IR2101)
IL
Logic “1”input voltage (IR2102)
High level output voltage, V
Low level output voltage, V
Offset supply leakage current — — 50 VB = VS = 600V
Quiescent VBS supply current — 30 55 V
Quiescent VCC supply current — 150 270 VIN = 0V or 5V
Logic “1” input bias current
Logic “0” input bias current
supply undervoltage positive going 8 8.9 9.8
threshold
VCC supply undervoltage negative going 7.4 8.2 9
threshold
Output high short circuit pulsed current 130 210 — VO = 0V
Output low short circuit pulsed current 270 360 — VO = 15V
BIAS
O
- V
O
3
—
— — 100 IO = 0A
— — 100 IO = 0A
—
—
—
—
3
—
VCC = 10V to 20V
—
V
VCC = 10V to 20V
0.8
mV
10
µA
1
V
mA
= 0V or 5V
IN
VIN = 5V (IR2101)
VIN = 0V (IR2102)
VIN = 0V (IR2101)
VIN = 5V (IR2102)
V
= Logic “1”
IN
PW ≤ 10 µs
V
= Logic “0”
IN
PW ≤ 10 µs
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