查询IR2101S供应商
Data Sheet No. PD60043-N
IR2101
IR2102
(S)
(S)
HIGH AND LOW SIDE DRIVER
Features
• Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout
• 3.3V, 5V, and 15V logic input compatible
• Matched propagation delay for both channels
• Outputs in phase with inputs (IR2101) or out of
phase with inputs (IR2102)
Description
The IR2101(S)/IR2102(S) are high voltage, high
speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS
technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The
output drivers feature a high pulse current buffer
stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Product Summary
V
OFFSET
+/- 130 mA / 270 mA
I
O
V
OUT
t
(typ.) 160 & 150 ns
on/off
Delay Matching 50 ns
600V max.
10 - 20V
Packages
8 Lead SOIC
8 Lead PDIP
Typical Connection
up to 600V
V
CC
HIN
LIN
(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
V
HIN
LIN
www.irf.com 1
CC
IR2101
HO
LOCOM
V
B
V
HIN
LIN
TO
LOAD
up to 600V
V
CC
HO
LOCOM
B
V
S
TO
LOAD
V
S
V
CC
HIN
LIN
IR2102
IR2101/IR2102
(S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dVS/dt Allowable offset supply voltage transient — 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
High side floating supply voltage -0.3 625
High side floating supply offset voltage VB - 25 VB + 0.3
CC
B
+ 0.3
+ 0.3
High side floating output voltage VS - 0.3 V
Low side and logic fixed supply voltage -0.3 25
Low side output voltage -0.3 VCC + 0.3
Logic input voltage (HIN & LIN) -0.3 V
Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
(8 lead SOIC) — 0.625
Thermal resistance, junction to ambient (8 lead PDIP) — 125
(8 lead SOIC) — 200
Junction temperature — 150
Storage temperature -55 150
Lead temperature (soldering, 10 seconds) — 300
V
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2 www.irf.com
High side floating supply absolute voltage VS + 10 VS + 20
High side floating supply offset voltage Note 1 600
High side floating output voltage V
Low side and logic fixed supply voltage 10 20
Low side output voltage 0 V
Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102) 0 V
Ambient temperature -40 125
S
V
B
CC
CC
V
°C
IR2101/IR2102
(S)
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
BIAS
Symbol Definition Min. T yp. Max. Units T est Conditions
t
on
t
off
t
t
MT Delay matching, HS & LS turn-on/off — — 50
Turn-on propagation delay — 160 220 VS = 0V
Turn-off propagation delay — 150 220 VS = 600V
Turn-on rise time — 100 170
r
Turn-off fall time — 50 90
f
ns
Static Electrical Characteristics
V
(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
BIAS
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol Definition Min. T yp. Max. Units Test Conditions
V
V
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+VCC
V
CCUV-
I
O+
I
O-
Logic “1” input voltage (IR2101)
IH
Logic “0” input voltage (IR2102)
Logic “0” input voltage (IR2101)
IL
Logic “1”input voltage (IR2102)
High level output voltage, V
Low level output voltage, V
Offset supply leakage current — — 50 VB = VS = 600V
Quiescent VBS supply current — 30 55 V
Quiescent VCC supply current — 150 270 VIN = 0V or 5V
Logic “1” input bias current
Logic “0” input bias current
supply undervoltage positive going 8 8.9 9.8
threshold
VCC supply undervoltage negative going 7.4 8.2 9
threshold
Output high short circuit pulsed current 130 210 — VO = 0V
Output low short circuit pulsed current 270 360 — VO = 15V
BIAS
O
- V
O
3
—
— — 100 IO = 0A
— — 100 IO = 0A
—
—
—
—
3
—
VCC = 10V to 20V
—
V
VCC = 10V to 20V
0.8
mV
10
µA
1
V
mA
= 0V or 5V
IN
VIN = 5V (IR2101)
VIN = 0V (IR2102)
VIN = 0V (IR2101)
VIN = 5V (IR2102)
V
= Logic “1”
IN
PW ≤ 10 µs
V
= Logic “0”
IN
PW ≤ 10 µs
www.irf.com 3
IR2101/IR2102
(S)
Functional Block Diagram
V
B
HIN
LIN
HIN
Vcc
Vcc
UV
DETECT
UV
DETECT
PULSE
GEN
IR2101
PULSE
GEN
HV
LEVEL
SHIFT
HV
LEVEL
SHIFT
PULSE
FILTER
PULSE
FILTER
Q
R
S
Q
R
S
HO
V
V
LO
COM
V
B
HO
V
S
V
S
CC
CC
LIN
LO
COM
IR2102
4 www.irf.com
IR2101/IR2102
Lead Definitions
Symbol Description
HIN Logic input for high side gate driver output (HO), in phase (IR2101)
HIN Logic input for high side gate driver output (HO), out of phase (IR2102)
LIN Logic input for low side gate driver output (LO), in phase (IR2101)
LIN Logic input for low side gate driver output (LO), out of phase (IR2102)
V
B
HO High side gate drive output
V
S
V
CC
LO Low side gate drive output
COM Low side return
Lead Assignments
High side floating supply
High side floating supply return
Low side and logic fixed supply
(S)
8 Lead PDIP 8 Lead SOIC
IR2101 IR2101S
8 Lead PDIP 8 Lead SOIC
IR2102 IR2102S
www.irf.com 5
IR2101/IR2102
HIN
LIN
(S)
HIN
LIN
50%
50%
HIN
LIN
HO
LO
Figure 1. Input/Output Timing Diagram
HIN
LIN
HIN
LIN
50%
50%
LO
50%
50%
HO
HIN
50%
50%
LIN
t
on
t
r
90% 90%
t
off
t
f
HO
LO
Figure 2. Switching Time Waveform Definitions
10% 10%
10%
MT
90%
MT
HOLO
Figure 3. Delay Matching Waveform Definitions
6 www.irf.com
IR2101/IR2102
y
(
(S)
500
400
300
200
Max
.
500
400
300
200
Max
.
Typ.
100
T urn-On Del ay Time (ns)
Typ.
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
100
Turn-On Delay Time (ns)
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 6A. Turn-On Time vs Temperature Figure 6B. Turn-On Time vs Supply Voltage
500
ns
400
300
Time
200
100
0
Turn-On Dela
02468101214161820
Input Voltage (V)
500
400
300
Max.
200
100
Turn-Off Delay T ime (ns)
Typ.
0
-50 -25 0 2 5 50 75 100 125
T emperature (°C)
Figure 6C. Turn-On Time vs Input Voltage
500
400
Max.
300
200
Typ.
100
Turn-Off Delay T ime (ns)
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 7B. Turn-Off Time vs Supply Voltage
Figure 7A. Turn-Off Time vs Temperature
500
400
300
200
100
Turn-Off Delay Time (ns
0
0 2 4 6 8 101214161820
Max.
Typ
.
Input Voltage (V)
Figure 7C. Turn-Off Time vs Input Voltage
www.irf.com 7
IR2101/IR2102
(S)
500
400
300
200
Max
.
100
Turn-On Rise T ime (ns)
Typ.
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
500
400
300
Max.
200
100
Turn-On Rise T ime (ns)
Typ.
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 9A. Turn-On Rise Time vs Temperature Figure 9B. Turn-On Rise Time vs Voltage
200
150
100
Max
.
50
Typ.
Turn-Off Fall T ime (ns)
0
-50-25 0 25 50 75100125
T emperature (°C)
200
150
Max.
100
50
Typ.
Turn-Off Fall T ime (ns)
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 10A. Turn-Off Fall Time vs Temperature
8
7
6
5
4
Min.
3
2
Input V oltage ( V )
1
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
Figure 12A. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Temperature
Figure 10B. Turn-Off Fall Time vs Voltage
8
7
6
5
4
Min.
3
2
Input V oltage (V )
1
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 12B. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Voltage
8 www.irf.com
IR2101/IR2102
(S)
4
3.2
2.4
1.6
Max
Input V olta g e (V )
0.8
.
0
-50-250 255075100125
T emperature (°C) Vcc Supply Voltage (V)
Figure 13A. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Temperature
1
0.8
0.6
0.4
Max.
0.2
High Level Output Voltage (V)
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
4
3.2
2.4
1.6
.
Max
Input V olta g e (V )
0.8
0
10 12 14 16 18 20
Figure 13B. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Voltage
1
0.8
0.6
0.4
M ax.
0.2
High Level Output Voltage (V)
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 14A. High Level Output
Figure 14B. High Level Output vs Voltage
vs Temperature
1
0.8
0.6
0.4
0.2
Max.
Low Level Output Voltage (V)
0
-50-250 255075100125
T emperature (°C)
Figure 15A. Low Level Output
1
0.8
0.6
0.4
0.2
M ax.
Low Level Output Voltage (V)
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 15B. Low level Output vs Voltage
vs Temperature
www.irf.com 9
IR2101/IR2102
(S)
500
400
300
200
100
Max.
0
-50 -25 0 25 50 75 100 125
Offset Supply Leakage Current (µA)
T emperature (°C)
Figure 16A. Offset Supply Current
vs Temperature
150
120
90
60
Max.
30
VBS Supply Current (µA)
Typ.
0
-50 -25 0 2 5 50 75 100 125
T emperature (°C)
500
400
300
200
100
Max .
0
0 100 200 300 400 500 600
Offset Supply Leakage Current (µA)
VB Boost Voltage (V)
Figure 16B. Offset Supply Current
vs Voltage
150
120
90
60
Max.
30
VBS Supply Current (µA)
Ty p.
0
10 12 14 16 18 20
VBS Floating Supply Voltage (V)
Figure 17A. V
BS Supply Current
vs Temperature
700
600
500
400
Max.
300
200
Vcc Supply Current (µA)
100
Typ.
0
-50-250 255075100125
T emperature (°C)
Figure 18A. Vcc Supply Current
vs Temperature
Figure 17B. V
700
600
500
400
300
Max.
200
Vcc Supply Current (µA)
100
Typ.
0
10 12 14 16 18 20
Figure 18B. Vcc Supply Current
BS Supply Current
vs Voltage
Vcc Supply Voltage (V)
vs Voltage
10 www.irf.com
IR2101/IR2102
(S)
30
25
20
15
10
Max.
5
Logic 1” Input Current (µA)
Typ.
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
Figure 19A. Logic"1" Input Current
vs Temperature
5
4
3
2
Max.
1
Logic “0” Input Current (µA)
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
30
25
20
15
10
Max.
5
Typ.
Logic 1” Input Current (µA)
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 19B. Logic"1" Input Current
vs Voltage
5
4
3
2
Max.
1
Logic "0" Input Current (uA)
0
10 12 14 16 18 20
VCC Supply Voltage (V)
Figure 20A. Logic "0" Input Current
vs Temperature
11
Max.
10
Typ.
9
Min.
8
7
VCC UVLO Threshold +(V)
6
-50 -25 0 25 50 75 100 125
T emperature (°C)
Figure 21A. Vcc Undervoltage Threshold(+)
vs Temperature
Figure 20B. Logic "0" Input Current
vs Voltage
11
10
Max.
9
Typ.
8
7
Min.
VCC UVLO Threshold - (V)
6
-50 -25 0 25 50 75 100 125
T emperature (°C)
Figure 21B. Vcc Undervoltage Threshold(-)
vs Temperature
www.irf.com 11
IR2101/IR2102
(S)
500
400
Typ.
300
200
100
Min.
Output Source Current (mA)
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
Figure 22A. Output Source Current
vs Temperature
700
600
Typ.
500
400
300
Min.
200
100
Output Sink Current (mA)
0
-50 -25 0 25 50 75 100 125
T emperature (°C)
500
400
300
200
Typ.
100
Output Source Current (mA)
Min.
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 22B. Output Source Current
vs Voltage
700
600
500
400
Typ.
300
200
Min.
100
Output Sink Current (mA)
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 23A. Output Sink Current
vs Temperature
Figure 23B. Output Sink Current
vs Voltage
12 www.irf.com
Case outlines
IR2101/IR2102
(S)
A
E
D B
5
87
6
6X
0.25 [ . 010 ]
65
H
4312
0.25 [.010] A
e
8X b
e1
A1
A
CAB
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONT ROLLING DIMENSION: MILLIMETER
3. D IMENSIONS ARE SHOWN I N MILLI METERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUT LINE MS-012AA.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
C
0.10 [ . 004 ]
8 Lead PDIP
6.46 [.2 55]
3X 1.27 [.05 0]
FOOTPRINT
8X 0.72 [.02 8]
8X 1.78 [.07 0]
01-3003 01
DIM
MIN MAX
.0532
A
A1
b
c .0075 .0098 0.19 0.25
D
E
e
e1
H
K
L
y
.0688
.0040
.0098
.020
.013
.1968
.189
.1574
.1497
.050 BASIC
.025 BASIC 0.635 BASIC
.2284
.2440
.0099
.0196
.016
.050
8°
0°
01-6014
(MS-001AB)
MILLIMETERSINC H E S
MIN MAX
1.35
1.75
0.10
0.25
0.33
0.51
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
K x 45°
y
8X L
8X c
7
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSI ON IS THE LENGTH OF LEAD FOR SOLDERING TO
8 Lead SOIC
A SUBSTRATE.
01-0021 11
01-6027
(MS-012AA)
Data and specifications subject to change without notice. 4/18/2003
www.irf.com 13
Loading...