HIGH SPEED, 100V, SELF OSCILLATING 50% DUTY CYCLE,
Data Sheet No. PD60206_B
IR2085S
HALF-BRIDGE DRIVER
Features
Simple primary side control solution to enable half-bridge
•
DC-Bus Converters for 48V distributed systems with reduced
component count and board space.
Integrated 50% duty cycle oscillator & half-bridge driver IC in a
•
single SO-8 package
Programmable switching frequency with up to 500kHz max per
•
channel
+/- 1A drive current capability optimized for low charge MOSFETs
•
Adjustable dead-time 50nsec – 200nsec
•
Floating channel designed for bootstrap operation up to +100Vdc
•
High and low side pulse width matching to +/- 25nsec
•
Adjustable overcurrent protection
•
Undervoltage lockout and internal soft start
•
Product Summary
V
V
High/low side
output freq (f
Output Current (I
High/low side pulse
width matching +/- 25ns
25V
CC (max)
offset(max)
100Vdc
) 500kHz
osc
+/-1.0A(typ.)
)
O
Package
Description
The IR2085S is a self oscillating half-bridge driver IC with 50% duty cycle ideally suited
for 36V-75V half-bridge DC-bus converters. This product is also suitable for push-pull
converters without restriction on input voltage.
Each channel frequency is equal to f
f
≈ 1/(2*RT.CT). Dead-time can be controlled through proper selection of CT and can
osc
range from 50 to 200nsec. Internal soft-start increases the pulse width during power up and maintains pulse
, where f
osc
can be set by selecting RT & CT, where
osc
SO -8SO -8
width matching for the high and low outputs throughout the start up cycle. The IR2085S initiates a soft start at
power up and after every overcurrent condition. Undervoltage lockout prevents operation if VCC is less than 7.5Vdc.
Simplified Circuit Diagram
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Vbias
C
BIAS
(10-15V)
R
T
C
T
C
D
BOOT
V
cc
OSC
BOOT
V
b
HO
s
V
IR2085S
GND
LO
Cs
Vin ( 100V max)
S
1
S
2
C
2
C
1
S
R1
L
S
R2
R
C
V
o
1
IR2085S
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. All currents are defined positive into any lead. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions.
SymbolDefinitionMin.Max.Units
V
b
V
CC
V
S
V
HO
V
LO
OSCOSC pin voltage-0.3VCC + 0.3
V
CS
dVS/dtAllowable offset voltage slew rate-50+50V/ns
I
CC
P
D
Rth
JA
T
J
T
S
T
L
High side floating supply voltage-0.3150
Low side supply voltage—25
High side floating supply offset voltageVb - 25Vb + 0.3
High side floating output voltageVb - 0.3V
Low side output voltage-0.3VCC + 0.3
Cs pin voltage-0.3VCC + 0.3
Supply current—20mA
Package power dissipation
Thermal resistance, junction to ambient—200°C/W
Junction temperature-55150
Storage temperature-55150
Lead temperature (soldering, 10 seconds)—300
—1.0W
b
+ 0.3
°C
V
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
SymbolDefinitionMin.Max.Units
VbHigh side floating supply voltageVdd -0.715
V
S
V
CC
I
CC
R
T
C
T
fosc(max)Operating frequency (per channel) — 500
T
J
Note1: Care should be taken to avoid output switching conditions where the Vs node flies inductively below ground by more
than 5V.
2
Steady state high side floating supply offset voltage-5100
Supply voltage1015
Supply current (Note 2)—5mA
Timing resistor10100KΩ
Timing capacitor471000pF
Junction temperature-40125°C
Vdc
KHz
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IR2085S
Dynamic Electrical Characteristics
V
(VCC, VBS) = 12V, C
BIAS
SymbolDefinition Min. Typ.Max. Units Test Conditions
Undervoltage positive going threshold6.87.37.8
Undervoltage negative going threshold6.36.87.3
High side undervoltage positive going threshold6.87.37.8
High side undervoltage negative going threshold6.36.87.3
Output high short circuit current—1.0—
Output low short circuit current—1.0—
= 1000 pF, and TA = 25°C unless otherwise specified.
LOAD
= 1000 pF and TA = 25°C unless otherwise specified.
LOAD
- VO)——1.5
BIAS
250300350mV
150200250mV
nsec
nsec
V
µA
V
A
VS = 0V
CT =100pF,
RT =10Kohm
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3
IR2085S
Functional Block Diagrams
RT
OSC
CT
VCC
CS
GND
UVLOBIAS
OSC
BLOCK
+
OVC
-
VREF
(250mV)
SOFT
START
10PF
IR2085S
BLOCK
DIAGRAM
PULSE
STEERING
UVLO
AND
RS
LATCH
Vb
HO
VS
VCC
LO
Lead Definitions
Symbol Description
V
CC
GNDLogic supply return
VbHigh side floating supply
V
S
HOHigh side output
LOLow side output
CSCurrent sense input
OSCOscillator pin
4
Logic supply
Floating supply return
Lead Assignments
IR2085S
VCC
Vb
HO
VS
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CS
1
2
OSC
3
GND
LO
8
7
6
54
IR2085S
(
)
)
500
450
400
350
300
250
200
Frequency (kHz)
150
100
50
0
102030405060708090100
C
= 470pF
T
RT
C
= 220pF
T
kohms
C
= 100pF
T
CT = 47pF
Fig. 1 Typical Output Frequency (-25oC to 125oC)
180
160
250
225
200
175
150
Time (ns)
125
100
75
50
102030405060708090100
RT (kohms
CT = 470pF
C
= 220pF
T
C
= 100pF
T
C
= 47pF
T
Fig. 2 Typical Dead T ime (@25oC)
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140
120
Dead Time (ns)
100
DT(CT=100pF, RT=100k)
80
60
-40-200 20406080100120
Temperature
Fig. 3 Typical Dead Time vs Temperature
5
IR2085S
Pin descriptions
CS: The input pin to the overcurrent comparator. Ex-
ceeding the overcurrent threshold value specified in
static electrical parameters section will terminate the
output pulses and start a new soft-start cycle as soon
as the voltage on the pin reduces below the threshold
value.
OSC: The oscillator-programming pin. Only two components are required to program the oscillator frequency , a resistor (tied to the VCC and CS pins), and a
capacitor (tied to the CS and GND pins). The approximate oscillator frequency is determined by the following simple formula:
f
= 1/ (2*RT.CT)
OSC
Where f
ohms (Ω) and CT capacitance in farads (F). The
recommended range for the timing resistor is between
10kW and 100kW and the recommended range for
the timing capacitor is between 47pF and 470pF. It is
not recommended to use timing resistors less than
10kΩ.
For best performance, keep the timing component
placement as close as possible to the IR2085S. It is
recommended to separate the ground and VCC traces
to the timing components.
GND: Signal ground and power ground for all functions. Due to high current and high frequency operation, a low impedance circuit board ground plane is
highly recommended.
HO, LO: High side and low side gate drive pins. The
high and low side drivers can be used to drive the
gate of a power MOSFET directly, without external
buffers. The drivers are capable of 1.2A peak source
and sink currents. It is recommended that the high
and low side drive pins should be located very close
to the gates of the high side and low side MOSFETs
to prevent any delay and distortion of the drive signals. The power MOSFETs should be low charge to
prevent any shoot through current.
frequency is in hertz (Hz), RT resistance in
OSC
V
: The high side power input connection. The high
b
side supply is derived from a bootstrap circuit using a
low-leakage schottky diode and a ceramic capacitor.
To prevent noise, the schottky diode and bypass capacitor should be located very close to the IR2085S
and separated VCC traces are recommended.
VS: The high side power return connection. VS should
be connected directly to the source terminal of the
high side MOSFET with the trace as short as possible.
VCC: The IC bias input connection for the device. Although the quiescent VCC current is very low, total supply current will be higher, depending on the MOSFET
gate charge connected to the HO and LO pins, and
the programmed oscillator frequency. Total VCC current is the sum of quiescent VCC current and the average current at HO and LO. Knowing the operating
frequency and the MOSFET gate charge (QG), the
average current can be calculated from:
I
= QG X f
ave
osc
T o prevent noise problems, a bypass ceramic capacitor
connected to VCC and GND should be placed as close
as possible to the IR2085S.
The IR2085S has an under voltage lockout feature for
the IC bias supply, VCC. The minimum voltage required
on VCC to make sure that the IC will work within specifications is 9.5V . Asymmetrical gate signals on HO and
LO pins are expected when VCC is between 7.5V and
8.5V.
Application Information
A 220 kHz half-bridge application circuit with full wave
synchronous rectification is shown in figure 4. On the
primary side, the IR2085S drives two IRF7493 - next
generation low charge power MOSFETs. The primary
side bias is obtained through a linear regulator from
the input voltage for start-up, and then from the transformer in steady state. The IRF7380, a dual 80V power
MOSFET in an SO8 package is used for the primary
side bias function. Two IRF6603 - novel DirectFET
6
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IR2085S
power MOSFETs are used on the secondary side in a
self-driven synchronous rectification topology.
DirectFETs practically eliminate MOSFET packaging
resistance, which maximizes circuit efficiency. The
DirectFET construction includes a copper “clip” across
the backside of the silicon, which enables top-sided
cooling and improved thermal performance. The
DirectFET gate drive voltage is clamped to an optimum value of 7.5V with the IRF9956 dual SO-8
MOSFET. The secondary side bias scheme is designed to allow outputs of two bus converters to be
connected in parallel, while operating from different
input voltages, and also to allow continuing output
current if one of the two input sources is shorted or
disconnected.
200
Vdd
36~60Vinput
1u
200
39k
3V
15V
rm
36~60Vinput
IRF7493
IRF7380
7
7
Vdd
3.3u
Two ferrite cores are used for the transformer and
inductor. The transformer core is a PQ20/16 (3F3) with
3:1 turns ratio and 1mil gap. The inductor core is an
E14/3.5/5 (3F3) with one turn and a 5mil gap. The
PCB has eight layers, with two layers for primary
windings that are connected in parallel and each has
three turns. Four layers are used for the secondary
windings. Each layer has one turn and two layers are
connected in parallel to get two sets of secondary
windings. 4 oz Cu PCB is recommended for the
primary and secondary windings. Each primary side
winding is placed between the two sets of the
secondary windings to balance the secondary side
current.
9V
IRF6603
39k
.1u
100k
10k
22u
22u
6~10Vout
.1u
9
9
3
56k
6k
47
47p
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IR2085
cs
ct
G
LO Vcc
Vb
HO
Vs
S
1u
Vdd
IRF7493
1
1u
1
3.3u
3
IRF9956
3
IRF6603
10k
Figure 4 – IR2085S DC Bus converter reference design.
7
IR2085S
Case outline
A
E
DB
5
87
6
6X
0.25 [ . 010 ]
65
H
4312
0.25 [ . 010 ] A
e
8X b
e1
A1
A
CAB
NOTES:
1. DIMENSI ONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONT ROLLING DIMENSION : MIL LIMET ER
3. D IMENSIONS ARE SHOWN IN MI LL IMETERS [INCHES].
4. OUTLI NE CONFORMS T O JEDE C OUT L INE MS-012AA .
C
0.10 [ . 004 ]
6.46 [. 2 55]
3X 1.27 [. 05 0]
y
8-Lead SOIC
DIM
FOOTPRINT
8X 0.72 [. 02 8]
8X 1.78 [. 07 0]
MINMAX
A
.0532
A1
b
c .0075 .0098 0.190.25
D
E
e
e1
H
K
L
y
.0688
.0040
.0098
.013
.020
.189
.1968
.1497
.1574
.050 BASIC
.025 BASIC0.635 BASIC
.2284
.2440
.0099
.0196
.016
.050
0°
K x 4 5°
8X L
8X c
7
5 DIMENSI ON D OES NOT INCLUDE MOLD PROT RUSIONS.
MOLD PROTRUSIONS NOT TO EXC EED 0.15 [.006].
6 DIMENSI ON D OES NOT INCLUDE MOLD PROT RUSIONS.
MOLD PROTRUSIONS NOT TO EXC EED 0.25 [.010].
7 DIMENSI ON IS T HE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-0021 11
8°
MILLIMETERSINCHES
MINMAX
1.35
1.75
0.10
0.25
0.33
0.51
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
01-6027
(MS-012AA)
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com/.
Data and specifications subject to change without notice
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
9/5/2003.
8
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