International Rectifier IRF7807V Datasheet

• N Channel Application Specific MOSFET

• Ideal for Mobile DC-DC Converters

• Low Conduction Losses

• Low Switching Losses

Description

This new device employs advanced HEXFET Power MOSFET technology to achieve an unprecedented balance of on-resistance and gate charge. The reduction of conduction and switching losses makes it ideal for high efficiency DC-DC Converters that power the latest generation of mobile microprocessors.

SO-8

PD-94108

IRF7807V

S

1

2

3

4

Top View

A

8

D

7

D

6

D

5

DG

A pair of IRF7807V devices provides the best cost/ performance solution for system voltages, such as

3.3V and 5V.

DEVICE CHARACTERISTICS

IRF7807V

R

(on)

DS

Q

G

Q

sw

Q

oss

17mΩ

9.5nC

3.4nC 12nC

Absolute Maximum Ratings

Parameter Symbol IRF7807 V Units

Drain-Source Voltage V Gate-Source Voltage V Continuous Drain or Source T Current (V

≥ 4.5V) TA = 70°C 6.6 A

GS

= 25°C I

A

Pulsed Drain Current I Power Dissipation T

= 25°C P

A

T

= 70°C 1.6

A

Junction & Storage Temperature Range T Continuous Source Current (Body Diode) I Pulsed Source Current I

DS

GS

D

DM

D

J, TSTG

S

SM

30 V

±20

8.3

66

2.5 W

–55 to 150 °C

2.5 A 66

Thermal Resistance

Parameter Max. Units

Maximum Junction-to-Ambient R Maximum Junction-to-Lead R

θJA

θJL

50 °C/W 20 °C/W

3/1/01

IRF7807V

Electrical Characteristics

Parameter Min Typ Max Units Conditions

Drain-to-Source BV Breakdown Voltage

Static Drain-Source R on Resistance

Gate Threshold Voltage V Drain-Source Leakage I

Current

Current* 100 µA V

Gate-Source Leakage I Current*

DSS

GSS

Total Gate Charge* Q Pre-Vth Q

Gate-Source Charge VDS = 16V Post-Vth Q

Gate-Source Charge Gate to Drain Charge Q Switch Chg(Q

+ Qgd) Q

gs2

Output Charge* Q Gate Resistance R Turn-on Delay Time t

Rise Time t

d (on)

r

Turn-off Delay Time td Fall Time t

f

30 – – V VGS = 0V, ID = 250µA

DSS

DS

GS(th)

(on)

17 25 mΩ VGS = 4.5V, ID = 7.0A

1.0 V VDS = VGS,ID = 250µA 20 VDS = 24V, VGS = 0

DS

Tj = 100°C

±100 nA VGS = ±20V

G

GS1

GS2

GD

sw

oss

G

9.5 14 VGS=5V, ID=7.0A

2.3

1.0 nC

2.4

3.4 5.2 12 16.8 VDS = 16V, VGS = 0

2.0 Ω

6.3 VDD = 16V, ID = 7.0A

1.2 ns VGS = 5V, RG= 2Ω

(off)

11 Resistive Load

2.2

= 24V, VGS = 0,

Source-Drain Rating & Characteristics

Parameter Min Typ Max Units Conditions

Diode Forward V Voltage*

Reverse Recovery Q Charge

Reverse Recovery Q

SD

rr

rr(s)

1.2 V IS = 7.0A, VGS = 0V

64 nC di/dt ~ 700A/µs

VDS = 16V, VGS = 0V, IS = 7.0A

41 nC di/dt = 700A/µs

Charge (with Parallel (with 10BQ040) Schottky) VDS = 16V, VGS = 0V, IS = 7.0A

Notes:

 Repetitive rating; pulse width limited by max. junction temperature.  Pulse width ≤ 400 µs; duty cycle ≤ 2%.  When mounted on 1 inch square copper board  Typ = measured - Q  Typical values of RDS(on) measured at VGS = 4.5V, QG, QSW and Q

measured at VGS = 5.0V , IF = 7.0A. * Device are 100% tested to these parameters.

oss

OSS

2 www.irf.com

)

Power MOSFET Selection for DC/DC Converters

Control FET

Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the R MOSFET, but these conduction losses are only about one half of the total losses.

ds(on)

of the

V

GTH

t1

Drain Current

t2

t3

IRF7807V

4

1

Gate V oltage

Power losses in the control switch Q1 are given by;

P

= P

loss

This can be expanded and approximated by;

P

loss

conduction

I

=

()

rms

 

+I



+Q

()

g

Q



+



This simplified loss equation includes the terms Q and Q

charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Q Fig 1.

the gate driver between the time that the threshold voltage has been reached (t1) and the time the drain current rises to I age begins to change. Minimizing Q tor in reducing switching losses in Q1.

put capacitance of the MOSFET during every switching cycle. Figure 2 shows how Q parallel combination of the voltage dependant (nonlinear) capacitance’s Cds and Cdg when multiplied by the power supply input buss voltage.

which are new to P ower MOSFET data sheets.

oss

Q

is a sub element of traditional gate-source

gs2

Q

indicates the charge that must be supplied by

gs2

Q

is the charge that must be supplied to the out-

oss

+ P

2

R

×

ds(on)

Q

gd

×

oss

2

V

×

in

i

g

V

f

×

g

V

×

in

(t2) at which time the drain volt-

dmax

switching

f

×



f



and Q

gs1

+ P

 

+I×



+ P

drive

 



gs2

oss

output

Q

gs2

×

i

g

, can be seen from

is a critical fac-

gs2

is formed by the

 

V

f

×

in



gs2

t0

2

*

P

+

output



f

+

(



Drain V oltage

Q

V

×

rr

×

in

GS1QGS2QGD

Q

Figure 1: Typical MOSFET switching waveform

Synchronous FET

The power loss equation for Q2 is approximated

by;

P P +Q

*dissipated primarily in Q1.

P

=

loss

conduction

2

I

=

loss

rms

()

g



Q

oss



+

2



P

+

drive

R

×

ds(on)

V

×

f

×

g

V

×

in

f

www.irf.com 3