Interface Masters TAHOE 8724 User Manual

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TAHOE 8724 User Guide
Rev: 01
8/10/2017
Interface Masters Technologies Inc. Confidential & Proprietary
User Guide
TAHOE 8724
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TAHOE 8724 User Guide
Rev: 01
8/10/2017
Interface Masters Technologies Inc. Confidential & Proprietary
TABLE OF CONTENTS
1 INTRODUCTION ............................................................................................................... 6
1.1 STANDARD FEATURES ................................................................................................ 6
1.2 FUNCTIONAL DIAGRAM ................................................................................................... 7
1.3 PHYSICAL LAYOUT FOR SYSTEM ....................................................................................... 9
2 MAJOR COMPONENTS ............................................................................................... 12
2.1 CN78XX PROCESSOR .............................................................................................. 12
2.1.1 CN78XX Processor Overview ........................................................................... 12
2.1.2 DDR (LMC) ....................................................................................................... 13
2.1.3 SPI ..................................................................................................................... 14
2.1.4 eMMC/SD .......................................................................................................... 15
2.1.5 Boot Bus............................................................................................................. 16
2.1.6 SERDES (QLMs) ............................................................................................... 17
2.1.7 I2C (TWSI)......................................................................................................... 18
2.1.8 UART ................................................................................................................. 19
2.1.9 USB 3.0 .............................................................................................................. 20
2.1.10 MDIO (SMI) ................................................................................................... 21
2.1.11 MANAGEMENT PORT ................................................................................................ 22
2.2 CPLD .................................................................................................................... 24
2.2.1 CPLD Overview ............................................................................................... 24
2.2.2 Power Sequencing Control ................................................................................ 25
2.2.3 Access Interface ................................................................................................. 25
2.2.4 LED Control ...................................................................................................... 26
2.2.5 Boot Devices ...................................................................................................... 27
2.3.5 Selecting Boot Device ........................................................................................ 27
2.4 CS4318 – QUAD RXAUI TO SFI PHY ..................................................................... 28
2.5 VSC8221 – SINGLE PORT SGMII TO 1GBASE-T PHY ............................................ 29
2.6 PEX8724 – PCI-E GEN3 SWITCH ............................................................................ 30
2.7 PCI-E M.2 SSD ...................................................................................................... 31
2.8 SERIAL INTERFACE .................................................................................................. 31
3 I2C PERIPHERALS ...................................................................................................... 32
3.1 I2C BUS 0 PERIPHERALS ............................................................................................... 32
3.1.1 DDR4 SPD......................................................................................................... 32
3.2 I2C BUS 1 PERIPHERALS ......................................................................................... 33
3.2.2 ADM1032ARZ - Temperature Sensor ............................................................... 33
3.2.3 MCP7940N - Real Time Clock .......................................................................... 33
3.2.4 EEPROM ........................................................................................................... 33
4 I/O MODULES .............................................................................................................. 34
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4.1 TM13233 I/O MODULE .......................................................................................... 34
4.2 TM13238 I/O MODULE ................................................................................................ 35
5 POWER SUPPLY .............................................................................................................. 36
5.1 POWER CONSUMPTION ............................................................................................ 36
6 COOLING FAN ............................................................................................................. 37
7 ENCLOSURE ................................................................................................................ 38
7.1 ENCLOSURE DIMENSION .......................................................................................... 38
7.2 MOUNTING EARS ..................................................................................................... 38
7.3 SLIDING GUIDES ..................................................................................................... 39
8 CUSTOMER SUPPORT ............................................................................................... 40
8.1 TECHNICAL ASSISTANCE .......................................................................................... 40
8.2 LIFE SUPPORT POLICY ............................................................................................ 40
8.3 WARRANTY .............................................................................................................. 41
9 ORDERING PART NUMBER ....................................................................................... 42
9.1 SYSTEM ORDERING PART NUMBER .................................................................................. 42
9.2 STANDARD CONFIGURATIONS ........................................................................................ 43
9.3 MODULE PART NUMBERS ......................................................................................... 44
9.4 ACCESSORIES PART NUMBERS.................................................................................. 44
9.5 TRANSCEIVERS ........................................................................................................ 45
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TABLE OF FIGURES
Figure 1, TAHOE 8724 Block Diagram ................................................................................ 8
Figure 2, 3D Image of TAHOE 8724 with Top view ............................................................. 9
Figure 3, 3D Image of TAHOE 8724 with Front View ........................................................ 10
Figure 4, 3D Image of TAHOE 8724 with Rear View ......................................................... 10
Figure 5, 3D Image of TAHOE 8724 with cover off ............................................................ 11
Figure6, DDR(LMC) Block Diagram .................................................................................. 13
Figure 7, SPI Block Diagram .............................................................................................. 14
Figure 8, eMMC Block Diagram ......................................................................................... 15
Figure 9, Boot Bus Interface................................................................................................ 16
Figure 10, I2C TWSI Block Diagram .................................................................................. 18
Figure 11, UART Signals to RJ45 ....................................................................................... 19
Figure 12, USB 3.0 Type- A Block Diagram ....................................................................... 20
Figure 13, MDIO(SMI) Block Diagram .............................................................................. 21
Figure 14, Management Port............................................................................................... 22
Figure 15, Console Port ...................................................................................................... 23
Figure 16, TAHOE 8724 CPLD Functional Diagram ........................................................ 24
Figure 17, LED Control....................................................................................................... 26
Figure 18, CS4318 RXAUI TO SFI PHY Block Diagram ................................................... 28
Figure 19, Single Port SGMII to 10/100GBASE-T PHY Diagram...................................... 29
Figure 20, PCI-e Gen3 Switch Diagram ............................................................................. 30
Figure 21, I2C Peripherals Diagram .................................................................................. 32
Figure 22, TM13233 I/O Module Block Diagram ............................................................... 34
Figure 23, TM13238 I/O Module Block Diagram ............................................................... 35
Figure 24, Cooling Fan Functional Diagram ..................................................................... 37
Figure 25, Mounting Ears of TAHOE 8724 ........................................................................ 38
Figure 26, Sliding Guides of TAHOE 8724 ......................................................................... 39
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TABLE OF Tables
Table 1, Console Port Setting…………………………………………………………………….. 23 Table 2, Boot Device Register……………………………………………………………………. 27 Table 3, Boot Device Bits…………………………………………………………………………. 27 Table 4, Input Power Supply……………………………………………………………………… 36 Table 5, Output Power Supply……………………………………………………………………. 36 Table 6, Dimension of Enclosure………………………………………………………………… 38 Table 7, Ordering Part Numbers………………………………………………………………… 42
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1 Introduction
The TAHOE 8724, a highly flexible 1U networking appliance designed for enterprise Market. TAHOE 8724 is based on Cavium 64-bit MIPS technology.
1.1 Standard Features
TAHOE 8724 is 1U appliance based on the Cavium CN78xx processor.
It provides the following external interfaces:
❖ Four 1G/10G SFP+ ports ❖ One 10/100/1000 BASE-T RJ45 management port ❖ One RJ45 console port ❖ One USB 3.0 Host port ❖ One SD card slot ❖ Two hot-swap power supply bays for redundancy ❖ Two hot-swap I/O module bays supporting 8x 1G/10G SFP+ ports or 2x 40G
QSFP ports
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Internally, the system provides:
➢ Four DDR4 SODIMM sockets ➢ eMMC flash (4GB) ➢ Two M.2 PCI-e SSD (1TB) ➢ SPI flash ➢ An I2C TPM module for system authentication ➢ An I2C RTC module for time keeping ➢ An I2C EEPROM for parameter storage ➢ I2C temperature sensors for board and CPU junction ➢ A fan control module supporting up to 4 hot-pluggable dual-stack fans, each
speed-controllable via two I2C-connected ADT7470 fan controllers.
1.2 Functional Diagram
The below block diagram is for TAHOE 8724 Board.
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Figure 1, TAHOE 8724 Block Diagram
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1.3 Physical Layout for System
Figure 2, 3D Image of TAHOE 8724 with Top view
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Figure 3, 3D Image of TAHOE 8724 with Front View
Figure 4, 3D Image of TAHOE 8724 with Rear View
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Figure 5, 3D Image of TAHOE 8724 with cover off
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2 Major Components
2.1 CN78XX Processor
2.1.1 CN78XX Processor Overview
The Cavium OCTEON III CN78XX Multicore MIPS processor is the main processor used in this system. The CN78XX has Four 72-bit DRAM controllers and support DDR4 SPD. It includes Eight groups of four SERDES configured for various Ethernet interfaces or PCI-e 3.0. The following interfaces are provided by this part:
• Boot bus
• Four x SMI/MDIO bus
• Two x TWSI bus
• Two x UART
• SPI
• eMMC/SD
• USB 3.0 Host
• Eight QLMs SerDes block with four lanes each
• Four 72b DDR4 interface
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2.1.2 DDR (LMC)
The CN78XX consists four 72-bit DRAM interfaces with ECC. It can support DDR4 (up to 2133MHz data rate) and up to 512GB of memory (128GB per controller). All controllers obtain equal amount of attached DRAM. Each controller has four ranks / chips selects and the following configuration are:
➢ Up to two dual-rank DIMMs per controller
Figure6, DDR(LMC) Block Diagram
The TAHOE 8724 consist four DRAM interfaces with one DDR4 SODIMM slot (up to 16GB) per interface.
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2.1.3 SPI
Serial Peripheral Interface (SPI) has separate clock and data lines, along with a
select line and chip select. TAHOE 8724 have a SPI Interface connected to SPI Flash
memory.
Figure 7, SPI Block Diagram
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2.1.4 eMMC/SD
The CN78XX consist one Embedded Multi-Media Controller (eMMC) interface that can support up to two flash memory devices- eMMC Interface and SD card.
It supports the transfer rates up to 52MHz and have one, four and eight-bit Data Bus. The TAHOE 8724 has an eMMC flash memory and SD card connected to eMMC Interface, eMMC flash is connected to CMDO by default however user can switch connection CMDO to SD card through the cross switch via CPLD.
Figure 8, eMMC Block Diagram
The eMMC interface also connects to Secure Digital(SD) card connector on the front panel and could be configured as boot device.
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2.1.5 Boot Bus
The CN78XX has general-purpose bus that typically attaches to nonvolatile memory such as FLASH. It includes eight chip-selects, and 32 address/data lines.
The TAHOE 8724 has the CPLD connected on the Boot Bus interface as well as this bus will be the main communication path to the CPLD.
Figure 9, Boot Bus Interface
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2.1.6 SERDES (QLMs)
The CN78XX has eight Quad Lane Modules (QLM), with each consisting of Four SERDES that can be configured as different interfaces, such as SGMII, XAUI, RXAUI, XFI/KR, XLAUI, or PCI-e.
The TAHOE 8724 QLMs are configured as follows:
a) QLM0 – PCI-e 3.0 x4 b) QLM1 – SGMII x1 c) QLM2 – RXAUI x2 d) QLM3 – RXAUI x2 e) QLM4 – XFI/KR x4 or XLAUI x1 f) QLM5 – XFI/KR x4 or XLAUI x1 g) QLM6 – XFI/KR x4 or XLAUI x1 h) QLM7 – XFI/KR x4 or XLAUI x1
a. QLM0 is configured as PIC-e 3.0 RC interface to connect with PEX8724 PCI-e
switch.
b. QLM1 is configured as SGMII interface to connect with a GE PHY VSC8221 to
provide the management port.
c. QLM2/3 is configured as RXAUI interface to connect with CS4318 Quad RAXUI
to SFI PHY to provide four SFP+ ports.
d. QLM4/5/6/7 is configured as XFI or XLAUI interface to connect with the PHY on
the IO module.
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2.1.7 I2C (TWSI)
The CN78XX comes with two I2C interfaces. It supports both standard mode (100kbps) and fast mode (400kbps).
On the TAHOE8724, TWSI0 is connected to the DDR4 modules (SPD), and TWSI1 is connected to RTC, temperature sensor, and an EEPROM to store configuration data and MAC address. TWSI0 I2C interface utilized by CPU to access I2C devices on board. The I2C devices can be accessed through this interface are DDR3 SPD EEPROM, TLV EEPROM, RTC controller and Temperature Sensor.
Figure 10, I2C TWSI Block Diagram
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2.1.8 UART
The CN78XX comes with two UART interfaces. CN78XX transfers data to and receive characters from the UART core via 64-bit CSR processor. The UART core transfers data either by polling or interrupts.
The TAHOE 8724 utilizes UART0 as console port on the front panel. UART1 is not used.
Figure 11, UART Signals to RJ45
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2.1.9 USB 3.0
The CN78XX utilizes USB 3.0 interface that supports Super Speed (5.0Gbps), High-Speed (480Mbps), Full-Speed (12Mbps), and Low-Speed (1.5Mbps) transmission rates.
The super speed transaction initiated by the host making a request followed by a response from the device. In the TAHOE 8724, USB port is utilized as USB3.0 type A port
on the front panel.
Figure 12, USB 3.0 Type- A Block Diagram
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2.1.10 MDIO (SMI)
A PHY management interface, MDIO is used to configure each PHY before operation, and to monitor link status during operation. The CN78XX consist of four MDIO
interfaces and supports both Clause 22 and 45.
The MDIO interfaces utilized as management interface to Ethernet PHYs that are connected to the CN78XX. In the TAHOE 8724, SMI 0 interfaces with CS4318 which drives the four 1/10 GE ports, SMI 1 interfaces with VSC8221 which drives the management port. SMI 2 and 3 go to the IO boards.
Figure 13, MDIO(SMI) Block Diagram
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2.1.11 Management Port
The Management port is connected to SGMII interface of the control CPU board through a GE PHY VSC8221. The management port supports 10/100/1000 Base-T protocols.
Figure 14, Management Port
Management port Speed LED: Solid Green indicates Gigabit speed. Management port Link/Act LED: Blinking Green indicates Action.
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2.1.12 Console Port
The console port is connected to UART interface of the control CPU board through an RS232 level translator.
Figure 15, Console Port
The setting is as shown below:
Setting
Parameter
Baud Rate
115200
Data Bits
8
Parity
None
Stop Bit
1
Flow Control
None
Table 1, Console Port Setting
Console Port RX LED: Blinking Green indicates receiving. Console Port TX LED: Blinking Green indicates transmitting.
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2.2 CPLD
2.2.1 CPLD Overview
The TAHOE 8724 uses Altera MAX II CPLD to control the basic functionality of the board. The Internal Registers are accessed from the host CPU through a parallel bus and from a Debug port through the SPI protocol. Please refer to TAHOE 8724 CPLD Specification document for detail description. CPLD is designed in to perform following functions:
a) Orchestrate power & reset sequencing for CPU and various major components
b) Drive LEDs
c) Boot strap configuration
Figure 16, TAHOE 8724 CPLD Functional Diagram
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2.2.2 Power Sequencing Control
CPLD enables over time the various voltage regulators to meet the voltage Turn-On requirements for various IC. During this process, it checks the various Power­Good indication signals before enabling the next voltages in the sequence.
2.2.3 Access Interface
The CN78XX’s Boot Bus is the main interface to access the internal registers of the
CPLD and utilizes SPI interface from a debug header. The pinout of the header matches the pinout for the Altera Byte Blaster.
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2.2.4 LED Control
The CPLD drive the system LED based on system status.
Figure 17, LED Control
2.2.4.1 Power LED 0
❖ Off indicates “Left Power Supply is off”. ❖ Solid Green indicates “Left Power supply is Good”.
2.2.4.2 Power LED 1
❖ Off indicates “Right Power supply is off”. ❖ Solid Green indicates “Right Power Supply is Good”.
2.2.4.3 Status LED
❖ Solid Green indicates “System OK”. ❖ Blinking Green indicates “System initializing”.
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2.2.5 Boot Devices
Tahoe 8724 supports three boot devices
2.2.5.1 SPI NOR Flash
SPI NOR Flash is 16GB it is the default boot device.
2.2.5.2 SD card
SD card supports capacity up to 128GB.
2.2.5.3 eMMC
eMMC is 4GB device and it is the second boot device after the SPI NOR flash.
2.3.5 Selecting Boot Device
Registered BOOT_CSR in the CPLD Selects Boot Device The boot device could be selected by writing the appropriate values into BDSL_2 and BDSL_3 BOOT_CSR – Boot Control and Status
7
6 5 4 3 2
1
0
CN_FAILSF
res
res
res
BDSL_3
BDSL_2
res
res
Table 2, Boot Device Register
bit 7 CN_FAILSF – CPU Failsafe Upon reset, it is set to 1, but if the CPU fails to boot it is set to 0. bits 6:4 Reserved bits 3:2 BDSL [3:2] – Boot Device Select Upon power up, SPI NOR is selected as default device. The software can change these bits and cause a re-boot by writing a 1 into
the RE_BOOT bit.
These bits are not changed by a hardware reset.
BDSL_ [3:2]
Boot Device
11
eMMC
10
SPI Flash
01
reserved
00
SD Card
Table 3, Boot Device Bits
bits 1:0 reserved
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2.4 CS4318 – Quad RXAUI to SFI PHY
The CS4318 is a quad-channel PHY that translates RXAUI to SFI and vice versa. Below is a list of the major signals for the CS4318:
• Four x RXAUI – Connected to the RXAUI lanes of the CN78XX (QLMs 2 & 3)
• Four x SFI – Connected to SFP+ cages
• MDIO – Connected to CN78XX for PHY management
Figure 18, CS4318 RXAUI TO SFI PHY Block Diagram
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2.5 VSC8221 – Single Port SGMII to 1GBASE-T PHY
The VSC8221 is a single port PHY that translates SGMII to
10/100/1000BASE–T and vice versa. This device is used for management port.
Below is a list of the major signals for the VSC8221:
• SGMII – Connected to the SGMII lanes of the CN78XX (QLM 1)
• 10/100/1000BASE –T – Connected Through the magnetic Ethernet Transformer to
RJ45 management port
• MDIO – Connected to CN78XX for PHY management
Figure 19, Single Port SGMII to 10/100GBASE-T PHY Diagram
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2.6 PEX8724 – PCI-e Gen3 Switch
The PEX8724 is a PCI-e Gen3 Switch which is utilized to expand PCI-e bus on
CN78xx.
Figure 20, PCI-e Gen3 Switch Diagram
Below is a list of the major signals for the PEX8724
a) PCI-e x4 – Root complex, Connected to the PCI-e lanes of the CN78XX (QLM b) Two PCI-e x4 – End point, Connected to the PCI-e lanes of the M.2 SSD c) Two PCI-e x4 – End point, Connected to the PCI-e lanes of the IO modules.
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2.7 PCI-e M.2 SSD
TAHOE 8724 supports two M.2 PCI-e SSD Module. The capacity for these modules ranges from 128GB to 1TB. The PCI-e M.2 SSD is connected with CN78XX (QLM0) through PCI-e 3.0 x4 interface.
2.8 Serial Interface
The CN78XX UART0 connected to a RS232 transceiver and an RJ45 (for use with standard console cables) on the front panel. The secondary UART1 is available for debug use.
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3 I2C Peripherals
Figure 21, I2C Peripherals Diagram
3.1 I2C Bus 0 Peripherals
The CN78XX TWSI0 interface is the I2C master for bus #0.
3.1.1 DDR4 SPD
Each DDR4 module consist an EEPROM that stores SPD data. The I2C IDs for the DIMM slot 0,1,2,3 are 1010 000x, 1010 001x, 1010 010x, 1010 011x.
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3.2 I2C Bus 1 Peripherals
The CN78XX TWSI1 interface is the I2C master for bus #1.
3.2.2 ADM1032ARZ - Temperature Sensor
ON Semiconductor temperature sensor (ADM1032ARZ) utilized to monitor the junction temperature of the CPU and board temperature. The I2C ID is 1001 100x
3.2.3 MCP7940N - Real Time Clock
The MCP7940N is a battery backed I2C real time clock. With having an external
32.768kHz crystal and a battery, this device can keep track of time while the system is off. The I2C ID is 1101 111x. Microchip RTC device (MCP7940N) is installed on the system to provide RTC function.
3.2.4 EEPROM
An EEPROM is utilized to store MAC address for the CN78xx, and other configuration data. The I2C ID is 1010 100x ST Micro Electronics 512Kb EEPROM (M24512­RMN6TP) is installed on the system to store customized information.
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4 I/O Modules
TAHOE 8724 supports two hot swappable I/O module bays.
Interface Masters Technologies develops various I/O modules based on customer
request. At the time of this writing there are two models of I/O modules.
a) TM1323 supports eight ports of 1/10G and b) TM13238 supports two ports of 40G.
4.1 TM13233 I/O Module
TM13233 I/O module supports eight SFP+ 1/10GE ports. TM13233 I/O Module interfaces with CN78XX with Eight XFI or Two XLAUI interface through the QLM 7 and 6 Lanes and connects with PCI-e Switch through the QLM 2 lane.
Figure 22, TM13233 I/O Module Block Diagram
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4.2 TM13238 I/O Module
TM13238 I/O module supports two ports of 40G.
TM13238 I/O Module interfaces with CN78XX with Eight XFI or Two XLAUI interface through the QLM 5 and 4 Lanes and also connects with PCI-e Switch through the QLM 2 lane.
Figure 23, TM13238 I/O Module Block Diagram
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5 Power Supply
The TAHOE 8724 provide two redundant hot-swappable 550Watt power supplies with 12V output. It provides hot-swap and fail over capability.
Input Voltage
(VAC)
Max Input Current
(A)
100
8
240
4
Table 4, Input Power Supply
Output Voltage
(DC)
Max Output Current
(A)
12
44
Table 5, Output Power Supply
5.1 Power Consumption
The TAHOE 8724 consume 150-350W power depending on CPU speed, DRAM size, DRAM speed, Number of active I/O ports.
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6 Cooling Fan
TAHOE 8724 provide Four Dual field replaceable fans with speeded control and temperature control chip with four sensors. The cooling fan cools the system depends on temperature of the system and it is automatically adjusted when it is required.
Figure 24, Cooling Fan Functional Diagram
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7 Enclosure
7.1 Enclosure Dimension
TAHOE 8724 is a 1U appliance with following dimensions
Inches
MM
H
17.5
445
W
1.73
44
L
17.25
438
Table 6, Dimension of Enclosure
7.2 Mounting Ears
TAHOE 8724 comes standard with two ears for mounting to 19-inch rack.
Figure 25, Mounting Ears of TAHOE 8724
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7.3 Sliding Guides
TAHOE 8724 comes standard with two sliding guides for 19-inch rack
Figure 26, Sliding Guides of TAHOE 8724
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8 Customer Support
8.1 Technical Assistance
Interface Masters Technologies technical support staff is available to assist you with questions that you may have. Please contact Interface Masters Technologies using one of the methods shown below.
Phone: (408) 441-9341 ext. 100
Fax: (815) 364-0888
Website: http://www.interfacemasters.com
8.2 Life Support Policy
Interface Masters Technologies products are not authorized for use as critical components in life support devices or systems without the express written approval of the CEO of Interface Masters Technologies. Refer to the following for definitions of critical components and life support devices.
A critical component is any component of a life support device or system whose failure to perform can be expected to cause the failure of the life support device or system, affect its safety, or limit its effectiveness.
Life support devices or systems are devices or systems which support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
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8.3 Warranty
Standard hardware warranty period is ONE year from date of purchase. Interface Masters Technologies will, solely at its option, repair or replace products, which prove to be defective in materials or workmanship, provided they are returned to an Interface Masters Technologies authorized repair center. Shipment to Interface Masters Technologies is at the customer's expense. Interface Master Technologies pays return shipment by ground Products, which in Interface Masters Technologies opinion, have been subject to misuse, abuse, neglect or unauthorized alteration or repair are excluded from this warranty.
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9 Ordering Part Number
9.1 System ordering part number
TAHOE 8724
CPU CPU DRAM
1st IO
2nd IO
Power
Speed
Size Module
Module
Supply
(MHZ)
(GB)
Type
1=AC
2=DC
1=TM13233
2=TM13238
1=16
2=32
3=64
1=1400
2=1800
3=2000
1=CN7870
2=CN7880
3=CN7890
Table 7, Ordering Part Numbers
Page 43
TAHOE 8724 User Guide
Rev: 01
8/10/2017
Interface Masters Technologies Inc. Confidential & Proprietary
9.2 Standard Configurations
Following configurations will be stocked with Four weeks of lead time
Ordering Number
Configuration
TAHOE 8724-322B11
TAHOE 8724-
CPU CCN7890
CPU Speed 1800
DRAM size 32GB
1st IO module is blank
2nd IO module is TM13233
AC power supply
TAHOE 8724-222B11
TAHOE 8724
CPU CCN7880
CPU Speed 1800
DRAM size 32GB
1st IO module is Blank
2nd IO module is TM13233
AC power supply
TAHOE 8724- 121B11
TAHOE 8724
CPU CCN7870
CPU Speed 1800
DRAM size 16GB
1st IO Module is Blank
2nd IO module isTM13233
AC power supply
Table 8, Standard Configurations
Page 44
TAHOE 8724 User Guide
Rev: 01
8/10/2017
Interface Masters Technologies Inc. Confidential & Proprietary
9.3 Module Part numbers
Module Part Number
Description
TM13233
IO modules with eight ports of 1/10G SFP+ ports.
(Optics not included)
TM13238
IO modules with two ports of 40G QSFP+ ports.
(Optics not included)
Table 9, IO Module Part Numbers
9.4 Accessories Part Numbers
Part Number
Description
TAC104
Left & Right mounting Ears
TAC103
Sliding Guides
Table 10, Accessories Part Numbers
Page 45
TAHOE 8724 User Guide
Rev: 01
8/10/2017
Interface Masters Technologies Inc. Confidential & Proprietary
9.5 Transceivers
Ordering
Part Number
Manufacturer
Description
163-0007679
Finisar
1/10Gb SFP+ SR / multi-mode 850 nm optics
163-0007184
Finisar
1/10Gb SFP+ LR / single mode 1310 nm optics
163-0007180
Finisar
40Gb QSFP+ SR4 / multi mode850 nm optics
163-0007181
Finisar
40Gb QSFP+ LR4 / single mode 1310 nm optics
164-0007148
Finisar
10/100/1000 BASE-T copper
Table 11, Transceivers part Numbers
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