Intel iapx 432 User Manual

inter
iAPX 432
Interface Processor
Architecture Reference
Manual
171863-001
iAPX
432
INTERFACE
P~OR
Manual Orner
Release
Number
1.1
171863-001
Oamponents
Intel
Cb~right
Corporation,
3065
(C)
Bowers
1981,
Intel
Avenue, Santa
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Clara,
California
95051
Additional obtained
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PREFACE
Understanding
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TABLE
OF
CCNl'ENI'S
TITLE
1.
KE'Y'
1-1.
1-2.
1-3.
1-4.
1-5.
crncEP'l'S
Peripheral Basic Peripheral
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Subsystems
I/O
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Attached Processor Interface
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I/O
Controller
Execution Environments
Wind~
Functions
I/O
lv1OO.el
Data
I/O
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Flow
EKaII1J?le
GOP
Process Printer Printer Printer
Supplementary
Physical
Reference
Interconnect
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•••••••••••••••••••••••••••••••••••••••••• Interface
Subsystem
Interface
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•••••••••••••••
•••••••••••••••••••••••••••••••••
Processor
Subsystem
Interface
Software
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Summary
•••••••••••••••••••••••••••••••••••••••••••
Server Task Task (Device Task) Reply Task Interface
Access
•••••••••••••••••••••••••••
Perspective
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Perspective
Perspective
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r.t:>de
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Facilities
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PAGE
1-1
1-1
1-4 l-7
1-7 1-7 1-9
1-10
1-10
1-11 1-11
1-13 1-14
1-14 1-16
1-19 1-21 1-21
1-21
1-22 1-22
1-22
2.
CB.:JEX::!'IS
2-1.
2-2.
2-3. 2-4.
2-5. 2-6.
2-7. 2-8.
iv
.ANI) OPERAroRS
S~y
Envi romnent
IP
C>]?er
Obj
ect
Addressing and Global
Of
Interface
ators
•••••••••••••••••••••••••••••••••••••••
Processor
•••••••••••••••••••••••••••••••••••••••••••
Facilities
•••••••••••••••••••••••••••••••••••••••••• Storage
Objects For Program Environments Facilities Processes Process Facilities
For Asynchronous Communication
and I£x::al Storage Resource
Scheduling and Dispatching
For Object
Management
Context Environment Manipulation
The
Four Direct Oi:>ject
vs.
Selectors Entering Entering
Entry
an Access Segment
the
Access Segments
Indirect
Accessibility
•••••••••••••••••••••••••••••••
••••••••••••••••••••••••••••
Global Access Segment
••••••••••••••••
Management
••••••••••
•••••••••••••••••••••••••
••••••••••••••••
Management
••••••••••
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•••••••••••••••••••••
II
••••••
••••••••••••••••••••
2-1
2-1
2-2
2-3
2-7 2-7
2-8
2-8
2-8
2-8
2-9
2-9
2-10 2-12 2-12
2-12
3.
~
3-1.
3-2.
3-3. 3-4.
3-5.
•••••••••••••••••••••••••••••••••••••••••••••••••••••
WindCM
WindCM
Random Block Mode.Data
Interconnect
AttribJtes
Wioo~
Subrange Base Address Object
Direction
Transfer Transfer
O\Terlay
Address Recognition Consistency
Block Block Block Block Block
Status Reference
............................................
Status Mode
•••••••••••••••••••••••••••••••••••••••••••••••
Operation
Check
Mode
Data
Mode Mode MOde r.1c>de Mode
Transfers
Transfer
Transfer Attributes Consistency Operation Termination Addressing
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arrl
Subrange
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Size
.
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· ............................... .
Check
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••••••••••••••••••••••••••
3-1
3-2 3-2 3-4 3-5
3-6 3-6 3-6
3-7 3-9 3-9 3-9
3-12
3-14 3-14 3-15 3-15
3-16
3-17 3-20
4.
FtJNCI'IOOS
4-1. 4-2.
4-3. 4-4.
5 •
PIIY'S
5-1. 5-2.
5-3.
6.
FAULTS
6-1.
6-2.
•••••••••••••••••••••••••••••••••••••••••••••••••••
Function Function
Process Function
Function Function Function
ICAI..
Reference Physical Physical
Facility Requests
Selection
Opcodes Operands
~ecu
Completion
REF'ERmCE:
Reference Reference
tion
Mode
Interface
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. ............................ .
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lvDDE
Switching
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· ............................... .
MOde
Addressing
Mode
Functions
. ...................... .
......................................................
Fault
Fault
Reporting Physical Wgical Categories
Window-Mapped
Mode
Context-level
Process-level
Processor-level
Haooling . ......................................... .
..........................................
Mode
.........................................
..........................................
of
Logical
Data
Mode Faults Faults
Faults Transfer
Faults
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4-1 4-1 4-4 4-4 4-4 4-6
4-9 4-9
5-1 5-1 5-2 5-2
6-1 6-1
6-2 6-2 6-2
6-3
6-3
6-4
6-4
6-6
v
APPENDICES
APPENDICES
A.
SYS'm1
A-I.
A-2.
A-3.
B.
FUNCTICN
c.
FA~T
C-l. C-2.
C-3.
C-4.
D. IN'lERRlJP'r E.
SYS'I'm E-l. E-2. E-3.
F.
INTERPRX!ESS
~
Context Process Processor
S~y
Fault Fault Object Non-Instruction
INITIAl.JIZATlOO
System Reset Establishing System
S~
Objects Objects
Objects
S~Y
Reporting ..........................................
Information
Level
lIAN'DLING...........................................
............................................
•••••••••••••••••••••••••••••••
Operator
•••••••••••••••••••••••••••••••••••••••
.
.........................................
........................................
"
Areas
Interface
..................................
Faults
•••••••••••••••••••••••.••••••••••••••••
•••••••••••••••••••••••••••••
Faults
•••••••••••••••••••••••••
•••••••
e._
•••••••
.
.............................................
an
Startup
~CATICN
Execution
...........................................
Environment
AND
DISPATCHING
••••••••••••••••••••
EXAMPLE
••••••••••
Page A-l
A-I
A-3 A-7
B-1 C-l
C-l C-l C-5 C-IO
D--1
E-l E-l E-2 E-5
F-l
vi
TABLES
TITLE
1-1. 2-1.
2-2. 2-3.
3-1.
B-1. B-2.
B-3.
D-l.
E-l.
Printer
IP/GDP IP/GDP
Example Legend System Object Comparison Operator Comparison
Direct/Indirect
Window
Attribute
Alphabetical
IP
Function IP Function Interrupt
Window
Configuration
Summary Summary
Sources
Accessibility
Summary
Index
to
by Function
by Operator
•••••••••••••••••••••••••••••••••••••••• Following
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IP Functions
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Code
ID
INIT
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PAGE
1-18
2-3
2-5
2-11 3-3
B-2
B-3
B-4 0-4
E-7
vii
FIGURES
TITLE
1-1. 1-2.
1-3.
1-4.
1-5. 1-6. 1-7. 1-8. 3-1.
3-2. 3-3. 3-4.
3-5. 3-6.
4-1.
4-2. 4-3.
4-4.
4-5.
4-6.
6-1.
0-1.
E-l.
F-l.
F-2.
F-3. F-4. F-5. F-6
432
System Basic I/O Service Cycle Peripheral Peripheral
Interface I/O Data
Pr
inter
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Mode
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and
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int
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lay
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Attributes
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Selection
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Basic IP Function Execution
Fault Interrupt
Reporting
Handler
State
Processor Object Location Print
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Objects
IP Performs Blocking
GOP
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IP
Responds
Window
Print
Manipulation
Reply
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to
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PAGE
1-2
1-5 1-6 1-8
1-12
1-15 1-17 1-20
.
3-8 3-10 3-11 3-13 3-18 3-19
4-2 4-3
4-5 4-7 4-8 4-10
6-5
D-2
E-3
F-2
F-ll
F-12
F-13 F-14 F-15
viii
CHAPTER
KEY
CCNCEPTS
1
This connection
Peripheral
Section Peripheral of
chapter
chapter
first
I/O
four
operations,
Interface reviews for
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the
simple
example
with
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introduces addressing, special
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typical
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PERIPHERAL
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432
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software
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the
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roc>del
The m::>de
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iAPX
432
or
more
a
hypothetical
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COII1I'OC>n
software
memory
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is
used
1-1
distinguishes
for
system,
and shows how
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pointing
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that
conpr
emphasis on
i.s
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final
section
and
that
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microprocessor
satellite
configuration
Processors
which
(IP).
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normally
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bulk
section
out
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need
432
system.
ise
this
the
role
ized
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interconnect
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family
Peripheral
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shared
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of
is
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or
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system
processes
environment
have any Conceptually, objects
in
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principle
the
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memory
of
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direct
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se
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oontact
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ther
with
by
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damage by
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processors
"outside
wall
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uncontrolled
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432 nor
world."
protects
I/O
1-1
iAPX
432
Interface
Processor
Architecture
Reference Manual
432
System/Peripheral
Figure
1-1
Memory
Subsystem
432
System and
432
Boundary
Peripheral
SljbSystems
1-2
In
a 432-based
inplt/out];Xlt
includes
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number number
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ied
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with
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changing
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responsibility
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for
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hardware and
cost
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is
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Processor
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432
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processor
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of
processing
to
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at
handling
least
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of
needs,
and
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l~level
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resources
requirements.
over
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standard
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to
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432
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packet
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bus
bus and
to
required
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one
processor,
the
application;
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independent
mainframe
device
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be
configured
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precisely
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8-
design,
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by
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nost
traditional
KEY
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ing
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processes
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access
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additionally
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enti
ties,
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driven
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integrity
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through
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432
windows. A window
in
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system
to
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of
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the
objects
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returned
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wall
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to
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to
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function
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producer
9
.,
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note
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enforce
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located
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messages between 432 system
in a Peripheral
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device
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file,
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function
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protected
way
system.
to
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facilities
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access
for
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in
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for
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device process. acknowledge
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very between Peripheral but
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with
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file
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out
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completion
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any
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device
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task
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is
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standard
process
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data
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requested
task
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operation
as
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mechanism
the
432
have
will
not
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432
any
device
requests
operation the
generates
to
a message
for
passing
architecture.
its
own message
be
directly
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interprocess
task
(see
I/O
service
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message and
input
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originating
to
posi
ti
messages
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facility,
compatible
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1-3).
data,
vel
y
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432
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Order
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containing
it
5.
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it,
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task
order
task
back
to
executes
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transfers
parameters
formulates result originating
of
process
accordingly
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data
reply
transfer
process.
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-V
according
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to
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1-5
iAPX
432
432
Interface
System
Processor
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Architecture
Reference
Subsystem
Manual
------------
Figure
1-3
Peripheral Subsystem
Interface
Device
Task
f
1-6
1-
3.
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processors,
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an
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or
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processors ( or
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processor,
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it
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hardware
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the
the
supports
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with
device
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one
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these
should
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to
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IP
/IP
may provide
pair
software
as
an
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the
task
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only
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in
the
consists
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432
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Figure 1-4
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Hardware
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provides
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figure
discussed
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the
and
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same way
memory,
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the
notion fetches flow
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instructions,
of
execution,
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functions
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running
system.
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1-4
shows,
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interface.
link
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as a GDP.
the
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interprocessor
redundancy
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within
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logical
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effectively
on
the
these
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next
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interface
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br
permits
connects
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in
checking.
logical
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provides
and
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processor
the
extend
logical
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section.
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idging
data
to
addition
other
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to
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to
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processor,
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instructions
arithmetic,
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by
providing
432
system.
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processor
are
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standard
buses,
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system
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able
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logic
data
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instruction
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operate
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the
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in
exactly
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needed
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data
paths
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processor
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system
the 432
and
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the
I/O
interface
that microprocessor well
as
the
component
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oonnected
memory
bytes Peripheral Peripheral
component;
long.
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range. The
IP
generally Processor Processor event
has software identify
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subsystem
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nature
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side,
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line
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as
references
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to
notify
status
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noted
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fts
information
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and
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memory
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below).
that
canponent.
signal.
its
Attached
attention.
a
iAPX
bus
addresses
passively
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within
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Interrupt
provided
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general
8-
or
architecture,
86
families.
as
if
it
up
within
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driven
its
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Interface
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Interface
handling
by
the
bus
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as
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were a
to
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by
address
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to
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To
sunmar interact the
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Processor Subsystem
access
to
432
ize,
with
interrupts
respoms
agents
432
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system
Processor
by means
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masters),
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Processor
of
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and
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address
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other
as
~
IP's
windows.
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Interface
references
Since
active
controllers,
Manual
Processor
generated
the
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obtain
PERIPHERAL
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this
manual
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system and 432
hardware controller. modification, collection operating
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approach
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ipheral
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inposes implementors
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intr
INTERFACE
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to
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00
Tb
tasks
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type
insic
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device
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system-wide conmunication I/O
controller
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synchronous form
of
parameters.
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between
application-defined.
procedure
calis,
SOFIWARE
interface
the
I/O
Processor
control
the
Subsystem.
constraints
simplify
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wish
as
of
organization
within
oommunication
task
nndel.
the
I/O
It
with
is
managed
controller.
and
uses
flay
on
of
the
software
to
consider
the
control
iRMX-80™,
the
I/O
by
software,
The
the
facilities
data
between
structure
organization
organizing
of
iRMX-88™,
supports
controller,
I/O
controller
of
a
multitasking asynchronous
similar
facility.
as
well
results
in
a
consistent,
Havever, corrmunication wi
controller
may
"messages"
also
am
be
being
device
~lemented
tasks,
passed
which
provided
the
432
the
I/O
and
it
as
a or to
Extending
thin
the
is
via
in
the
However
it
is
system through There windows,
are
am
three
fuoctions.
1-10
structured,
facilities
of
the
these
I/O
controller
provided
facilities:
by
interacts
the
Interface
execution
with
the
432
Processor.
environments,
The
Interface
within
the controller of
system
t~e,
obj
is
the
ects
am
represented
controlling
is
analogous environment and
conmunication
Processor
provides
432 system which
in
the
432
system.
objects
I/O
associated
software
to
that
controller
by a
processor
like
the
environment
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context
this
provides a standard
within
the
a
supports
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used
and
represented
obj
ects. object. creates
of a process framework
432
system.
process
the
addressing operation
environment
manipulated
in
432
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an
execution
running
for
is
embodied
by
the
memory
by
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the
environment
on a
addressing,
KEY
CXNCEP'IS
environment
of
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as a set
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IP
IP
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process
itself
and
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protection
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its
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an
selects
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Every Subsystem
Subsystem.
a
that
associated
transfer
is correspondence, Peripheral occupied system Subsystem obtains address object. address reference.
writing
Subsystem
by
the
memory
(e.
data
transfers
The
to
the
As
menory.
IP
suworts
the
environment
permits,
corresponding
If
function
error
on
is
with
of
data
performed
or
mapping, between a
memory
IP) and
(see
g • ,
from
action
system
far
the
data
figure
IP
the
from
of
object,
as
an
associated
the
it
multiple
for
example,
to
individual
an
error
behalf
confined
other
device
between
via
an
addresses
object
1-5).
controller)
the
Peripheral
IP,
in
is
transparent
is
concerned,
process
in
which a
the
environments.
establishment
device
occurs
of
to
the IP
while
one
the
tasks
432
the
device
associated are
system
window. A window
subrange
(within
of
system
When
reads
object;
an
the
type
agent
a windowed
writing
Subsystem
mapping
it
the
Peripheral
to
the
is
function
processes
IP
task
not
affected.
and a
of
range
data
in
into
to
agent
simply
is
of
separate
controller
of
process,
Peripheral
defines
consecutive
of
addresses
segment
the
Peripheral
address,
a windowed
the
windowed
Subsystem
making
reading
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in
the
in
to
I/O
be
the
is I/O and
a
432
it
the
or
1-11
iAPX
432
Interface
Processor
Architecture
Reference Manual
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Interface
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I
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432
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1-12
KEY
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the
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subranges
in
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the were
accessing
or
from
object
the
error
of
windCMs,
resources
that
are
in
to
to
transfer.
four
at
PS
buffer
The
access
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Peripheral
J:I.1A
controller
same
bus
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referenced
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obj
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object
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standpoint
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in
real-time
boundary
recovery
JOOst
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least
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to
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interleaved
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arbitration
memory.
ect
and
and
windCM
432
into
as
applications will some
until
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between
different
may
be
like
PS
an
of
memory
constraints
well.
memory, any
memory,
I/O
device.
"efficiency,"
to
directly
has
imposed by
the
432 Finally,
will
not
I/O
always
device
be
a windoo becomes
device
may
transfers
PS
memory
may
alter
be
objects.
and
may
be
For
example,
driving
transfers
constraints
an
object
"connect"
the
undesirable
system.
since
need
instantly
transfers
and 432
mapped
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1-15
iAPx 432
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EXAMPLE
To
illustrate
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In
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example,
implemented multitasking cornnunicate
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to
and
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mailbox
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task
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ports
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to
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operators.
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queued
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In
and
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432
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course,
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mailboxes
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specifically,
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line
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1-7
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1-17
iAPX
432
Interface
Processor
Architecture
Reference Manual
.Table
1-1
Item
SEND,/R:ErnIVE
P:t;int order_mailbaK
Print_response_mailbox
Pr
inter
Example Legend
Description
Object (message)
operation point
432
of
communications
convention
432
communicat
process
432
operators
fram
view (see
to
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ions
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1-19
iAPX
432
Interface
Processor
Text~
Architecture
Reference
Manual
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Figure 1-8
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1-20
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432
1-21
iAPX
1-5.
SUPPLEMENTARY
The
preceding
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interconnect
432
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locate
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1-23
This
chapter controller cannot, the
facilities available describe
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and
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out
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facilities
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provided
environments;
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management;
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CBJOCTS
as
the
I/O
section
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and
rnAPTER 2
AND
OPERA'lORS
it
appears
controller
broadly
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remaining
for:
to
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can,
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section
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recall co-operating
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chapter
processor.
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ties
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to
to
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systems
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through
Table
2-1
lists
implementation
these variances design
segments,
instruction
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the
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for
fetching.
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432
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handled
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s
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2-2
CI3JECrS
AND
OPERATORS
Table 2-1
IP/GOP Object Processor Object
Process
Obj Context Object Operand Stack Instruction Object
Table IkInain Port Carrier Storage Resource
Type
Definition
Communication Segment
Descriptor Refinement
Legend:
identical
similar
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differently
none
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System Object Comparison
IP
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similar
ect
similar similar none
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none identical identical identical identical none identical
identical Controller Controller
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conceptually
not
identical
identical
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similar,
than
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implement
object
are
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identical
implements
object
IP
OPERATORS
Table
to
unique
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of
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to
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or
execution
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interface,
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example,
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the
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vidual
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CBJECrS
AND
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Table 2-2
IP/GDP
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WINIXJW
AOCESS
RIGHTS
DEFINITIOO
Alter
Copy Access Deser
Null
Map
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Access
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Amplify Rights
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TYPE
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REF~
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AOCESS
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CEJECI'
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ict
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Type Type
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PATH
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INTERLOCK
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OPERATOR
and
Select
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OPERATORS
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Descriptor
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Type
Type
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with
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(Part 1 of
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IP
GDP+IP GOP+IP
GDP+IP GDP+IP
GOP
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GOP
GOl?
GDP+IP GOP
GOP GOP GOP
GOP+IP GDP+IP
GDP+IP GOP+IP GOP+IP GOP
similar GOP
GOP+IP GOP+IP
similar
GOP GOP
GOP
2)
2-5
iAPX
432
Interface
Processor
Architecture
Reference
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Table
ProcESS
2-2
Cl:H1UNICATICN Send Receive Conditional Conditional Surrogate Surrogate
Delay Read
PR)CESSOR
Send Broadcast
Read MOve MJve
BRANCH
CHARAcrER
SHORI' SIDRr ORDINAL
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OPERA'IDRS
ORDINAL
INT.EX;ER
OPERATORS OPERATORS
OPERATOR)
continued
IP/GOP
OPERA'IORS
Send
Receive Send Receive
Process
Clock fII
(X)[\MJNICATIGl
to
Processor
to
Processors
Processor
to
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fran
OPERATORS
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Status
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and
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GOP+IP GOP+IP GOP+IP
GOP*
GOP* GOP GOP GOP GOP GOP GOP GOP GOP
(Part 2 of
2)
Legend: GOP+IP
IP
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similar
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and
IP
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differently
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conceptually
than IP
operator,
operator,
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provides
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equivalent
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does does
i.dentical
not not
IP
implements interconnect
operator
access
2-6
2-
2.
CBJECl'
ADDRESSING
AND
GLCBAL
SIDRAGE
CBJECl'S
MANAGEMENT
AND
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432
original
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storage
length
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directed
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process.
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information
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used
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I/O
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type
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for
for
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descriptor
of
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descriptor
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required
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processor
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rust
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for
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432
just
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storage
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port
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as
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2-
3.
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The
IP
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context,
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oontext
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contain
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domain)
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instruction
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process
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same
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or
FOR
as a GOP
not
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or
operand
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bound
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environment
ENTER
GLCBAL
PROGRAM
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be
information
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to
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same program environment
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required.
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access
level
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danain
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required
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process
for
the
by
invoking
functions.
differently.
implemented
for
IP
domains
does
may
not
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by a process. object.
lifet~
the
ENTER
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but
the
a domain
do
not
fetch
used
Each
to
IP
of
the
ACCE'SS
2-7
iAPX
432
Interface
Processor
Architecture
Reference
Manual
2-4.
The IP
FACILITIES
offers
interprocess
the
DEIAY
scheduling not
required
per
formed
2-5.
The
POOCESSES
IP
performs
management.
I/O
oontroller
an
IP
function
Unlike
the contexts, lifetime. object. an
IP,
the
process.
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the
FUR
the
communication
operator
to
delay a process
by
an
by
the
I/O
AND
no
Multiple
software
is
to
GOP,
an
In
IP
fact,
where a
process
since
size
of a process's
ASYNCHRCNOUS
ls
same
not
set
as
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implemented. The DEIAY
from
IP
where
process
oontroller.
LOCAL
be
STORAGE
process
IP
process
nust
performed.
scheduling select
process
is
bound
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context
no
local
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of
operators
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scheduling
RESOURCE
MANAGEMENT
or
objects
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is
storage
context
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process
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sing
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refinement
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static
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and
local
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operator,
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storage
in
432 memory.
rornnent
of
dur
of
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IP
performed
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that
used
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resource
in
which
nultiple
ing
its
process
by
life
of
2-6.
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process to process specifies
PRCX:ESS
an
IP
software
scheduling
processor
selection
which self-dispatching, responsi.bility The
IP
does
is
performed
Consistent
process totally
2-7. The
F1-\CILITIES
IP
securely
indivi.sible
The
IP
offers
a
GOP.
not
by
with
scheduling
under
provides
managing
short
Canmun
asynchronously
SCHEOOLING
and
AND
in
the
dispatching.
I/O
object
index
process
a
for
multiplexing
field
is
strategy
maintain a process
the
I/O
controller.
432
philosophy,
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dispatching
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direction
FOR
ordinal
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icat
send
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ects:
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ions
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of
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ports
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controller
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process
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in
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routine
the
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IP's
selected.
in
various
clock.
the
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communications
communication
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messages
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function
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facility
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rrutual
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access
Entry
context
be
access
entered
global
provide
Accessibility
descriptor
segments,
the
such
(0
to
3)
descr
(0
to
iptor
16383)
access
standpoint
actually
2-3.
of
A
processor
any
its
object
entry
the
accessible.
descri1;>tor
segments,
object
be
traversed
the
particular
the
object
segment
access
into
segment 0
segment. An
into
one
access
segment"
access
object
of
the
is
located,
of
segment
of
several
432
the
desired
may
may
one
of
to
for
an
it
an
object, entry
and
the
access
the
432 system and
perspectives
(GOP
for
which
access
processor
is
not
object
be
part
by
following
access
be
made
of
the
descriptor
is
access
the
other
function.
all
the
object
references
two
access
descriptor
or
IP)
it
lists.
can
currently
of
directly
reuseable
always
segment
three
Together,
objects
is
in
one
is
values
segment
within
the
Peripheral
on
accessibility
in
the
432 system
holds
In
an
addition,
manipulate
in
one
may
be
indirectly
a complex
the
appropr
for
the
accessible
entry
reserved
of
access
these
which a
of
t.he dir.ectly must be
in
which
the
access
by
obj
ects
of
the
object
iate
object
by
access
for
the
process
lists
by
two
context
An
AP
has a different
432
data
When
a window operators must
issues the
reference
a
segment.
accessible
2-10
through
is
to
modify
function
for
the
view
of
IP windows which
open,
data
request
When
AP,
the
AP
the
information
in
a segment which
to
the
the
data
IP
accessibility.
are
opened
can
use
its
through
is
the
IP
to
segment
interrupts
The
onto native the
indirectly
traverse
has
the
AP.
AP
can
432
data
winnow.
an
access
been
only
data
access
segments.
manipulation
When
the
accessible,
path
made
direct]~
AP
it to
CEJECrS
AND
OPERATORS
.
Directly o
access
o
data
Indirectly
o
Information, path descriptors
Directly
Table
Accessible
descriptors
Accessible
data
manipllation
using
Viewpoint
(Controlling
Accessible
2-3
Direct/lndirect
Viewpoint
432
Infor.mation
All Access
All
Access Segments.
432
InfoLmation
or
(i.e.
the
Enter
of
an
IP
operating
432
Information
of
IP/GDP
access
Segments.
objects
access
access,
by
Access
AP
in
Accessibility
in
432 System
descriptors of
type
descriptors
which
can
following
Segment
Peripheral
in
logical
in
data
be
a
segment
in
the
reached
chain
function).
Subsystem
reference
the
four
Entry
referenced
four
via of
Entry
access access
mode)
o
access
o
data
Indirectly
o
Objects
the
IP
objects
function
o Access·
never
manipulated
o
Information,
path
descriptors the
IP
indirection
descriptors
descriptors
Accessible
of
type
rut
which have
can
be made
request
which
descriptors
be made
via
the
data
manipulation
using
function
are
and
the
tmE,
infor.mation.
all
objects
windCM
~lies
the
IP.
432
Information
data
segment which
not
directly
opens a windCM
in
the
directly
IP
function
or
access,
(i.
e.
the
Enter
request
involved,
use
of
the
AP
of
is
currently
the
object
been
mapped.
accessible
Entry
accessible
request
which
by
following
Access
facili
ty)
traversing
the
IP
function
cannot
type
data
is
are
through
to
the
directly
segment
opened.
directly
directly
by
object.
alter
for
Note,
accessible
accessible
a window.
issuing
which a
Access Segments. These
to
the
AP
but
can
facility.
can
be
Segment
Note the
reached
a
chain
function
that
path
request
via
of
provided
two
levels
of
facility.
access
this
to
to
These
an
IP
can
be
access access
by
of
access
2-11
iAPx
432
Interface
Processor
Architecture
Reference
Manual
Object
An
Selectors
object
descriptor
object
selector
fields:
1.
2. The
An
object access can
Enter
The
descriptors
potentially
ing
instruction software 1,
2,
or
o An o
selector
contained
identifies
in
oonsists
The low
entry and
are
order
access
(xiled
two segment as
00 -Entry 01 -Entry 10 -Entry 11 -Entry
high
specified
selector
order
entry
allows
from each
reference
an Access Segment
ENTER
to
enter
3.
ENTER
access
into
An
unsigned
access
EASl,
a
given
AOCESS
descr
EAS2,
integer
segment, which must
an
one
of
the
of a double
bits
of
holds
object
four
byte
the
the
by
entry
quantity
object
desired
specifying
access
composed
selector
access
an
access
segments. The
of
specify
descr
which
iptor
follows: Access Segment 0 (Context Access Segment) Access Segment 1 Access Segment 2 Access Segment 3
14
bits
access
65,536
ACCESS
access
SEGmNT
iptor
or
EAS3,
represent
segment.
access
of
the 4 entry
16
(2
SEGmNT
segment
requires
for
the
and
value
designating
be
to
objects
)
access
1,
a
any
access
allows
into two
2,
or
scaled
of
index
the
segments.
directly.
the
I/O
Entry
Access Segment
operands:
segment
the
destination
3.
16,384
oontroller
to
be
i.nto
entered
entry
two
the
~ntering
Each accessible
IP
the
process
to function. I/O
controller
I/O
oontroller
entry
access
2-12
Global
Access Segment
maintains
the
I/O
Imnediate
to
gain
needs
segments
a
controller
entry
of
access
only
is
to
tq
be used
global
via
the
to
specify
access
the
global
the
when
segment which
ENTER
access
set
of
which
of
requesting
GLCBAL
segment
process
the
this
ACCESS
globals.
three
function.
is
always
SEGMENT
allows
The
available
an
The
Interface
Subsystem
in
the windCM prevent data object
basis operations operations
All
IP
across
with
432
can
the
and
corruption
must
for
the
are
windows
the
supplied
characteristics
attributes
the
windCM function. transfer
that
The second
through a windCM
attributes.
Processor
protected
system.
be
used
possible
be
of
base
432
protection
described
are
sfmilar
subsystem
corrmon
define
:i.s
opened
windCM access
There
to
are
access
manipulation
of
the
protection
type
data
system,
by
the
IP
in
the
next
in
that
boundary;
to
all
windows. The
windCMs;
with
the
section
that
has
mechanism to
the
five
one
of
(single
access
provides
contents
windows,
descriptors
mechanisms,
segment. Access
may
he
function
request
chapter.
they
support
this
chapter
first
these
ALTER
descrlbes
been
are
MAP
AND
the
defined
gener.ally
the
of
objects
labeled
segment)
the
descr.iptors,
manipulated
facil:i.ty.
the
transfer
first
describes
section
specified
SELECl'
operation
with a given
Per
0-4.
object.
as
ordinary windCMed
only
covers
MTA
of
ipheral located
Each
To
the
by
IP
These
of
~ata
the the
when
SEG1ENT
a
data
set
of
Three
after
WindCM
1
and control
may
of
the
0
may
be
opened
thus
window--is
Interface
Throughout described. Processor handling
facilities
the
windCMs
basic
be
used
onto
provide
Processor
this
When
chapter
any
detects
have
properties
to
perform
the
processor-memory
access
dedicated function
conditions
of
these
a
fault.
are
covered
special
of
high
to
interconnect
to
facility;
conditions
The
!pI
in
capabili
all
windows have
speed
providing
this
for
correct
s
fault
chapter
ties;
block
interconnect
objects.
the
data
is
covered
use
are
violated,
detection,
6.
these
are
been
transfers.
address
Window
path
in
chapter
of
windCMs
the
reporting
covered
descr
ibed
WindCM
space
4-the
for
Interface
II
the
4. are and
3-1
iAPX
432
Interface
Processor
Architecture
Reference
Manual
3-1.
WINJX)W
Each window given
rnanent; attributes qualification. from
values
qualification Processor
Processor
qualification
responds
interprocessor qualification during
be
desired
made
system
to
values
initialization. Having
the SEGiENr may
fixed
reenter
irx::luding processor J'l'k:X1e"
entered
attributes
function.
not
be
once
physical
itself.
object
IPC
to
interprocessor
ATl'RIBUl'ES
has a set
these
of
all
The
recorded
closes
of
are
sumnarized
five
attributes
in
windows
is
to
a
"suspem
attributes
windows
of
the
0-3.
performed
communication (IPC). The
:implicitly
initialization
cane'
in
up
the
logical
of
windows
Unlike
altered
logical
mode
Any
with
all
processors
in
with
processor
reference
during
node
by
processor
broadcast
response
(see
any
0-3
the
normal
is
entered.
a
in
set
object
mode,·
with
other
special
with
rights
the
message.
in
the
which
table
when
control
define
3-1.
it
processor
explicitly
am
fully
IP
to
the
startup
appendix
of
the
the
E). attributes image
that
I/O
AL'lER
windows, window
execution;
The
IP
IPC
fran
an
access
can
sem
432
system.
its
The
performs
windcw
object.
when
requalify
performs
IPC
Thus,
by
is
controller
MAP
AND
4'
its
attributes
can
be
a 432
descriptor
the
"enter
GDPs
state
IP
sets
processor
are
obtained
Processor
the
Interface
processor"
processor
it
receives
window 4
encoding
loaded
can
during
change
SELECl'
s
attributes
conmanded
processor,
physical
ignore
at
the
may
the
DATA
are
for
this
a
to
a
WINOOW
STATUS
A window must window
the attributes
A
closed
may
the
memory When
fault the the through 432 43203 state the
establishes
Peripheral
provide
window
be
closed
attributes
(see
OVERLAY
a window
information
affected
faulted
the
window though no
system
(see
Interface
is
entered
presence
be
~
an
Subsystem and
further
is
inacti
to
prevent
of
a window.
in
detects
describing
window
state
to
the
the
description
Processor
to
allow
of
a window
for
active
mapping
ve,
further
this
a
fault,
the
IPwill
DMA-type
fault.
it
to
be
used
mapping between a
an
object
information.
and
has
no
other
Closing
section)
the
faulted
access
the
circumstance,
state,
to
a window which
enables
IP
continue
data
Data
will
of
Sheet,
actually
XACK/
Order
controllers
.
to
transfer
in
the
attr
an
obj
access
records
and
interrupts
to
acknowledge
am
NAK/
Number
set
of
432
ibutes.
ect,
to
in
432 menory
changes
be
nnved
in
to
proceed
data.
An
addresses
system;
A window
or
to
overlays
the
PS
the
state
the
transfers
to/from
the
Intel
171874). safely
open
in
other
change
PS
memory.
the
of
AP.
In
the
iAPX
This
in
1-'
Table
3-1
Window
Attribute
Summary Attribute Window Subr ange Base Subrange Obj Base
Status
Address
Size
ect
Reference
Displacement Displacement
Description Window Start
Length
Obj
object
Direction
Read/write
object.
this
requested the attribute been
Transfer M:x1e
Status
Transfer
Window Window Window
is
of
of
ect
Selector
attribute
window
granted.
0:
1 :
2-4:
open/closed/faulted
windowed
windowed
When
by
is
in
progress/terminated/faulted
random/block
subr
ange
subrange
for
windowed 432
in
bytes
permission
the
window
is
the
I/O has the
been
permission
in
in
into
windowed 432
for
is
being
the
controller.
opened
node
memory/interconnect
always
in
randan
node
the
PS
the
PS
obj
ect
windowed
opened
perm1ss1on
After
this
that
has
mode
Overlay
Block Byte
Note:
lobde
Attribute
Count Count
In
block window 0 windowed
transfer
Windowed
metrory
Description
transfer
specifies
object
will
begin.
of
transferred
mode,
the
fran
subrange
(applies
the
number
minus
the
initial
which
does/does
only
to
of
one.
base
displacement
address
consecutive
not
overlay
window
bytes
to
within information
0)
be
of
the
3-3
iAPX 432
Interface
Processor.
Architecture
Reference
Manual
SUBRANGE
BASE AIDRESS
A windCM's
subrange Peripheral windCM.
addr.ess
in a subrange
system. A
PS
subrange
025
a random
through
is
used
as
64K
i.n higher
object,
Note
in
bytes.
length,
}?a'1er
if
that subrange provides
windCMed
object
to
behaving object. object
object,
size.
Any atterrtr.?t
will
subrange
size,
SUbsystem
A
Per
is
~e
2'
block
When
the
of
access
the
size
and
the
access
The
as
cause
AND
is
in
bytes.
ipheral
defined
window
(i.e.,
mode
the
subrange
2. The to
the
of
size
to
432
regardless
IP's
though
the
IP
SUBRANGE
defined
The
memory
Subsystem
accesses
in
terms
may
1
through
it
may
sequentially
target
will
subrange
full
extent
the
window
of
theobject.
system
of
protection
it
is
exactly
to
access
to
generate a fault.
SIZE
by
a
subrange
subra~
addresses
bus
the
corresponding
of
powers
be
specified
32k
object
is
normally
may
also
of
the
is
the
rnennry beyond
the
relationship
system
the
locations
is
that
master
of
as
bytes).
access
not
be
specified.
be
smaller
object
lesser That
restricts
same
beyond
base
the
contiguous
are
that
object
2. The any power
an
an
i.ntegral
is
of
is,
the
of
subrange
a
size
the
address
set
mapped by
references
in
the" 432
subrange
of When object
wlndCM
as
power
as
the
than not
the
the
required.
size
a window
extent
of
size
larger
as
the
suhrange
windowed
extent
and a
of
the
an
size
2 from
0
large
of
2
next
target
of
the
never
the
to
of
an
A
subrange' s base
the
beginning base Given a
2
suhrange
be
expressed The
address
n
byte
expressed
following
o no
subrange
boundary.
must
in
subr
may'include
o
all
subranges
of
addresses
occupies
address
of
the
bears
a
2n bytes
be
evenly
as:
binary,
must
cnnstraints
anges
may
the
must
(up
in
the
is
IP's
64K
definite
For
example,
divisible
the
base
contain
apply
overlap,
same
Pertpheral.Subsystem
"fit"
to
64Kl
Peripheral
specified
byte
relationship
long,
its
by
address
at
to
all
i.
e.
within
that
Subsystem
as
an
offset
range
the
4K.
in
base
base
This
of
the
PS. The
to
the
subrange's
address
address
relationship
a 2n byte
least n low-order
active
no
two
subranges
subranges:
address
the
range
the
IP
memory
space.
in
must
zero
bytes
from
subrange
size.
be
on a
of
a
may
also
subrange, bits.
4K
3-4
WINOOWS
<l3JECI'
An open window's
is
432
memory,
base multi-segment No whether wirrlow
be
When
inaccessible object's
set
REFERENCE
converted
object.
am
type
by
Each open
each
data
objects
more
allowed
than
there
is
one window
are
opened
access
a window
to
object
when a window
however, remain
references
access example, controller
(which alternate lock I/O
fields.
controller
reference
the
object
for
to
an
object,
if
the
can
observe
convention,
for
as
a message back
it.
use
For it
object
the
obj
segment
IP
ect
to
reference
into
IP
window must
must
(functions
gain
can
multiple
on a refinement
to
the
base
is
opened other descriptor;
is
on
IPs
by
the
opened on a
accessible
If
the
Peripheral
it
must
object
the
has
the
LOCK convention) might
been
<l3JECI'
be
example, a
could
to
agree
another
process,
to
an
begins
access
as
descriptor
map a different
be
represented
may
access
to
their
be opened on an
IP' s in
object
an
setting
I/O
the
of
an
or
any
object,
the
lock
system.
object
refinement
the
I/O
bit
refinement.
to
GOP
processes
Subsystem
do
so
by
means
defined
with a lock
function
used
GOP
not
from
process
to
for
access
accessing
objects
sending
until
the
GOP
process.
an
object
for
selector the
object
as a sing
be
used
Ie
to
individual
object,
regardless
Even
no
other
of
IP
makes
lock
in
the
The
bit
base
holding
requires
of a convention.
field,
to
the
the
prevent
which
object,
I/O
GOP
the
object.
do
an
obj
controller
windowed
in
segment
manipulate
segments).
if
one
window
the
object.
the
object
in
the
object
obj
ect
object
exclusive
the
processes
not
contain
ect
to
or
pass
sends
and 432
of
of
IP
will
base
is
may,
For
IP
An
the
a
The
IP
supports
to
the
minimum
Therefore,
for
which an access a 432 need
environment.
processor
to
be
the
set
the
I/O
access
will
transferred
432
philosophy
of
objects
controller
descriptor Typically, contain
or
accessed.
can
exists
an
access
that
software
needed
only
open a winda-l on an
within
I/O
service
descriptors
to
should
perform
a
current
request
for
have
its
function.
context's
message from
the
objects
access
object
that
3-5
iAPX
DIRECl'ICN The
direction
read,
When
written,
the
attribute
The
access
to,
or
reference.
object
read, to
or
read
may
and
432
Interface
attribute
both
window
with
the
rights
logically
For example,
be
read,
neither
write
specifies
read
is
opened access
requested
less
then
read
nor
the
object
Processor
and
written,
the
rights
in
the
than,
if
the
write~
the
the
permi.ssable
would
Architecture
whether
or
IP
checks
granted
direction
rights
object
reference
requesting
be
illegal.
Reference
the
windowed
neither
the
requested
by
the
attribute
granted
di.rection
the
ability
Manual
object
read
nor
object
must be
by
the
indicates
attributes
to
may
be
written.
direction
reference.
equal
object
t~at
the are
write,
or
Orx::e
a window has been subsequent the
direction
(The
IP's
attenpted.
reading
not
TRANSFER
An open
The
for
active
with
be
able
window
o
transfer
o
transfer
o
transfer transfer
o
IP
controller
"in
window,
STATUS
progress".
fault". transfer
normally
mode with
transfer
window 0 block
3-3.
successfully
subrange
attribute,
read/write
)
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the
to
write
may
it
address
line
perroi
ts
assurance
into
take
one
in
progress~
terminated terminated
termination
will
will
open a winnow
If
the
change
reference
otherwise
identifies
the
IP
that
a mis-programmed
it.
of
four
by
fault~
by
count
forced~
IP
detects
the
controller
status
A randan node window which
status
since
of
there
is
finished.
"in
is
IOOde
progress"
no means
The remaining
transfers
is
for
only
opened,
to
insure
an
active
the
states:
runout~
(block
with
a
(block
mode
the
fault
attribute
is
closed considered an
IP
to
two
and
are
-
the
IP
that
it
window
type
to
of
open a window
DMA
controller
mode
only) •
status
asscx::iated
to
"terminated
(set
invalid)
to
have
predict
states
are
described
checks
conforms
fault
access
every
to
occurs.
being
for
will
only)
attribute
with
with
set
an
by
a
terminated
when a randan
associated
in
section
TRANSFER
Windows
by
setting
may
be
transfers 3-
3.
Window
this
is
3-6
MJDE
0 and 1 have
the
mode
opened
of
described
in
block
contiguous
1
may
in
al
ternate
attribute
TOC>de,
blocks
be opened
section
transfer
when
the
which permi
of
data~
onto
3-4.
the
The
nn:1es
window this
that
is
ts
buffered
is
described
i.nterconnect
transfer
mode
may
opened.
address
attribute
be
selected
Window
high
in
speed
section
space
has
0
~
00
meaning system 3-2.
a
OVERIAY
Attempting
fault.
for
memory
windows
only;
to
the set
2-4,
random
the
transfer
which suWOrt
transfer
mode
mode
random
is
of
windows
transfers
described
2-4
in
will
to
432
section
cause
Sane
limi
memory
may
memory.
IP references re-enables that addresses, fall
Figure of
addresses
Peripheral
ted
address
space
elect
for
to
co-Iocate
If a window
will
inhibit
in
the
the memory
subrange. Thus,
memory
in
the
subrange
3-1
illustrates
memory
and an in
the
Subsystems
spaces) may
exclusive
the
subrange. Closing a
will
of a window
Interface
Peripheral subrange base address opened
falling co-Iocated select
The asserts overlaid Sheet,
the
with
in
the
overlay
when
subrange. (See
Order
overlay
the
the
subrange
memory.
memory
facility
it
No.
facility
overlay
Any
rather
recognizes an 171874,
slows IP response time somewhat.
(e.g.,
not
use
as
all
or
part
is
then
opened
co-located
to
respond
when
the
respond
IP
to
open
a
hypothetical
Processor both occupy a
Subsystem
of
32K
and a subrange
attribute
will
cause
address
than
the
is
~lemented
address
the
iAPX
for a description
those
be
able
IP
window
of
the
with
memory
window
to
subsequent
and
PS
all
references
with
configuration
memory
set.
the
IP
reference
IP.
by
an
43203
based on
to
dedicate
processors
a block subranges. Such systems IP'
s range
the
over
fran
responding
that
address
merrory
the
both
overlay
space. A
size
Any
to
respond
outside
inhibit
reference
Interface
of
this
lay
except
address
signal
with
attr
overlaid
references
occupy
attribute.
in
which a bank
64K
byte
window
of
4K
rather
the
subrange
that
that
falls
Processor
signal).
ibute,
to
those
has been
reference
with
real
memory menory
the
same that
block
with
than
will
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in
Data
Use
of
PS
the
in
of
a
the
IP an
of
Note unnecessarily.
specifying undefined
is
that
00
co-located
opening a
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overlay
result
subsequent address
window
memory
the
when
when
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reference
with
other
is
the
overlay
safe,
but
hand, opening a
is
co-Iocated
components attempt
that
falls
in
attribute
it memory
the
overlaid
set
when
there
slows IP response
window
will
to
respond
without
produce an
to
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Figure
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3-8
3-
2.
W1NIXM
WINOOWS
OPERATI(l\J
This
that
discussion
section
falls
into
covers memory-based objects
ADDRESS
The
references
presented
and
RECDGNITI(l\J
Interface
on
function
that
open windows.
recognizes address reference
CCNSISrrENCY Given
for
that
consistency series by a
GOP
Although
to
perform
does
of
the
and
CHID<
it
these
when
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same
descr
the
objects;
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fall
the
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reference
not
fall
does
has
not
recognized
before
checks
an
instruction
are
described
of
the
ibes
windowed
random
the
requests
into
an
into
respond.
performing
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checks
the
IP' s response
mode
special
are
m:mitors
its
Subsystem
address
and
responds
an
active
an
are
attempts
here
in
to
subrange
of
transfers
cases
covered
all
range.
falls
of
block
in
subsequent
Peripheral
It
bus
to
into
as
described
subrange,
address
the
equivalent
reference,
actual
to
to
access
as a sequence,
parallel.
an
address
an
open
to
and from
mode,
Subsystem
compares
the
a
subrange,
the
transfer.
the
steps
data
the
reference
windGl. The
interconnect
sections.
each
subranges
belOil. IP
ignores
the
IP
checks
There
carried
in
an
hardware
ordinary
address address
of
all
the
If
IP the the
it
is
out
obj
ect.
is
able
a
The
IP
insures
read/write attribute. the
position
address
of difference displacement less physical than bounds table.) does
than
the
error
not
or
base
largest
If
constraints performed. objects
are
that
line)
The
IP
of
the
the
PS
between
(see
equal
address
would
any
of
perform
which
Several
shown
the
is
computes
item
subrange.
the
Figure
to
and
physical
indicate
these
the
the
examples
in
Figure
transfer
consistent
the
(byte
length
3-2).
the
visible the 432 menory
erroneous
checks
transfer.
IP
applies
3-3.
direction
with
PS
transfer
or
double-byte)
The
visible
of
The
transfer
obj
transfer
fails,
Figure
when
of
valid
(as
the
displacement,
object
the
object
displacement
ect
length.
displacement
address
information
the
IP
3-2
the
consistency
mappings
indicated
windOil's
relative
length
am
The
(224_1).
in
detects
illustrates
of
direction
to
its
sum
rust
(A
the
a
fault
window
by
that
the
is
rust
of
be
rremory
object
check
its is,
base
the
base
be
the
less
and the
is
onto
3-9
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iAPX
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Displacement
1
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Interface
Transfer
Processor
Architecture
Reference Manual
432
ADDRESS SPACE
Adjusted Object Lenqth
LENGTH
1
o Adjusted
Visible
o
Count)
o
Visible
Subrange
o
Physical
o During block
oount must
o
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for
block
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Size)
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be
Displacement must
Base Address +
Figure
Initial
mode
operation.
for
randan
transfers
less
Constraints
3-2 Subrange/Window
in
than
Computations
Minimum
Minimum
mode
logical
the
Visible
During Data
be
less
Transfer
(Adjusted Object Length, Byte
(Adjusted Object Length,
operation.
mode
Displacement must
Attributes
(window 0 only),
Object Length.
Transfer
than
the
Visible
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be
less
Mode)
the
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than
3-10
IP
WINDOW
MAPPED
432
OBJECT
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Figure
--
PORTION
PORTION
3-3
OF
OBJECT
OF
WINDOW
Valid
INACCESSIBLE
INACCESSIBLE
Window/Object Mapping
TO
TO
IP
AP
3-11
3-
3.
LAPX
432
RANOOM
Interface
mOE
DATA
Processor
TRANSFER
Architecture
Reference
Manual
Given
checks,
that
the
an
IP
finishes
IP
address
menory oomponent would, operation,
It
follCMS from
computation corresponding windowed double-byte
subr
ange.
address displacement
bus
cycle will byte
return
in double-byte double-byte di.splacement byte
from
transfer,
bounds
Random node
successive
read
or Figure different
wr i ting
and
placing
that
relative
object.
is
identical
For
example, assume a
4096 mapped
of
that
decodes
the
the
object.
into
from
of
lccation
since
of
the
object.
is
references
written
3-4,
Random
address
in
random mode.
data
the
preceding
random
That
onto
O.
If a Peripheral
object
If
location
the
four.
4197",
the
subrange
so-called
to
(assuming
~e
references
reference
the
Peripheral
accepting
on
mode
locations
is,
the
within
a 432
as
"read
byte
whose
a
subsequent
4100" ,
bus
If
the
and
another
IP
because
a windowed
validitv
Transfers,
when a window
has
Subsystem
data
the
bus
in a read
discussion
transfers
of
the
displacement
the
windowed
PS
subr
object
100
Subsystem
one
byte
displacement
bus
then
write
will
bus
it
cycle
fault
transfer
no
order
subrange.
checks
illustrates
passed
the
bus
from
the
bus
operation.
of
transfer
are
windowed
always between
subrange
of a transferred
ange
from
cycle
the
into
object
of
bytes
bus
location
and
128
long
master
is
zero,
indicates
IP
will
the
attempts
and
will
displacement
ing
is
Any
location
are
passed)
is
opened
consistency
cycle
just
in
displacement
the
windowed
bytes
with
initiates
4096",
the
"write
accept
object
to
"read
not
perform
exceeds
implied
at
any
the
for
effect
reading
as
a
wr i te
and
the
byte
or
at
base
a
base
the
IP
first
at
one the the
between
may
be
time.
of
and
a
a
a a a
A window opened
segment SELECr close
with
MTA
the
window and
a
SEXNENl'.
3-12
in
random node
single
When
then
invocation
executing
reopen
may
of
it
be
the
this
on
remapped
IP function
the
newly
onto a new
function
the
select
ALTER
IP
will
data
432
data
MAP
AND
first
segment.
41
03
...
....
4096
Legend
Windot'-1ed
Subrange
-..,
- -
......
3
1
2
-
-
-
-
Byte
-
-
-
-
disP1acement~
-
-
I
(7)
(6)
(5)
(4
(
(2)
(1) (0)
-
Windowed
Object
)
3)
Reference Subrange
Reference
Object
Byte
Sequence:
Address
Operation:
Accessed
Figure
Referenced:
(disp.)
3-4
4'99
Read
Random
G)
Byte
3
Mode
<Y
4'97
Write
1
Transfers
Byte
Read
G)
4102
Double-byte
6,7
3-13
iAPX
432
Interface
Processor
Architecture
Reference
Manual
3-4.
BIOCK
Window 0 can
allows
the
instructions
~
controllers,
references large example,
one-byte
IP's
range
While
block blocks mode.
attribute access
mode
also block opened,
BLOCK
MJlE
Window
applicable specif
at
anount
the
or
available
of
data,
When
can
directions
implies
of
data
and
ATl'RIBUTES
0
has
only
ies
the window. The value
(a
represents
byte
count
transferred)
However,
the displacement target
object.
MJDE
be
MTA
opened
Peripheral
(e.g.
iAPx 86 str:i.ng
which
high
full
of
speed.
data
content
double-byte
for
mode
is
well-suited
it
provides
window 0
specify
requires
serial
to
be
the
whole
an
additional
when
size
value
The IP
plus
one
of
the
of
of
less
0
byte
checks
TRANSFER
in
random
Subsystem
are
capable Block
through
of
PS
subr
use
with
is
opened
reading
closing addressing
read
block
it
is
the
or
is
opened
block
this
than
indicates
count
to
byte
count
m::Xie
of
mode
a
small
any
object
ange.
random
for
less
addressing
or
writing,
and
written
transferred
attribute,
that
attribute
the
number
that
is
independent
insure
does
or
in
to
take
operations)
generating
also
oermits
PS
may
be
This
the
in
is
in
helps
mode
high
block
but
re-opening
of
the
defined
in
block
is
to
may
range
of
a
one-byte
that
not
exceed
block
mode. Block mode
advantage
and
consecutive
the
address
transferred
to
keep
windows.
speed
transfer
flexibility
mode,
not
roth.
the
windowed
when
sequence.
~
count,
IOOde.
be
rroved
from
bytes
to
block
of
the
the
sum
the
of
devices
transfer
subrange.
ITOre
than
the
window.
object.
the
The
byte
through
0-65,535:
be
transferred
subrange
of length
software
such
address
of
through
of
of
large
random
direction
To
change
Block
windCM
which
count
is
to
size.
the
base
of
as
a
For
a
the
The
is
is
the the
be
the
The
base relative indicates
object.
refinement
3-14
displacement
to
the
beginning
that
The
of
base
the
the
displacement
object.
attribute
of
block
the
starts
and
locates
windowed
at
byte
the
the
count
first
object.
lowest
essentially
byte
A
value
address
of
the
of
of
define
block
zero
the
a
WINOOWS
BLOCK
Since
transfer
most
The
BI.D:K
From
transfer fast
mode. The
transfer
controller.
sub to
MODE
the
of
only
moE
the
menory,
range, the
type
CCNSIS'lENCY
byte
from
the
required
checks
OPERATICN
p::>int
proceeds
IP
activity
When
the
of acknowledgement that
the
data The mode
IP
achieve
high
transfer
to
optimize Interface to
Peripheral
utilization
employs an
speed block
the
Processor
of
count
the
perspective
made
of
much
the
IP
acts
being
an
IP
accepts
PS
bus
of
has
actually
is
predefined
transfer
Subsystem
the
432
CHEr!K
and
base
consistency
displacement of
the
checks
during a transfer
view
of
like
a randan
provides
the
Per
much
as a passive
address
cycle.
a
write
on-chip
driven
or
been
by an
reference
supplies a byte
Note,
operation
written
first-in-first-out
transfers
window
using
buffers
block
the
mode
transfer
processor
packet
432
are
ipheral
transfer,
better
agent
active
however,
does into
in
buffered
D's
FIFO
transfers
requests
bus.
effectively
object,
when
the
direction
Subsystem
except
response
on
the
PS
falls
or
double-byte
that
not
the
windowed
moae:--8ince a block
attributes,
hardware
and
predefine
the
IP
can perform
window
and
is
byte
bus,
that,
time
PS
bus,
all
processor
within
in
window
block
neccessarily
object.
(FIFO)
the
buffer
IP
assistance.
to
improve
to
reduce
the
opened. count.
a
block
like
in
a block block
or
u.1A
D's
according
mode,
IP
imply
to
is
able
The
response
its
In a block
eight-~yte
processor buffer
requested
enough
In
free
a
double-bytes
internally. IP
post-stores
single
processor
packet
and
by
block
read
block
supplies
Peripheral
space,
from
When
operation,
of
rus
the
mode
the
the
an
eight-byte
packet
the
data
from
transaction.
bytes
or
Subsystem
IP
prefetches
write
operation,
Peripheral
buffer
bus
accumulates more
operation.
Interface
the
It
holds
Processor
windowed
the
double-bytes
ooscycles.
another
block.
the
Subsystem bus and
block
in
the
object
block
from
When
IP
accepts
than
eight
windowed
pre-fetches
in
one
in
an
internal
the
buffer
the
buffer
bytes
buffers
bytes,
object
an
432
as
has
or
them
the
in
a
3-15
iAPX
432
Interface
Processor
Architecture
Reference
Manual
Canpleting
byte
count
MAP
AND
SELECl'
"force
FIFO
AND
termination"
to
432 menory. Then,
SELECI'
window 0
block
mode generate window.
When
attribute,
will
BLOCK
A been occur.
and
be
short
moE
block
node
transferred,
In
issues Following of
window 0
state.
be
In
acknowledged
transferred.
continuing
faul
ted
wimow
a
block
is a two-step
DATA
DATA
invalid
a
the
SEG1EN.I'
winda-t
fault,
the
IP
if
the
(close
without
interrupt
transfer
autanatically
TERMINATICN
transfer
or
both
an
interrupt
cases,
termination,
will
the
cause
error
(negatively)
This
to
transfer
cannot
node
write
process.
SEGmNI'
function
on window
the
FUNcrICN
the
first -forcing
transfer
will
it
may
the
IP
request
any
address
the
state,
prevents
data
be
re-used
transfer
First,
o.
This
AP
must
with
window).
the
AP,
length
takes
size
is
terminate
terminate
updates
to
reference
windCM
requests
by
the
a
DMA
after
a
until
which
the
AP
with
the
entry
causes
issue
an
If
an
entry
the
AP
termination,
and
preserve
is
the
same
care
of
the
not a multiple
oormally
prematurely
the
transfer
notify
the
falling
to
for
fault
data
IP,
and
transfer
but
controller,
fault
it
is
has
closed
is
shorter
must
issue
state
the
IP
additional
state
operand
attempts
the
as
the
last
of
when
all
should
status
Attached
in
enter
00
data
for
example,
than
an
operand
to
empty
ALTER
to
the
block byte
block
eight.
bytes
attribute
Processor.
the
subrange
the
will
will
ALTER
to
close
IP
count which
a
fault
error
be
the
its
MAP
set
will nOOe
have
will
fran
been det;.ected. The
and
re-opened.
to
a
be
The
IP
tracks
on-chip
count each
byte
attribute
byte
decremented
operation
The
IP
will
fault
itself
This
function
during
force
is
done
with
forced."
of
any
the
requalify
physical
node".
the
oounter.
when
transferred.
fran
is
terminated
zero)
terminate
the
transfer.
termination
by
executing
the
Finally,
inter
termination
processor
processor",
progress
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the
window
When
all
normally.
a
block
before
transfer
conmunication
"close
of
a
IP
sets
is
the
bytes
transfer
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addition,
the
an
ALTER
status
may
windows",
block
this
transfer
counter
by
equal
opened and decrements
on-chip
have
transfer MAP
attribute
be
forced
counter
been
transferred
prematurely
the
I/O
has
AND
SELECr set
by
the
underflows
if
controller
been to
IP's
messages "suspend and
or
"close
windows
means
to
the
it
of
byte
with
and
it
detects
completed.
DATA
SEGMENT
"termination
receipt
fully
am
enter
an
(is
the
a
may
of
3-16
WINOOWS
BLOCK
As mentioned
displacement on-chip displacement gives Peripheral
In
transfer through a address and addresses
MODE
rise
swept
l6-bit
ADDRESS
earlier, of a transf€r
displacement
is
to
two
Subsystem
addressing,
operation
block
of
references
Peripheral
swept
is
sub range must be
transferred. mode
write
In
source/sink
repeatedly For a
acts a bytes)
read
as a data
data
sink.
of
conserves
requires
IP's
byte
setting
range
or
Cbuble-~te
transfer
shows hoo
Figure
operation.
addresses
operation,
source;
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data
"subrange
available
in
block
source
ING
in a block
counter.
independent
addressing
in
block
the
Peripheral-Subsystem
"sweeps" addresses will
be
Subsystem
equal
at
bo
least
3-5
addressing,
a
single
this
for a write
permitting
through a
space."
up a
for of
mode
32K
concurrent
the
using
addressing
mode
inbo
the
Unlike
of
the
techniques
mode: swept
serially
in
the
n,
n+l,
buses
the
number
as
illustrates
the
location
single
the
transfer
single
To
transfer
byte
subrange,
range
source/sink
works
in a block
transfer
windowed
the
object random mode, subrange
that
and
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displacement. may
source/sink.
bus
master
100
addresses
windowed subrange.
n+2
•••
or
n,
n+2,
respectively.
of
bytes
large
as
swept
master
in
(byte
or
operation,
of
location,
32K
transferred,
the
addressing
driving
the
windowed
double-byte)
the
location
large
source/sink
bytes
leaving
use
is
with
needed
other
bo
perform addressing. mode
read
IP
determines
b¥ means
then,
the
the
of
its
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be
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used by
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bo
•••
range
of
in
the
the
high)
is,
the
for
of
so
the
bytes
a
block
transfer
subrange.
location
serves
blocks
(up
to
64K
addressing
in
only
randan
half
of
mode
the
windows. Only a
the
same
Figure
3-6
operation.
8-
PS
as
Note
that
in a block
in
window
double-byte.
the
IP
mode
0'
transfer.
s subrange
has
no
knowledge
as
It
a
of
s~ly
signal
the
addressing
considers
to
transfer
any
technique
address
the
next
used
reference
b¥te
or
3-17
41
iAPx
03
432
Interface
-----------
Processor
Byte
Architecture
diSPlacement~
Reference
(7)
(6)
Manual
4
096
Legend
Reference Subrange Reference
Object
Windowed
Subrange
Sequence:
Address
Operation:
Byte
Figure
3
2
1
---
Referenced:
Accessed
3-5
Block
- - -
(disp.):
Mode
Windowed
Object
<D
4,99
Write
345
Writes
(5)
(4) (3)
(2)
T
(Base
3
(1)
(0)
Displacement)
!
-
G)
Byte
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4100
write
Byte
write
G)
4101
Byte
3-18
4096
Legend
Reference
Sub
range
Reference
Object
.....
----,,"
Windowed
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(disp.):
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,
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CD
4'96
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2
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(4)
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G)
4'96
Read
3)
Tf;Base
1
Byte
3
Displacement)
Figure
3-6 Block
Mode
writes
- Source Addressing
3-19
iAPx
432
Interface
Processor
Architecture
Reference Manual
3-5.
Window 1 may
INTE~
be
processor-memory
by
the
transfer changed transfer
to
written
at
the
Peripheral
any time
mode
in
exactly
set
TRANSFERS
opened
onto
interconnect
JlDde
attribute
~
closing
differently.
Subsystem;
the
same
either
space.
the
when
window
the
432
memory
The
address space
window 1 is
and
re~pening
Both address spaces appear
interconnect
fashion
as
memory
objects
objects.
space
opened;
may
be
or
the
is
selected
it
may
it
with
identical
read and
432
be
the
3-20
OiAPTER 4
FONcrIOOS
This execution shows next operands and an describe
chapter
of
hCM
windCM 4 is
section
how
describes
all
Interface
explains
o~""Ode
the
IP
used
how a
through
executes a requested
infonmation upon campletion
4-1.
Management
request the update and window. facility status
requests
identifiying
these function. which controller
updates Processor. can be completion
FUNCrIOO
of
area
I/O
controller
use
Briefly,
in
information
execution
fields
Finally,
the
IP
can
the
disabled,
to
FACILITY
the
of
the
the
function
opcode
to
records
inspect
status
If
desired,
reach
INTERFACE
IP
function
the
processor
software
infonmation recorded
the
IP
by
reading
of
a
into
the
obtain
the
execution
in it. infonmation
thereby
the
AP.
the
common
Processor
to
provide
function
the
of
the
facility data and
records
state
the
field;
function
function
the
infonmation
the
return-value
Upon
completion
successful
allowing
facility
functions.
access
is
windCM.
function
operation.
segment (see
the
Interface
in
status
the
this
by
field.
writing
request
it
of
same
am
functions
interrupts
function
only
interrupts
to
requested
The
centers
this
area
of
the
I/O
controller
area,
needs
field,
of
any
completion
that
the
figure
The
supports
The
first
facility.
last
and
returns
on
two
the
4-1).
Processor
via
the
function
IP
section
by
writing
sections
status
function
itself control request
may
obtain
controller
operands and an
and
the
IP
reads
to
execute
produces a
where
function,
its
value
the
the
Attached
interrupts
for
unsuccessful
the The
Both
the
IP
IP
In
logical onto an
the
ALTERMAP
mode,
processor
corresponding obtains
memory.
access
Notice conventional function and
status
Figure AND
SELECl'
o and
windCM,
issued.
a
PS
request
registers.
4-2
illustrates
DATA
selects
is Windows
processor
the
control
data function PS
memory
to
fields
that
this
memory-mapped
area
fields
the
SEG1ENT,
a
different
the
only one through which
0 through 3
and
432
memory.
window
segment and
request.
subrange
in
the
interface
peripheral
are
effect
which
432
are
(window
its
By
function
read and
of
in
this
data
segment.
available
4)
is
permanently opened
mapping cannot be changed by
reading and
locations,
request
mechanism
device
written
executing a
case
al
ters
Window
function
for
the
area
like
function,
data
wr i ting
IP
controller
located
is
similar
controller;
command,
ALTER
the
map
of
4,
the
requests
transfer
control between
the
in
432
to
the
data
MAP
window
may
4-1
a
be
iAPX
432
Interface
Processor
Architecture
Reference
Manual
Operands
(reserved)
Function
Process
Selection
Processor
Figure 4-1 Function Request Area
Opcode
Data
State
Index
Segment
9
8
7
6
4-2
IP
WINDOWS
432
SYSTEM
IP
WINDOWS
FUNCTICNS
432
SYSTEM
0---
------0
0 0 0
0
----
------0
-_
....
------0
...---
---
fI
___
ORIGINAL
--_~
__
.........
DATA
----
----
----
---0
____
D
MAPPING
B
IP
PROCESSOR
SEGMENT
DATA
SEGMENTS
ALTERED
WINDOW ~ MAP
Figure
4-2
Function
Example
4-3
iAPX
4-
2.
FUNCrICN
The
performance
view
as a sequence
controller,
the
execution
The
IP
second
an
undefined function to
accept
432
running
executes
function
state
implementation
to a single
routine
Interface
REC.UFSTS
Processor
of a function
of
three
on
the
of a function.
functions
before ~ prior
result.
field
a
will
The
(see
function
assign
(task)
Architecture
may
be
phases,
AP,
performs
serially;
function
function
appendix
completion
A)
request.
responsibility
which
will
considered
as
shown
the
requesting
has
indicates
A
typical
for
serialize
Reference
fram
in
figure
first
been
completed
state
the
requesting
the
Manual
the
AP
point
4-3.
phase,
requesting
execution
produces
subfield
IP' s readiness
IP
controller
functions
requests.
The
of
of
of
IP
~
the
Given
appropriate
requests
issued
concurrently
consider
window
O.
Subsystem
the
Attached
for
any
other
PROCESS
The of
select index
of
list
The
soon
FUNCrICN
Each
SELECI'ICN
IP
controller
the
IP
a
into
the
processor
in
the
IP
will
as a function
function
appendix execution operarrls
o~ode
is
(which
a
IJ.1A
controller
If
the
bus
. between
Processor)
purpose).
process
process,
a
designated
IP's
attempt
OPCODES
is
B).
phase
must
The
of
be
transferred.
Peripheral
are
identical
with
IJ.1A
transfer
can
must
specify
environments
the
IP
controller
slot
data
segment.
processor
to
qualify
opcode
is
uniquely
act
of
writing
function
in
place
Subsystem bus
to
other
window
driving
controller
cycles,
use
the
that which
must
in
the
Wi
object,
a
and
written.
identified
into
performance.
in
the
function
arbitration,
all
windowed
activities.
a
block
rrode
relinquishes
the
IP
controller
rus
for
a
a
function
exist
in
deposit a process
function
th
this
process
lock
by
the
request
index,
object
the
a
one-byte
opcode
Therefore,
request
transfers)
transfer
the
function
be
performed
the
432
and
can
specified
field
the
area
function
For
example,
Peripheral
(running
request
system.
selection
facility
the
be
located.
process
opcode
triggers
function's
before
may
be
through
on
(or
in
one
To
area
process
as
(see
the the
4-4
---------.
Interrupt
from
I
IP ~ - -
I
Read
function
state
Write
operands
Write
opcode
I \
"
Perform
\
other
\
processing,'
\ I
_____
,.-_-_-_~
__
__
\
~
Read
function
state
FUNCl'ICNS
Request
Phase
\
Execution
Phase
...
Figure 4-3
Function
Performance
Read
return-
value
Phases -AP
Completion
Phase
View
4-5
iAPX
432
Interface
Processor
Architecture
Reference
Manual
FUNCl'IOO
An
Interface
<DubIe-byte operands the
OPERANDS
by
function
operands.
writing
lcwest-addressed are
written cases, over)
one
Each opcode required, not
be
initialized.
Interface
illustrated
to
or
so
unused
processor
in
<DubIe-bytes.
A
short 0-65, length,
MAP
AND
requires
535) • a
SELECr
ordinal
This
displacement,
a
short
subrange.
A
bit
field subfields. varies
to
according
the
specify
is a str
The
AL'IER
transfer
Processor
values
request
location
successively
nore
operand
implicitly
high~rder
See
functions
figure
is
type
DATA
SEGmNT
ordinal
ing length, to
the
MAP
AND
node,
function
The
into
area.
of
Appendix B
4-4;
a a
of
an
16-bit
operarrl
index,
operand
of
16
position
function.
SELECI'
rnennry
IP
controller
may
require
locations
The
the
field
first
and
higher-addressed
slots
may
be
identifies
locations
for
the
accept
all
three
operarrl
unsigned
is
typically
etc.
function
bits
am
is
that
that
definition
For
specifies
is
Subfields
DATA
overlay,
SEG1ENT
etc.
fran
specifies
of
the
operarrl
the
remaining
locations
reserved
the
number
in
the
operands
function
types
types
binary
used
example, when
used
to
open a windGl,
divided
in a bit
function,
zero
a
operands
goes
and
are
of
surrmary.
of
operands
are
integer
to
the
size
into
of
a number
each
field
for
to
seven
function's
field
in
the
operands
(in
some
skipped
operands
field
need
stored
(range
specify
the
ALTER
of
the
subfield
operand
example,
in
as
as
a
it
of
An
object that the
object.
one the access access
is
is
the
IP
uses
The
of
the
selected
descr
descriptor
the
developnent
performs
develops
the
the
4-6
selector
function's
an
lcw-order
four
context.
iptors
actual
is
identical
standard
object's
identifies
actual
object
subfield
currently
The
in
the
refers,
function
432
physical
an
access
operand.
selector
entered
high~rdersubfield
entered
via
oper
to
GOP
type,
operand
of
the
access
access
the
object
and.
addressing.
rights
address
descriptor
Figure
to
object
segments
segment.
table,
This
and bounds
fram
the
Note
for
4-5
illustrates
obtain
access
selector
associated
indexes
to
the
three-level
that
checking
object
selector.
an
identifies
one
The
object
the
object
how
to
an
with
of
the
selected
that
address
IP
also
as
it
FONcrICNS
15
I I
~~
________
15
~y
_______
l~-------------(16-bit
I : : : i : : : : : : : : ! :
,
15
l
v,------I
l,------(Subfields
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21!
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,
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unsigned
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=
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11 = Entered
Descriptor
(14-bit
defined
Segment
Access Access Access Access
unsigned
integer)
by
function)
Segment
Segment
Segment 2
Segment 3
Index
integer)
Identifier
1
Figure
4-4
Function
Operand Types
4-7
~
432
Interface
Processor
Architecture
Reference
Manual
15
p0000000000001Il~
\ \ d °
\ \
\ --- - - - - - - - - - - - - -,
\
---------
L 1 L
,
Object
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o 0
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4-8
Figure 4-5 Object
Selection
4-
3.
FUNcrICN
The
IP
the
IP
Processor
after
it
refrain
per
forms
controller.
with
has
requested
from
requesting a second
EXOCUTICN
the
actual
Therefore
associated
execution
IP
control
execution
of
a
the
IP
controller
software)
of a function
function).
function
is
free
(except
FUNcrIONS
independent
(an
Attached
do
other
that
it
of
work must
Altr~ugh
varies,
to
most
the
figure
functions.
execution. Function
of
the The function facility
request
fetches
request
function
IP
execution
sets
execution
is area the
area.
destination
return-value, function
The
state
request
IP
terminates
subfield
information completion execution. the
context,
during
execution
IP's
4-6
begi~~
request
the
state
"in
use".
arrl
decodes
operands
It
operands
the
IP
area.
arrl
on
discriminating
state
The
IP
process
of a function.
execution
shows
the
Note
when
area
of
process
The
required
then
with
the
writes
execution
generating subfield
records
arrl
processor
of
basic
that
the
the
mawed
window 4
to
irrlicate
IP
reads
it.
After
by
performs
result(s).
it
into
by
an
irrlicates
additional
any
given
sequence
IP
checks
IP
detects
by
window 4
to
the
decooing
the
function
the
the
updating
interrupt
IP
interrupts).
information
objects
function
of
steps
for
faults
that
the
has
"in-progress"
that
the
function
opcode from
the
opcode,
from
operation
If
the
function
corresponding
the
function
(see
awendix
successful
in
when
it
detects
necessarily
that
throughout
opcode
been
dur
the
the
am
produces
field
completion
The
or
one
or
is
common
field
written.
ing
request
function
the
function
updates
of
D
function
faulted more a
fault
the
IP
a
the
for
of
4-4.
FUNcrICN
Normally function subfield.
be
examined
faulted.
CDMPLErICN
the
IP
controller
completion;
In
any
case,
to
determine
it
may
the
if
will
also
use
poll
function
the
function
the
IP's
the
function
completion
completed
interrupt
completion
state
subfield
successfully
to
detect
state
must
or
4-9
iAPX
432
Interface
Processor
Qualify
Selected Process
Decode Opcode
Perform
operation
Architecture
no
Reference Manual
Update
destinations
Update
Return-value
Update
function
completion
state
Gener~
1nt:~J
Figure 4-6 Basic IP Function Execution Flow
4-10
FUNCl'IONS
Successful
execution
of a destination
field execution).
of
the
In return-value. function status. function
4.
The
returns
The
IP
request
low-order lowest-addressed stored return-value content
Appendix B
return-values a one-byte of
is
is If
undefined. produce a the
in
consecutively
of
excess
standard
value
the
value
O.
In
either
undefined.
a
function
return-value,
return-value
is
provides
produced
type
"true"
If
of
a
operand
function
request
addition,
For example,
the
current
writes
area,
return-values where
byte
location
higher
less
than
high-order
the
by
of
return-value
that
indicates
case
faults, a
function
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n
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PHYSICAL
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CHAPTER
5
MJOE
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432
FAULTS
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FAULT
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fault and fault specified
information
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Appendix B. The
executing
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operator
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ID
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information
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or
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iAPx 432
The
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utilizes
Processor
information
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areas).
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Architecture
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432
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6-3
iAPX
432
Interface
Processor
Architecture
Reference
Manual
fault
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of
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o
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171874).
handling
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considers
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6-5
iAPX
432
Interface
Processor
Architecture
Reference
Manual
6-2.
When
FAULT
an autanatically handling waiting base
similar IP
attention
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432
at
architecture,
to
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ted
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of
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described
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SYSTEM OBJECT STRUCTURES
Processors
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A-9
iAPX
432
Interface
Processor
Architecture
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LAPX
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Interface
Processor
Architecture
Reference Manual
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A-13
iAPX
432
Interface
Processor
Architecture
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map
Subsystem address
The
two major
to
the
function
software
to
read
of
of
A-IS
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