
Intel® Core™ i5-3610ME
Processor (PGA) and
Mobile Intel® QM77 Express
Chipset Development Kit
User Guide
November 2012
Document Number: 328076-001

Introduction
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Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
2 Document Number: 328076-001

Introduction
Contents
1 Introduction ...................................................................................................... 6
1.1 Terminology ........................................................................................... 6
1.2 Reference Documents .............................................................................. 8
1.3 Development Kit Items ............................................................................ 8
2 Features ........................................................................................................... 9
3 Power management .......................................................................................... 12
3.1 Power Management States ...................................................................... 12
4 Reference Board Summary ................................................................................ 14
4.1 Connectors............................................................................................ 17
4.1.1 Back Panel Connectors .............................................................. 17
4.1.2 Configuration Settings ............................................................... 17
4.1.3 Header Pinout Configuration....................................................... 19
4.1.3.1 J3C2/J3C1- Dual Channel LVDS Data Connector ............ 20
4.1.3.2 Embedded Display Port (eDP) connector ....................... 21
4.1.3.3 Front Panel Status Indicating and Control Connector ...... 22
4.2 Power On and Reset Buttons ................................................................... 23
Figures
Figure 1. Block Diagram ................................................................................................... 9
Figure 2. Board Layout - Top view .................................................................................... 14
Figure 3. Board Layout – Bottom view .............................................................................. 15
Figure 4. Back Panel Connectors ...................................................................................... 17
Tables
Table 1. Terminology ...................................................................................................... 6
Table 2. Reference Documents ........................................................................................ 8
Table 3. Feature set summary ......................................................................................... 9
Table 4. Power Management States Description ................................................................ 12
Table 5. Development Kit states ..................................................................................... 12
Table 6. Components list ............................................................................................... 16
Table 7. J1D3-Clear/Keep CMOS Setting .......................................................................... 17
Table 8. J1D2-Clear/Keep ME Register Setting .................................................................. 18
Table 9. J1B1-Flash descriptor security override ............................................................... 18
Table 10. J1D1-Enable the Operating Voltage of LVDS and eDP ............................................ 18
Table 11. J4C1-Select LVDS panel Operating Voltage .......................................................... 18
Table 12. J3F2-Select eDP panel Operating Voltage ............................................................. 18
Table 13. J2G1/J2G2/J2G3 USB Port ................................................................................. 19
November 2012 User Guide
Document Number: 328076-001 3
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit

Introduction
Table 14. J2C1/J1C1Serial Port ......................................................................................... 19
Table 15. J2B1 GPIO Header ............................................................................................ 19
Table 16. J3B1- TPM Pin Header ....................................................................................... 20
Table 17. J4C2-LVDS Backlight Control Connector .............................................................. 20
Table 18. J3C2 LVDS1 Connector ...................................................................................... 21
Table 19. J3C1 LVDS2 Connector ...................................................................................... 21
Table 20. J3F1 Embedded Display Port (eDP) Connector ...................................................... 22
Table 21. J1G3 Power Switch and HDD Indicator header ...................................................... 22
Table 22. J1G1 Power Indicator Header ............................................................................. 23
Table 23. J1G2 Speaker Output Header ............................................................................. 23
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
4 Document Number: 328076-001

Introduction
Revision History
§
November 2012 User Guide
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
Document Number: 328076-001 5

1 Introduction
Advanced Configuration + Power Interface
Advanced Host Controller Interface for Serial ATA
FSB Clock used for CPU Clock domain (Eg: 167/200/266/333)
Basic Input Output System
Refers to the non-volatile configuration memory in the PCH
Double Data Rate Synchronous Dynamic Random Access Memory third
generation
High Definition Multimedia Interface
Intel Mobile Voltage Positioning 6
In-target-probe – eXtended debug port
This User Guide describes the typical hardware set-up procedures, features, and use
of the Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express
Chipset Development Kit. Read this document in its entirety prior to powering ON. The
Quick Start document provides quick start procedures for reference. It is
recommended to have the schematics present as you proceed through this document.
The Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express
Chipset Development Kit is a dual channel DDR3 mobility platform. It is designed to
support the Ivy Bridge and Sandy Bridge processors and the Panther Point-M Chipset.
1.1 Terminology
Table 1. Terminology
Introduction
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
User Guide November 2012
6 Document Number: 328076-001

Joint Test Action Group, IEEE 1149.1 standard for test access port and
boundary scan.
Low-voltage Differential Signaling
Peripheral Component Interface
Peripheral Component Interface Express
Programming System 2 (IBM) defines keyboard and mouse interface
“Save to RAM” Sleep State
Serial - Advanced Technology Attachment
Super Input Output device
System Management Bus, a two wire serial bus used for lowbandwidth communication
Used to signify circuit logic voltage
Used to signify DIMM logic supply voltage
Used to signify ground connection
Used to signify signal termination voltage
Introduction
November 2012 User Guide
Intel® Core™ i5-3610ME Processor (PGA) and Mobile Intel® QM77 Express Chipset Development Kit
Document Number: 328076-001 7