The Intel® Desktop Board D945GCL may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D945GCL Specification Update.
September 2006
Order Number: D73644-001US
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D945GCL Technical Product
Specification.
This product specification applies to only the standard Intel Desktop Board D945GCL with BIOS
identifier CL94510J.86A.
Changes to this specification will be published in the Intel Desktop Board D945GCL Specification
Update before being incorporated into a revision of this document.
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September 2006
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved”
or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for
conflicts or incompatibilities arising from future changes to them.
®
desktop boards may contain design defects or errors known as errata, which may cause the product
Intel
to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your
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Copies of documents which have an ordering number and are referenced in this document, or other Intel
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* Other names and brands may be claimed as the property of others.
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for the Intel
Desktop Board D945GCL. It describes the standard product and available
manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Board
D945GCL and its components to the vendors, system integrators, and other engineers
and technicians who need this level of information. It is specifically not intended for
general audiences.
What This Document Contains
®
Chapter Description
1 A description of the hardware used on the Desktop Board D945GCL
2 A map of the resources of the Desktop Board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
5 Regulatory compliance and battery disposal information
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
#
Integrator’s notes are used to call attention to information that may be useful to
system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
Warnings indicate conditions, which if not observed, can cause personal injury.
Other Common Notation
# Used after a signal name to identify an active-low signal (such as USBP0#).
(NxnX) When used in the description of a component, N indicates component type, xn are the
relative coordinates of its location on the Desktop Board D945GCL, and X is the instance of
the particular part at that general location. For example, J5J1 is a connector, located at 5J.
It is the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
Gbits/sec Gigabits per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
Figure 1 shows the location of the major components.
Table 2 lists the components identified in Figure 1.
12
Figure 1. Board Components
Table 2. Board Components Shown in Figure 1
Item/callout
Figure 1 Description
from
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Front panel audio header
PCI Conventional bus add-in card connectors [2]
PCI Express x16 bus add-in card connector
Back panel connectors
Processor core power connector
Rear chassis fan header
LGA775 processor socket
Intel 82945G GMCH
Processor fan header
DIMM sockets
Main Power connector
Diskette drive connector
Parallel ATE IDE connector
Battery
Front chassis fan header
BIOS Setup configuration jumper block
Chassis intrusion header
Serial ATA connectors [4]
Auxiliary front panel power LED header
Front panel header
Front panel USB headers [2]
Intel 82801GB I/O Controller Hub (ICH7)
Speaker
PCI Express x1 bus add-in card connector
Figure 2 is a block diagram of the major functional areas.
PCI Express x1 Interface
PCI Express x1 Slot 1
Parallel ATA
IDE Connector
LGA775 Processor
Socket
Parallel ATA
IDE Interface
System Bus
(1066/800/533
MHz)
USB
Legacy
I/O
Controller
LPC
Bus
Back Panel/Front Panel
USB Ports
Serial Port
Parallel Port
PS/2 Mouse
PS/2 Keyboard
Diskette Drive
Connector
PCI Express
x16 Interface
PCI Express
x16
Connector
VGA
Port
Channel A
DIMM
Channel B
DIMM
PCI Slot 1
PCI Slot 2
Intel 945G Chipset
Intel 82945G
Graphics and
Memory Controller
Hub (GMCH)
Display Interface
Dual-Channel
Memory Bus
PCI Bus
SMBus
SMBus
Intel 82801GB
I/O Controller Hub
(ICH7)
DMI Interconnect
Interface
LAN Connect
Serial ATA
IDE Interface
High Definition Audio Link
Audio
Codec
10/100
LAN PLC
Line In/Retasking Jack
Line Out/Retasking Jack
Mic In/Retasking Jack
Serial Peripheral
Interface (SPI)
Flash Device
LAN
Connector
Serial ATA IDE
Connectors (4)
Line Out
Mic In
= connector or socket
14
Hardware Monitoring
and Fan Control ASIC
Figure 2. Block Diagram
OM18521
Product Description
1.2 Online Support
To find information about… Visit this World Wide Web site:
®
Desktop Board D945GCL under
Intel
“Desktop Board Products” or “Desktop
Board Support”
Available configurations for the Desktop
Board D945GCL
Processor data sheets http://www.intel.com/design/litcentr
ICH7 addressing http://developer.intel.com/products/chipsets
Custom splash screens http://intel.com/design/motherbd/gen_indx.htm
Audio software and utilities http://www.intel.com/design/motherbd
LAN software and drivers http://www.intel.com/design/motherbd
Supported video modes http://www.intel.com/design/motherbd/cl/cl_documentation.htm
The board has two DIMM sockets and supports the following memory features:
• 1.8 V (only) DDR2 SDRAM DIMMs with gold-plated contacts
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
•4 GB maximum total system memory. Refer to Section
2.1.1 on page 39 for
information on the total amount of addressable memory.
• Minimum total system memory: 128 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 667, DDR2 533, or DDR2 400 MHz SDRAM DIMMs
NOTES
•Remove the PCI Express x16 video card before installing or upgrading memory to
avoid interference with the memory retention mechanism.
•To be fully compliant with all applicable DDR SDRAM memory specifications, the
board should be populated with DIMMs that support the Serial Presence Detect
(SPD) data structure. This allows the BIOS to read the SPD data and program the
chipset to accurately configure memory settings for optimum performance. If nonSPD memory is installed, the BIOS will attempt to correctly configure the memory
settings, but performance and reliability may be impacted or the DIMMs may not
function under the determined frequency.
Table 3 lists the supported DIMM configurations.
Table 3. Supported Memory Configurations
DIMM Capacity Configuration SDRAM Density
128 MB SS 256 Mbit 16 M x 16/empty 4
256 MB SS 256 Mbit 32 M x 8/empty 8
256 MB SS 512 Mbit 32 M x 16/empty 4
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
512 MB SS 512 Mbit 64 M x 8/empty 8
512 MB SS 1 Gbit 64 M x 16/empty 4
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16
1024 MB SS 1 Gbit 128 M x 8/empty 8
2048 MB DS 1 Gbit 128 M x 8/128 M x 8 16
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM)
and “SS” refers to single-sided memory modules (containing one row of SDRAM).
SDRAM Organization
Front-side/Back-side
Number of
SDRAM Devices
16
Product Description
NOTE
Regardless of the DIMM type used, the memory frequency will either be equal to or
less than the processor system bus frequency. For example, if DDR2 667 memory is
used with a 533 MHz system bus frequency processor, the memory will operate at
533 MHz.
Table 4 lists the resulting operating memory frequencies based on the
combination of DIMMs and processors.
Table 4. Memory Operating Frequencies
DIMM Type Processor system bus frequency Resulting memory frequency
The Intel 82945G GMCH supports two types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for
real world applications. Dual channel mode is enabled when the installed memory
capacities of both DIMM channels are equal. Technology and device width can vary
from one channel to the other but the installed memory capacity for each channel
must be equal. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single DIMM is installed or the memory capacities are unequal. Technology and
device width can vary from one channel to the other. If different speed DIMMs are
used between channels, the slowest memory timing will be used.
Figure 3 illustrates the memory channel and DIMM configuration.
Figure 4 shows a dual channel configuration using two DIMMs. In this example, the
DIMM sockets are populated with identical DIMMs.
Figure 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
18
Product Description
1.4.1.2 Single Channel (Asymmetric) Mode Configurations
NOTE
Dual channel (Interleaved) mode configurations provide the highest memory
throughput.
Figure 5 shows a single channel configuration using one DIMM. In this example, only
the Channel A is populated. Channel B is not populated.
Figure 5. Single Channel (Asymmetric) Mode Configuration with One DIMM
Figure 6 shows a single channel configuration using two DIMMs. In this example, the
capacity of the DIMM in Channel A does not equal the capacity of the DIMM in
Channel B.
Figure 6. Single Channel (Asymmetric) Mode Configuration with Two DIMMs
The Intel 945G chipset consists of the following devices:
•Intel 82945G Graphics Memory Controller Hub (GMCH) with Direct Media Interface
(DMI) interconnect
•Intel 82801GB I/O Controller Hub (ICH7) with DMI interconnect
The GMCH component provides interfaces to the CPU, memory, PCI Express, and the
DMI interconnect. The component also provides integrated graphics capabilities
supporting 3D, 2D and display capabilities. The ICH7 is a centralized controller for the
board’s I/O paths.
For information about Refer to
The Intel 945G chipset
Resources used by the chipset Chapter 2
1.5.1 Intel 945G Graphics Subsystem
The Intel 945G chipset contains two separate, mutually exclusive graphics options.
Either the GMA950 graphics controller (contained within the 82945G GMCH) is used, or
a PCI Express x16 add-in card can be used. When a PCI Express x16 add-in card is
installed, the GMA950 graphics controller is disabled.
http://developer.intel.com/
1.5.1.1 Intel® GMA950 Graphics Controller
The Intel GMA950 graphics controller features the following:
• 3D Graphics Rendering enhancements
⎯ 1.3 Dual Texture GigaPixel/Sec Fill Rate
⎯ 16 and 32 bit color
⎯ Maximum 3D supported resolution of 1600 x 1200 x 32 at 85 Hz
⎯ Vertex cache
⎯ Anti-aliased lines
⎯ OpenGL* version 1.4 support with vertex buffer and EXT_Shadow extensions
• 2D Graphics enhancements
⎯ 8, 16,and 32 bit color
⎯ Optimized 256-bit BLT engine
⎯ Color space conversion
⎯ Anti-aliased lines
20
• Video
⎯ Hardware motion compensation for MPEG2
⎯ Software DVD at 30 fps full screen
• Display
⎯ Integrated 24-bit 400 MHz RAMDAC
⎯ Up to 2048 x 1536 at 75 Hz refresh (QXGA)
⎯ DDC2B compliant interface with Advanced Digital Display 2 or 2+
(ADD2/ADD2+) cards, support for TV-out/TV-in and DVI digital display
connections
⎯ Supports flat panels up to 2048 x 1536 at 60Hz or digital CRT/HDTV at
1920 x 1080 at 85 Hz (with ADD2/ADD2+)
⎯ Two multiplexed DVO port interfaces with 200 MHz pixel clocks using an
ADD2/ADD2+ card
•Dynamic Video Memory Technology (DVMT) support up to 224 MB
®
Zoom Utility
•Intel
For information about Refer to
Obtaining graphics software and utilities Section
Product Description
1.2, page 15
1.5.1.2 Dynamic Video Memory Technology (DVMT)
DVMT enables enhanced graphics and memory performance through Direct AGP, and
highly efficient memory utilization. DVMT ensures the most efficient use of available
system memory for maximum 2-D/3-D graphics performance. Up to 224 MB of
system memory can be allocated to DVMT on systems that have 512 MB or more of
total system memory installed. Up to 128 MB can be allocated to DVMT on systems
that have 256 MB but less than 512 MB of total installed system memory. Up to 64
MB can be allocated to DVMT when less than 256 MB of system memory is installed.
DVMT returns system memory back to the operating system when the additional
system memory is no longer required by the graphics subsystem.
DVMT will always use a minimal fixed portion of system physical memory (as set in the
BIOS Setup program) for compatibility with legacy applications. An example of this
would be when using VGA graphics under DOS. Once loaded, the operating system
and graphics drivers allocate additional system memory to the graphics buffer as
needed for performing graphics functions.
NOTE
The use of DVMT requires operating system driver support.
1.5.1.3 Advanced Digital Display (ADD2/ADD2+) Card Support
The GMCH routes two multiplexed DVO ports that are each capable of driving up to a
200 MHz pixel clock to the PCI Express x16 connector. The DVO ports can be paired
for a dual channel configuration to support up to a 400 MHz pixel clock. When an
ADD2/ADD2+ card is detected, the Intel GMA950 graphics controller is enabled and
the PCI Express x16 connector is configured for DVO mode. DVO mode enables the
DVO ports to be accessed by the ADD2/ADD2+ card. An ADD2/ADD2+ card can
either be configured to support simultaneous display with the primary VGA display or
can be configured to support dual independent display as an extended desktop
configuration with different color depths and resolutions. ADD2/ADD2+ cards can be
designed to support the following configurations:
• TV-Out (composite video)
• Transition Minimized Differential Signaling (TMDS) for DVI 1.0
• Low Voltage Differential Signaling (LVDS)
• Single device operating in dual channel mode
• VGA output
• HDTV output
1.5.1.4 Configuration Modes
A list of supported modes for the Intel GMA950 graphics controller is available as a
downloadable document.
For information about Refer to
Supported video modes for the board Section
1.2, page 15
1.5.2 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers.
The ICH7 provides the USB controller for all ports. The port arrangement is as
follows:
• Four ports are implemented with dual stacked back panel connectors
• Four ports are routed to two separate front panel USB headers
NOTE
Computer systems that have an unshielded cable attached to a USB port may not
meet FCC Class B requirements, even if no device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel
The location of the front panel USB headers Figure 13, page 48
Figure 12, page 47
22
Product Description
1.5.3 IDE Support
The board provides five IDE interface connectors:
• One parallel ATA IDE connector that supports two devices
• Four serial ATA IDE connectors that support one device per connector
1.5.3.1 Parallel ATE IDE Interface
The ICH7’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE
interface. The Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to
16 MB/sec.
•Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 33 MB/sec.
•ATA-66: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is
device driver compatible.
•ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH7’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer
rates up to 88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce
reflections, noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives)
and ATA devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector
(ECHS) translation modes. The drive reports the transfer rate and translation mode to
the BIOS.
For information about Refer to
The location of the Parallel ATA IDE connector
1.5.3.2 Serial ATA Interfaces
The ICH7’s Serial ATA controller offers four independent Serial ATA ports with a
theoretical maximum transfer rate of 3 Gbits/sec per port. One device can be installed
on each port for a maximum of four Serial ATA devices. A point-to-point interface is
used for host to device connections, unlike Parallel ATA IDE which supports a
master/slave configuration and two devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the
operating system. The Serial ATA controller can operate in both legacy and native
modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14
and 15). In Native mode, standard PCI Conventional bus resource steering is used.
Native mode is the preferred mode for configurations using the Windows* XP and
Windows 2000 operating systems.
Many Serial ATA drives use new low-voltage power connectors and require adaptors or
power supplies equipped with low-voltage power connectors.
For more information, see:
For information about Refer to
The location of the Serial ATA IDE connectors
http://www.serialata.org/
Figure 13, page 48
1.5.4 Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
1.6 PCI Express* Connectors
The board provides the following PCI Express connectors:
•One PCI Express x16 connector supporting simultaneous transfer speeds up to
4 GBytes/sec of peak bandwidth per direction and up to 8 GBytes/sec concurrent
bandwidth
•One PCI Express x1 connector. The x1 interface supports simultaneous transfer
speeds up to 250 Mbytes/sec of peak bandwidth per direction and up to
500 MBytes/sec concurrent bandwidth
The PCI Express interface supports the PCI Conventional bus configuration mechanism
so that the underlying PCI Express architecture is compatible with PCI Conventional
compliant operating systems. Additional features of the PCI Express interface include
the following:
• Support for the PCI Express enhanced configuration mechanism
• Automatic discovery, link training, and initialization
• Support for Active State Power Management (ASPM)
• SMBus 2.0 support
• Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
• Software compatible with the PCI Power Management Event (PME) mechanism
defined in the PCI Power Management Specification Rev. 1.1
24
Product Description
1.7 Legacy I/O Controller
The legacy I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
•Serial IRQ interface compatible with serialized IRQ support for PCI Conventional
bus systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the legacy I/O controller.
1.7.1 Serial Port
The Serial port A connector is located on the back panel. The serial port supports data
transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector
Figure 12, page 47
1.7.2 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS
Setup program to set the parallel port mode.
For information about Refer to
The location of the parallel port connector
Figure 12, page 47
1.7.3 Diskette Drive Controller
The legacy I/O controller supports one diskette drive. Use the BIOS Setup program to
configure the diskette drive interface.
For information about Refer to
The location of the diskette drive connector
Figure 13, page 48
1.7.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported
in the top PS/2 connector. Power to the computer should be turned off before a
keyboard or mouse is connected or disconnected.
The board supports the Intel High Definition audio subsystem based on the
Sigmatel 9220 audio codec. The audio subsystem supports the following features:
•Advanced jack sense for the back panel audio jacks that enables the audio codec to
recognize the device that is connected to an audio port. The back panel audio
jacks are capable of retasking according to user’s definition, or can be
automatically switched depending on the recognized device type.
• Stereo input and output for all back panel jacks
• Line out and Mic in functions for front panel audio jacks
• A signal-to-noise (S/N) ratio of 95 dB
1.8.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.2, page 15
1.8.2 Audio Connectors
The board contains audio connectors/headers on both the back panel and the
component side of the board. The front panel audio header provides mic in and line
out signals for the front panel.
For information about Refer to
The location of the front panel audio header
The signal names of the front panel audio header Table 16, page 50
The back panel audio connectors Section 2.7.1, page 47
Figure 13, page 48
26
Product Description
k
1.8.3 6-Channel (5.1) Audio Subsystem
The 6-channel (5.1) audio subsystem includes the following:
• Intel 82801GB I/O Controller Hub (ICH7)
• Sigmatel 9220 audio codec
• Microphone input that supports a single dynamic, condenser, or electret
microphone
The back panel audio connectors are configurable through the audio device drivers.
The available configurable audio ports are shown in
Figure 7.
Front Panel Audio Connectors
[Routed from Front Panel Audio Header]