The Intel® Desktop Board D915GEV/D915GRF may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D915GEV/D915GRF Specification Update.
June 2004
Order Number: C68602-001
Revision History
RevisionRevision HistoryDate
-001First Release of the Intel® Desktop Board D915GEV/D915GRF Technical
Product Specification.
This product specification applies to only standard Intel® Desktop Boards D915GEV and
D915GRF with BIOS identifier EV91510A.86A.
Changes to this specification will be published in the Intel Desktop Board D915GEV/D915GRF
Specification Update before being incorporated into a revision of this document.
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from future changes to them.
®
desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from
Intel
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
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June 2004
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for these Intel
and D915GRF. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Boards
D915GEV and D915GRF and their components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not intended for
general audiences.
What This Document Contains
ChapterDescription
1A description of the hardware used on the Desktop Boards D915GEV and D915GRF
2A map of the resources of the Desktop Boards
3The features supported by the BIOS Setup program
4A description of the BIOS error messages, beep codes, and POST codes
®
Desktop Boards: D915GEV
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
INTEGRATOR’S NOTES
Integrator’s notes are used to call attention to information that may be useful to system
integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
Warnings indicate conditions, which if not observed, can cause personal injury.
Other Common Notation
#Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX)When used in the description of a component, N indicates component type, xn are the
relative coordinates of its location on the Desktop Boards D915GEV and D915GRF, and X is
the instance of the particular part at that general location. For example, J5J1 is a connector,
located at 5J. It is the first connector in the 5J area.
GBGigabyte (1,073,741,824 bytes)
GB/secGigabytes per second
KBKilobyte (1024 bytes)
KbitKilobit (1024 bits)
kbits/sec1000 bits per second
MBMegabyte (1,048,576 bytes)
MB/secMegabytes per second
MbitMegabit (1,048,576 bits)
Mbit/secMegabits per second
xxhAn address or data value ending with a lowercase h indicates a hexadecimal value.
x.x VVolts. Voltages are DC unless otherwise specified.
*This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
iv
Contents
1Product Description
1.1PCI Bus Terminology Change ....................................................................................11
Previous generations of Intel® Desktop Boards used an add-in card connector referred to as PCI.
This generation of Intel Desktop Boards adds a new technology for add-in cards: PCI Express.
The 32-bit parallel bus previously referred to as PCI is now called PCI Conventional.
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2* keyboard and mouse ports
• Gigabit (10/100/1000 Mbits/sec) LAN subsystem using the Marvell* Yukon*
88E8050 PCI Express* Gigabit Ethernet Controller
®
• 10/100 Mbits/sec LAN subsystem using the Intel
Connect (PLC) device
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
and SMBIOS
• Support for PCI Local Bus Specification Revision 2.2
• Support for PCI Express Revision 1.0a
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, and USB ports
82562EZ Platform LAN
continued
12
Product Description
Table 1. Feature Summary (continued)
Expansion
Capabilities
Hardware Monitor
Subsystem
•
Four PCI Conventional bus add-in card connectors (SMBus routed to PCI
Conventional bus connector 2)
•
Two PCI Express x1 bus add-in card connectors
•
One PCI Express x16 bus add-in card connector
•
Hardware monitoring and fan control ASIC
•
Voltage sense to detect out of range power supply voltages
•
Thermal sense to detect out of range thermal values
•
Three fan connectors
•
Three fan sense inputs used to monitor fan activity
•
Fan speed control
1.2.2Manufacturing Options
Table 2 describes the manufacturing options on the Desktop Boards D915GEV and D915GRF.
Not every manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Table 2. Manufacturing Options
ATAPI CD-ROM
Connector
ATX Fan
Connector
IEEE-1394a
Interface
SCSI Hard Drive
Activity LED
Connector
Serial Port BSecond serial port accessible via a connector on the component side of the board
S/PDIF ConnectorA 1 x 3 connector (mounted on the component side of the board) that provides digital
For information about Refer to
Available configurations for the Desktop Boards D915GEV and D915GRFSection 1.3, page 17
A connector for attaching an internal CD-ROM drive to the onboard audio subsystem
Additional fan connector for use in larger chassis
IEEE-1394a controller and three IEEE-1394a connectors (one back panel connector,
two front-panel connectors)
Allows add-in hard drive controllers (SCSI or other) to use the same LED as the
onboard IDE controller
The board is designed to support Intel Pentium 4 processors in an LGA775 processor socket with
an 800 or 533 MHz system bus. See the Intel web site listed below for the most up-to-date list of
supported processors.
For information about… Refer to:
Supported processors for the D915GEV boardhttp://www.intel.com/design/motherbd/ev/ev_proc.htm
Supported processors for the D915GRF boardhttp://www.intel.com/design/motherbd/rf/rf_proc.htm
CAUTION
Use only the processors listed on web site above. Use of unsupported processors can damage the
board, the processor, and the power supply.
The boards have four DIMM sockets and support the following memory features:
•
1.8 V (only) DDR2 SDRAM DIMMs with gold-plated contacts
•
Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
•
4 GB maximum total system memory. Refer to Section 2.2.1 on page 51 for information on
the total amount of addressable memory.
•
Minimum total system memory: 128 MB
•
Non-ECC DIMMs
•
Serial Presence Detect
•
DDR2 533 MHz or DDR2 400 MHz SDRAM DIMMs
NOTES
•
Remove the PCI Express x16 video card before installing or upgrading memory to avoid
interference with the memory retention mechanism.
•To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to accurately
configure memory settings for optimum performance. If non-SPD memory is installed, the
BIOS will attempt to correctly configure the memory settings, but performance and reliability
may be impacted or the DIMMs may not function under the determined frequency.
Table 4 lists the supported DIMM configurations.
Table 4. Supported Memory Configurations
DIMM
CapacityConfiguration
128 MBSS256 Mbit16 M x 16/empty4
256 MBSS256 Mbit32 M x 8/empty8
256 MBSS512 Mbit32 M x 16/empty4
512 MBDS256 Mbit32 M x 8/32 M x 816
512 MBSS512 Mbit64 M x 8/empty8
512 MBSS1 Gbit64 M x 16/empty4
1024 MBDS512 Mbit64 M x 8/64 M x 816
1024 MBSS1 Gbit128 M x 8/empty8
2048 MBDS1 Gbit128 M x 8/128 M x 816
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS”
refers to single-sided memory modules (containing one row of SDRAM).
INTEGRATOR’S NOTE
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
It is possible to install four 2048 MB (2 GB) modules for a total of 8 GB of system memory,
however, only 4 GB of address space is available. Refer to Section 2.2.1, on page 51 for
additional information on available memory.
18
Product Description
OM16667
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
1.5.1Memory Configurations
The Intel 82915G GMCH supports two types of memory organization:
•
Dual channel (Interleaved) mode. This mode offers the highest throughput for real world
applications. Dual channel mode is enabled when the installed memory capacities of both
DIMM channels are equal. Technology and device width can vary from one channel to the
other but the installed memory capacity for each channel must be equal. If different speed
DIMMs are used between channels, the slowest memory timing will be used.
•
Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth
operation for real world applications. This mode is used when only a single DIMM is installed
or the memory capacities are unequal. Technology and device width can vary from one
channel to the other. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
Figure 3 illustrates the memory channel and DIMM configuration.
NOTE
The DIMM0 sockets of both channels are blue. The DIMM1 sockets of both channels are black.
Figure 4 shows a dual channel configuration using two DIMMs. In this example, the DIMM0
(blue) sockets of both channels are populated with identical DIMMs.
1 GB
Channel A, DIMM 0
Channel A, DIMM 1
1 GB
Channel B, DIMM 0
Channel B, DIMM 1
OM17123
Figure 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
Figure 5 shows a dual channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM0
(blue) socket of Channel B.
256 MB
256 MB
Channel A, DIMM 0
Channel A, DIMM 1
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17122
Figure 5. Dual Channel (Interleaved) Mode Configuration with Three DIMMs
20
Product Description
Figure 6 shows a dual channel configuration using four DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in
Channel B. Also, the DIMMs are matched between DIMM0 and DIMM1 of both channels.
256 MB
5
12 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17124
Figure 6. Dual Channel (Interleaved) Mode Configuration with Four DIMMs
Dual channel (Interleaved) mode configurations provide the highest memory throughput.
Figure 7 shows a single channel configuration using one DIMM. In this example, only the
DIMM0 (blue) socket of Channel A is populated. Channel B is not populated.
256 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17125
Figure 7. Single Channel (Asymmetric) Mode Configuration with One DIMM
Figure 8 shows a single channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the
DIMM0 (blue) socket of Channel B.
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Figure 8. Single Channel (Asymmetric) Mode Configuration with Three DIMMs
22
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17126
Product Description
1.6 Intel® 915G Chipset
The Intel 915G chipset consists of the following devices:
•
Intel 82915G Graphics Memory Controller Hub (MCH) with Direct Media Interface (DMI)
interconnect
•
Intel 82801FB I/O Controller Hub (ICH6) with DMI interconnect
•
Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and
the DMI interconnect. The ICH6 is a centralized controller for the board’s I/O paths. The FWH
provides the nonvolatile storage of the BIOS.
For information about Refer to
The Intel 915G chipsethttp://developer.intel.com/
Resources used by the chipset Chapter 2
1.6.1Intel 915G Graphics Subsystem
The Intel 915G chipset contains two separate, mutually exclusive graphics options. Either the
GMA900 graphics controller (contained within the 82915G GMCH) is used, or a PCI Express x16
add-in card can be used. When a PCI Express x16 add-in card is installed, the GMA900 graphics
controller is disabled.
1.6.1.1Intel® GMA900 Graphics Controller
The Intel® GMA900 graphics controller features the following:
Hardware motion compensation for software MPEG2 decode
Two multiplexed DVO port interfaces with 200 MHz pixel clocks using an ADD2 card
•
Dynamic Video Memory Technology (DVMT) support up to 224 MB
®
•
For information about Refer to
DVMTSection 1.6.1.2, page 24
Obtaining graphics software and utilities Section 1.3, page 17
Zoom Utility
Intel
1.6.1.2Dynamic Video Memory Technology (DVMT)
DVMT enables enhanced graphics and memory performance through Direct AGP, and highly
efficient memory utilization. DVMT ensures the most efficient use of available system memory
for maximum 2-D/3-D graphics performance. Up to 224 MB of system memory can be allocated
to DVMT on systems that have 512 MB or more of total system memory installed. Up to 128 MB
can be allocated to DVMT on systems that have 256 MB but less than 512 MB of total installed
system memory. Up to 64 MB can be allocated to DVMT when less than 256 MB of system
memory is installed. DVMT returns system memory back to the operating system when the
additional system memory is no longer required by the graphics subsystem.
DVMT will always use a minimal fixed portion of system physical memory (as set in the BIOS
Setup program) for compatibility with legacy applications. An example of this would be when
using VGA graphics under DOS. Once loaded, the operating system and graphics drivers allocate
additional system memory to the graphics buffer as needed for performing graphics functions.
NOTE
The use of DVMT requires operating system driver support.
1.6.1.3Advanced Digital Display 2 (ADD2) Card Support
The GMCH routes two multiplexed DVO ports that are each capable of driving up to a 200 MHz
pixel clock to the PCI Express x16 connector. The DVO ports can be paired for a dual channel
configuration to support up to a 400 MHz pixel clock. When an ADD2 card is detected, the Intel
GMA900 graphics controller is enabled and the PCI Express x16 connector is configured for DVO
mode. DVO mode enables the DVO ports to be accessed by the ADD2 card. An ADD2 card can
either be configured to support simultaneous display with the primary VGA display or can be
configured to support dual independent display as an extended desktop configuration with different
color depths and resolutions. ADD2 cards can be designed to support the following
configurations:
•TV-Out (composite video)
•Transition Minimized Differential Signaling (TMDS) for DVI 1.0
•Low Voltage Differential Signaling (LVDS)
•Single device operating in dual channel mode
•VGA output
•HDTV output
24
Product Description
1.6.1.4Configuration Modes
A list of supported modes for the Intel GMA900 graphics controller is available as a downloadable
document.
For information about Refer to
Supported modes for the D915GEV boardhttp://www.intel.com/design/motherbd/ev/ev_prdoc.htm
Supported modes for the D915GRF boardhttp://www.intel.com/design/motherbd/rf/rf_prdoc.htm
1.6.2USB
The boards support up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH6 provides the USB controller for all ports. The port arrangement is as follows:
•
Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
•
Four ports are routed to two separate front panel USB connectors
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panelFigure 16, page 60
The location of the front panel USB connectorsFigure 17, page 62
1.6.3IDE Support
The board provides five IDE interface connectors:
•One parallel ATA IDE connector that supports two devices
•Four serial ATA IDE connectors that support one device per connector
1.6.3.1Parallel ATE IDE Interface
The ICH6’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface. The
Parallel ATA IDE interface supports the following modes:
•Programmed I/O (PIO): processor controls data transfer.
•8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
•Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
•ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
•ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH6’s ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to 88 MB/sec.
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The boards support Laser Servo (LS-120) diskette technology through the Parallel ATA IDE
interfaces. An LS-120 drive can be configured as a boot device by setting the BIOS Setup
program’s Boot menu to one of the following:
•
ARMD-FDD (ATAPI removable media device – floppy disk drive)
•
ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about Refer to
The location of the Parallel ATA IDE connectorFigure 17, page 62
1.6.3.2Serial ATA Interfaces
The ICH6’s Serial ATA controller offers four independent Serial ATA ports with a theoretical
maximum transfer rate of 150 MB/s per port. One device can be installed on each port for a
maximum of four Serial ATA devices. A point-to-point interface is used for host to device
connections, unlike Parallel ATA IDE which supports a master/slave configuration and two
devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for configurations
using the Windows* XP and Windows 2000 operating systems.
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA IDE connectorsFigure 17, page 62
26
Product Description
1.6.3.3SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1x2-pin connector that allows an add-in
hard drive controller to use the same LED as the onboard IDE controller. For proper operation,
this connector should be wired to the LED output of the add-in hard drive controller. The LED
indicates when data is being read from, or written to, either the add-in hard drive controller or the
onboard IDE controller (Parallel ATA or Serial ATA).
For information about Refer to
The location of the SCSI hard drive activity LED connectorFigure 17, page 62
The signal names of the SCSI hard drive activity LED connector Table 23, page 65
1.6.4Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
✏NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
1.7 PCI Express Connectors
The boards provide the following PCI Express connectors:
•One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes/sec
•Two PCI Express x1 connectors. The x1 interfaces support simultaneous transfer speeds up to
500 MBytes/sec
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface includes the following:
•Support for the PCI Express enhanced configuration mechanism
•Automatic discovery, link training, and initialization
•Support for Active State Power Management (ASPM)
•SMBus 2.0 support
•Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
•Software compatible with the PCI Power Management Event (PME) mechanism defined in the
The I/O controller provides the following features:
•
Two serial ports (Serial Port B is optional)
•
One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
•
Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
•
PS/2-style mouse and keyboard interfaces
•
Interface for one 1.44 MB or 2.88 MB diskette drive
•
Intelligent power management, including a programmable wake-up event interface
•
PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.8.1Serial Ports
The Desktop Board can support up to two serial port connectors. Serial port A is located on the
back panel. Serial port B (optional) is accessible using a connector on the component side of
board. The serial ports support data transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connectorFigure 16, page 60
The location of the serial port B connectorFigure 17, page 62
The signal names of the serial port B connectorTable 21, page 64
1.8.2Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS Setup
program to set the parallel port mode.
For information about Refer to
The location of the parallel port connectorFigure 16, page 60
1.8.3Diskette Drive Controller
The I/O controller supports one diskette drive. Use the BIOS Setup program to configure the
diskette drive interface.
For information about Refer to
The location of the diskette drive connectorFigure 17, page 62
1.8.4Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
28
Product Description
1.9 Audio Subsystem
The boards support the Intel High Definition audio subsystem based on the Realtek ALC860
codec. The audio subsystem supports the following features:
• Advanced jack sense (front and rear panel) that enables the audio codec to recognize the
device that is connected to an audio port. All jacks are capable of retasking according to user’s
definition, or can be automatically switched depending on the recognized device type.
• Stereo input and output for all jacks.
• A signal-to-noise (S/N) ratio of 90 dB.
INTEGRATOR’S NOTE
#
For the front panel jack sensing and automatic retasking feature to function, a front panel
daughter card that is designed for Intel High Definition Audio must be used. Otherwise, an AC ’97
style audio front panel connector will be assumed and the Line Out and Mic In functions will be
permanent.
1.9.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.3, page 17
1.9.2 Audio Connectors
The boards contain audio connector on both the back panel and the component side of the board.
The component-side audio connectors include the following:
• Front panel audio (a 2 x 5-pin connector that provides mic in and line out signals for front
panel audio connectors)
• ATAPI CD-ROM (an optional 1 x 4-pin ATAPI-style connector for connecting an internal
ATAPI CD-ROM drive to the audio mixer)
• S/PDIF (an optional 1 x 3 connector that provides S/PDIF output signals)
The functions of the back panel audio connectors are dependent on which subsystem is present.
For information about Refer to
The location of the front panel audio connector, the optional ATAPI CD-ROM
connector, and the optional S/PDIF connector.
The signal names of the front panel audio connector Table 20, page 64
The signal names of the optional ATAPI CD-ROM connector Table 19, page 64
The signal names of the optional S/PDIF connector Table 18, page 64