The Intel® Desktop Board DG31GL may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board DG31GL Specification Update.
March 2008
Order Number: E35969-001US
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board DG31GL Technical Product
Specification.
This product specification applies to only the standard Intel® Desktop Board DG31GL with BIOS
identifier GLG3110H.86A.
Changes to this specification will be published in the Intel Desktop Board DG31GL Specification
Update before being incorporated into a revision of this document.
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March 2008
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®
desktop boards may contain design defects or errors known as errata, which may cause the product
Intel
to deviate from published specifications. Current characterized errata are available on request.
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This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for the Intel
Desktop Board DG31GL. It describes the standard product and available
manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Board
DG31GL and its components to the vendors, system integrators, and other engineers
and technicians who need this level of information. It is specifically not intended for
general audiences.
What This Document Contains
®
Chapter Description
1 A description of the hardware used on the board
2 A map of the resources of the board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
5 Regulatory compliance and battery disposal information
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
#
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
Integrator’s notes are used to call attention to information that may be useful to
system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
# Used after a signal name to identify an active-low signal (such as USBP0#)
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
Gbit Gigabit (1,073,741,824 bits)
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
Audio 4-channel (2+2) audio subsystem using the Realtek* ALC268-GR audio codec
Video Intel
Legacy I/O Control Legacy I/O controller for diskette drive, PS/2 ports, and serial port header
Peripheral
Interfaces
LAN Support 10/100 Mbits/sec LAN subsystem using the Intel® 82562G Ethernet Controller
BIOS • Intel® BIOS (resident in the SPI Flash device)
®
• Intel
Core™2 Quad® processor in an LGA775 socket with a 1333 MHz or 1066
MHz system bus
®
• Intel
Core™2 Duo processor in an LGA775 socket with a 1333 MHz,
1066 MHz, or 800 MHz system bus
®
• Intel
Pentium® Dual-Core processor in an LGA775 socket with an 800 MHz
system bus
®
• Intel
Celeron® processor in an LGA775 socket with an 800 MHz system bus
• Support for DDR2 800 or DDR2 667 MHz DIMMs
• Support for up to 4 GB of system memory using DDR2 800 or
DDR2 667 DIMMs
®
G31 Express Chipset, consisting of:
Intel
®
• Intel
• Intel
82G31 Graphics and Memory Controller Hub (GMCH)
®
82801GB I/O Controller Hub (ICH7)
®
Graphics Media Accelerator (Intel® GMA) 3100 onboard graphics subsystem
• Eight USB 2.0 ports
• PS/2 ports on back panel for mouse and keyboard
• Two Serial ATA (3 Gbps) interfaces
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One serial port header (may require specialized chassis or cable for use)
• One diskette drive connector
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
and SMBIOS
continued
10
Table 1. Feature Summary (continued)
Instantly Available
PC Technology
Expansion
Capabilities
Hardware Monitor
Subsystem
• Support for PCI* Local Bus Specification Revision 2.3
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, USB ports, and LAN
• Two PCI Conventional bus connectors
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Two fan headers
• Two fan sense inputs used to monitor fan activity
Figure 1 shows the location of the major components.
Figure 1. Major Board Components
Table 2 lists the components identified in Figure 1.
12
Table 2. Board Components Shown in Figure 1
Item/callout
from
Figure 1 Description
A PCI Conventional bus add-in card connector
B PCI Conventional bus add-in card connector
C Battery
D S/PDIF connector
E Back panel connectors
F Processor core power connector (2 X 2)
G Rear chassis fan connector
H LGA775 processor socket
I Processor fan header
J DIMM Channel A sockets
K DIMM Channel B sockets
L Serial port header
M Diskette drive connector
N Main power connector (2 X 12)
O Parallel ATA connector
P Intel 82G31 GMCH
Q Intel 82801GB I/O Controller Hub (ICH7)
R Serial ATA connectors [2]
S Front panel header
T Auxiliary front panel power LED header
U BIOS Setup configuration jumper block
V Front panel USB header
Figure 2 is a block diagram of the major functional areas.
14
Figure 2. Block Diagram
Product Description
1.2 Legacy Considerations
This board differs from other Intel Desktop Board products, with specific changes
including (but not limited to) the following:
• No parallel port
• No serial port on the back panel
• The serial port header is located near the memory sockets and may require a
specialized chassis or cabling solution to use
1.3 Online Support
To find information about… Visit this World Wide Web site:
Intel® Desktop Board DG31GL http://www.intel.com/products/motherboard/DG31GL/index.htm
Desktop Board Support http://support.intel.com/support/motherboards/desktop
Available configurations for the
Desktop Board DG31GL
Supported processors http://www.intel.com/go/findcpu
Chipset information http://www.intel.com/products/desktop/chipsets/index.htm
BIOS and driver updates http://downloadcenter.intel.com
The board is designed to support the following processors:
•Intel Core 2 Quad processor in an LGA775 socket with a 1333 MHz or 1066 MHz
system bus
•Intel Core 2 Duo processor in an LGA775 socket with a 1333 MHz, 1066 MHz, or
800 MHz system bus
•Intel Pentium Dual-Core processor in an LGA775 socket with an 800 MHz
system bus
•Intel Celeron processor in an LGA775 socket with an 800 MHz system bus
Other processors may be supported in the future. This board is designed to support
processors with a maximum wattage of 95 W. The processors listed above are only
supported when falling within the wattage requirements of the DG31GL board. See
the Intel web site listed below for the most up-to-date list of supported processors.
The board has two DIMM sockets and support the following memory features:
• 1.8 V (only) DDR2 SDRAM DIMMs with gold-plated contacts
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
•4 GB maximum total system memory using DDR2 800 or DDR2 667 DIMMs; refer
to Section
2.1.1 on page 37 for information on the total amount of addressable
memory.
• Minimum total system memory: 512 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 800 or DDR2 667 MHz SDRAM DIMMs
• DDR2 667 DIMMs with SPD timings of only 5-5-5 (tCL-tRCD-tRP)
• DDR2 800 DIMMs with SPD timings of only 5-5-5 or 6-6-6 (tCL-tRCD-tRP)
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
The Intel 82G31 GMCH supports the following types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for
real world applications. Dual channel mode is enabled when the installed memory
capacities of both DIMM channels are equal. Technology and device width can vary
from one channel to the other but the installed memory capacity for each channel
must be equal. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single DIMM is installed or the memory capacities are unequal. Technology and
device width can vary from one channel to the other. If different speed DIMMs are
used between channels, the slowest memory timing will be used.
•Flex mode. This mode provides the most flexible performance characteristics.
The bottommost DRAM memory (the memory that is lowest within the system
memory map) is mapped to dual channel operation; the topmost DRAM memory
(the memory that is nearest to the 4 GB address space limit), if any, is mapped to
single channel operation. Flex mode results in multiple zones of dual and single
channel operation across the whole of DRAM memory. To use flex mode, it is
necessary to populate both channels.
Figure 3 illustrates the memory channel and DIMM configuration.
Figure 3. Memory Channel and DIMM Configuration
18
Product Description
1.6 Intel® G31 Express Chipset
The Intel G31 Express chipset consists of the following devices:
•Intel 82G31 Graphics and Memory Controller Hub (GMCH) with Direct Media
Interface (DMI) interconnect
•Intel 82801GB I/O Controller Hub (ICH7) with DMI interconnect
The GMCH component provides interfaces to the CPU, memory, and the DMI
interconnect. The component also provides integrated graphics capabilities supporting
3D, 2D, and display capabilities. The ICH7 is a centralized controller for the board’s
I/O paths.
The chipset supports the following features:
• Onboard Graphics
• Dynamic Video Memory Technology
• USB
• Serial ATA
For information about Refer to
The Intel G31 Express chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapter 2
1.6.1 Intel G31 Graphics Subsystem
1.6.1.1 Intel® Graphics Media Accelerator 3100 Graphics
Controller
The Intel GMA 3100 graphics controller features the following:
• 400 MHz core frequency
• High quality texture engine
⎯ DX9.0c* and OpenGL* 1.4 compliant
⎯ Hardware Pixel Shader 2.0
⎯ Vertex Shader Model 2.0
• 3D Graphics Rendering enhancements
⎯ 1.6 dual texture GigaPixel/sec max fill rate
⎯ 16-bit and 32-bit color
⎯ Vertex cache
• Video
⎯ Software DVD at 30 fps full screen
⎯ DVMT support up to 256 MB
• Display
⎯ Supports analog displays up to 2048 x 1536 at 75 Hz refresh (QXGA)
DVMT enables enhanced graphics and memory performance through highly efficient
memory utilization. DVMT ensures the most efficient use of available system memory
for maximum 2-D/3-D graphics performance. Up to 256 MB of system memory can be
allocated to DVMT on systems that have 512 MB or more of total system memory
installed. DVMT returns system memory back to the operating system when the
additional system memory is no longer required by the graphics subsystem.
DVMT will always use a minimal fixed portion of system physical memory (as set in the
BIOS Setup program) for compatibility with legacy applications. An example of this
would be when using VGA graphics under DOS. Once loaded, the operating system
and graphics drivers allocate additional system memory to the graphics buffer as
needed for performing graphics functions.
NOTE
The use of DVMT requires operating system driver support.
1.6.2 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers.
The ICH7 provides the USB controller for all ports. The port arrangement is as
follows:
• Four ports are implemented with stacked back panel connectors
• Four ports are routed to two separate front panel USB headers
For information about Refer to
The location of the USB connectors on the back panel Figure 9, page 41
The location of the front panel USB headers Figure 10, page 42
1.6.3 IDE Support
The board provides three IDE interface connectors:
• One parallel ATA IDE connector that supports two devices
• Two serial ATA IDE connectors that support one device per connector
1.6.3.1 Parallel ATE IDE Interface
The ICH7’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE
interface. The Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to
16 MB/sec.
•Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 33 MB/sec.
20
Product Description
•ATA-66: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is
device driver compatible.
•ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH7’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer
rates up to 88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce
reflections, noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives)
and ATA devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector
(ECHS) translation modes. The drive reports the transfer rate and translation mode to
the BIOS.
For information about Refer to
The location of the Parallel ATA IDE connector Figure 10, page 42
1.6.3.2 Serial ATA Interfaces
The ICH7’s Serial ATA controller offers two independent Serial ATA ports with a
theoretical maximum transfer rate of 3 Gbits/sec per port. One device can be installed
on each port for a maximum of two Serial ATA devices. A point-to-point interface is
used for host to device connections, unlike Parallel ATA IDE which supports a
master/slave configuration and two devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the
operating system. The Serial ATA controller can operate in both legacy and native
modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14
and 15). In Native mode, standard PCI Conventional bus resource steering is used.
Native mode is the preferred mode for configurations using the Windows* XP
operating system.
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or
power supplies equipped with low-voltage power connectors.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one.
Figure 1 on page 12 shows the location of the battery.
1.8 Legacy I/O Controller
The Winbond W83627DHG-B Legacy I/O controller provides the following features:
•Serial IRQ interface compatible with serialized IRQ support for PCI Conventional
bus systems
• Serial port via an onboard header
• PS/2-style mouse and keyboard interfaces
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.8.1 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported
in the top PS/2 connector. Power to the computer should be turned off before a
keyboard or mouse is connected or disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 9, page 41
22
Product Description
1.9 Audio Subsystem
The board supports the Intel High Definition audio subsystem based on the Realtek
ALC268-GR audio codec. The audio subsystem supports the following features:
•Advanced jack sense for the back panel audio jacks that enables the audio codec to
recognize the device that is connected to an audio port. The back panel audio
jacks are capable of retasking according to user’s definition, or can be
automatically switched depending on the recognized device type.
• Stereo input and output for all back panel jacks
• Line out and mic in functions for front panel audio jacks
• A signal-to-noise (S/N) ratio of 95 dB
Table 4 lists the supported functions of the front panel and back panel audio jacks.
Table 4. Audio Jack Retasking Support
Audio Jack
Front panel – Green No Yes No Yes
Front panel – Pink Yes No No No
Back panel – Blue No No Yes No
Back panel – Green No Yes No Yes
Back panel – Pink Yes No No No
Supports
Microphone?
Supports
Line Out?
Supports
Line In?
Supports
Front Speaker
Headphones?
1.9.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section
1.2, page 15
1.9.2 Audio Connectors
The board contains audio connectors/headers on both the back panel and the
component side of the board. The front panel audio header provides mic in and line
out signals for the front panel.
For information about Refer to
The location of the front panel audio header
The signal names of the front panel audio header Table 11, page 44
The back panel audio connectors Section 2.2.1, page 41