The Intel® Desktop Board D945PSN may contain design defects or errors known as errata that m a y cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D945PSN Specification Update.
May 2005
Order Number: D14073-001US
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D945PSN Technical Product
Specification.
This product specification applies to only the standard Intel Desktop Board D945PSN with BIOS
identifier SN94510J.86A.
Changes to this specification will be published in the Intel Desktop Board D945PSN Specification
Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED
BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH
PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT,
COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDED FOR USE IN
MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.
All Intel desktop boards are evaluated as Information Technology Equipment (I.T.E.) for use in personal computers (PC) for
installation in homes, offices, schools, computer rooms, and similar locations. The suitability of this product for other PC or
embedded non-PC applications or other environments, such as medical, industrial, alarm systems, test equipment, etc. may
not be supported without further evaluation by Intel.
May 2005
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property
rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not
provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other
intellectual property rights.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.”
Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising
from future changes to them.
®
Intel
desktop boards may contain design defects or errors known as errata, which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel, Pentium, and Celeron are registered trademarks of Intel Corporation or its subsidiaries in the United States and other
countries.
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for the Intel
describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Board D945PSN
and its components to the vendors, system integrators, and other engineers and technicians who
need this level of information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the Desktop Board D945PSN
2 A map of the resources of the Desktop Board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
®
Desktop Board D945PSN. It
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
#
Integrator’s notes are used to call attention to information that may be useful to system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the Desktop Board D945PSN, and X is the instance of the
particular part at that general location. For example, J5J1 is a connector, located at 5J. It is
the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
Gbits/sec Gigabits per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
• Support for DDR2 667, DDR2 533, or DDR2 400 MHz DIMMs
• Support for up to 4 GB of system memory
Intel® 945P Chipset, consisting of:
• Intel®82945P Memory Controller Hub (MCH)
• Intel®82801G I/O Controller Hub (ICH7)
One PCI Express* x16 bus add-in card connector
6-channel (5.1) audio subsystem with three analog audio outputs using the
Sigmatel 9220 audio codec
Legacy I/O controller for diskette drive, serial, parallel, and PS/2* ports
Support for USB 2.0 devices
• Eight USB ports
• One serial port
• One parallel port
• Four Serial ATA interfaces
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2 keyboard and mouse ports
Refer to Table 2 on page 11 for a description of LAN subsystem options.
®
• Intel
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
• Four PCI Conventional* bus connectors
• Two PCI Express x1 bus add-in card connectors
• One PCI Express x16 bus add-in card connector
• Support for PCI Local Bus Specification Revision 2.3
• Support for PCI Express Revision 1.0a
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, and USB ports
• Hardware monitoring and fan control ASIC
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Three fan connectors
• Three fan sense inputs used to monitor fan activity
• Fan speed control
BIOS (resident in the SPI Flash device)
and SMBIOS
Pentium® 4 processor in an LGA775 socket with a 1066, 800,
10
Product Description
1.1.2 Manufacturing Options
Table 2 describes the manufacturing options. Not every manufacturing option is available in all
marketing channels. Please contact your Intel representative to determine which manufacturing
options are available to you.
Table 2. Manufacturing Options
Auxiliary fan
connector
IEEE-1394a
Interface
LAN subsystem
SATA RAID
SCSI Hard Drive
Activity LED
Connector
Trusted Platform
Module (TPM),
revision 1.2
For information about Refer to
Available configurations for the board Section 1.2, page 15
Additional fan connector for use in larger chassis
IEEE-1394a controller and three IEEE-1394a connectors (one back panel connector,
two front-panel connectors)
The board provides one of the following:
• Gigabit (10/100/1000 Mbits/sec) LAN subsystem using the Intel® 82573V/82574V
Gigabit Ethernet Controller
• 10/100 Mbits/sec LAN subsystem using the Intel
(PLC) device
Intel® 82801GR I/O Controller Hub (ICH7-R) for RAID support (levels 0,1, 0+1, and 5)
on the SATA interface
Allows add-in hard drive controllers (SCSI or other) to use the same LED as the
onboard IDE controller.
Figure 2 is a block diagram of the major functional areas.
PCI Express x1 Slot 1
PCI Express x1 Slot 2
Parallel ATA
IDE Connector
LGA775
Processor Socket
PCI Express
x16 Interface
PCI Express
x16
Connector
Channel A
DIMMs (2)
Channel B
DIMMs (2)
PCI Express x1 Interface
Parallel ATA
IDE Interface
System Bus
(1066/800/533 MHz)
Intel 945P Chipset
Intel 82945P
Memory Controller
Hub (MCH)
Dual-Channel
Memory Bus
SMBus
Gigabit Ethernet
Controller (Optional)
USB
Legacy
I/O
Controller
LPC
Bus
Intel 82801G
I/O Controller Hub
(ICH7)
DMI Interconnect
Interface
LAN Connect
Back Panel/Front Panel
USB Ports
Serial Port
Parallel Port
PS/2 Mouse
PS/2 Keyboard
Serial Peripheral
Interface (SPI)
Flash Device
LPC
Bus
10/100
LAN PLC
(Optional)
TPM Component
LAN
Connector
Diskette Drive
Connector
(Optional)
LAN
Connector
IEEE-1394a Connectors
(optional)
PCI Slot 1
PCI Slot 2
PCI Slot 3
PCI Slot 4
= connector or socket
IEEE-1394a
Controller
(optional)
PCI Bus
SMBus
Hardware Monitoring
and Fan Control ASIC
PCI
Bus
Figure 2. Block Diagram
14
Serial ATA
High Definition Audio Link
IDE Interface
Audio
Codec
Line In/Retaski ng Jack
Line Out/Retasking Jack
Mic In/Retasking Jack
Serial ATA IDE
Connectors (4)
Line Out
Mic In
OM17953
Product Description
1.2 Online Support
To find information about… Visit this World Wide Web site:
®
Desktop Board D945PSN under
Intel
“Desktop Board Products” or “Desktop
Board Support”
Available configurations for the Desktop
Board D945PSN
Processor data sheets http://www.intel.com/design/litcentr
ICH7 addressing http://developer.intel.com/products/chipsets
Custom splash screens http://intel.com/design/motherbd/gen_indx.htm
Audio software and utilities http://www.intel.com/design/motherbd
LAN software and drivers http://www.intel.com/design/motherbd
Supported video modes http://www.intel.com/design/motherbd/sn/sn_documentation.htm
The board is designed to support Intel Pentium 4 processors in an LGA775 processor socket with a
1066, 800, or 533 MHz system bus. See the Intel web site listed below for the most up-to-date list
of supported processors.
The board has four DIMM sockets and support the following memory features:
• 1.8 V (only) DDR2 SDRAM DIMMs with gold-plated contacts
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
• 4 GB maximum total system memory. Refer to Section 2.2.1 on page 39 for information on the
total amount of addressable memory.
• Minimum total system memory: 128 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 667, DDR2 533, or DDR2 400 MHz SDRAM DIMMs
NOTES
• Remove the PCI Express x16 video card before installing or upgrading memory to avoid
interference with the memory retention mechanism.
• To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure.
This allows the BIOS to read the SPD data and program the chipset to accurately configure
memory settings for optimum performance. If non-SPD memory is installed, the BIOS will
attempt to correctly configure the memory settings, but performance and reliability may be
impacted or the DIMMs may not function under the determined frequency.
Table 4 lists the supported DIMM configurations.
Table 4. Supported Memory Configurations
DIMM
Capacity
128 MB SS 256 Mbit 16 M x 16/empty 4
256 MB SS 256 Mbit 32 M x 8/empty 8
256 MB SS 512 Mbit 32 M x 16/empty 4
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
512 MB SS 512 Mbit 64 M x 8/empty 8
512 MB SS 1 Gbit 64 M x 16/empty 4
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16
1024 MB SS 1 Gbit 128 M x 8/empty 8
2048 MB DS 1 Gbit 128 M x 8/128 M x 8 16
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers
to single-sided memory modules (containing one row of SDRAM).
INTEGRATOR’S NOTE
#
Configuration
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
It is possible to install four 2048 MB (2 GB) modules for a total of 8 GB of system memory,
however, only 4 GB of address space is available. Refer to Section 2.2.1, on page 39 for additional
information on available memory.
16
Product Description
1.4.1 Memory Configurations
The Intel 82945P MCH supports two types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for real world
applications. Dual channel mode is enabled when the installed memory capacities of both
DIMM channels are equal. Technology and device width can vary from one channel to the
other but the installed memory capacity for each channel must be equal. If different speed
DIMMs are used between channels, the slowest memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth
operation for real world applications. This mode is used when only a single DIMM is installed
or the memory capacities are unequal. Technology and device width can vary from one
channel to the other. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
Figure 3 illustrates the memory channel and DIMM configuration.
NOTE
The DIMM0 sockets of both channels are blue. The DIMM1 sockets of both channels are black.
Figure 4 shows a dual channel configuration using two DIMMs. In this example, the DIMM0
(blue) sockets of both channels are populated with identical DIMMs.
1 GB
Channel A, DIMM 0
Channel A, DIMM 1
1 GB
Channel B, DIMM 0
Channel B, DIMM 1
OM17123
Figure 4. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
Figure 5 shows a dual channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM0
(blue) socket of Channel B.
256 MB
256 MB
Channel A, DIMM 0
Channel A, DIMM 1
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17122
Figure 5. Dual Channel (Interleaved) Mode Configuration with Three DIMMs
18
Product Description
Figure 6 shows a dual channel configuration using four DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in
Channel B. Also, the DIMMs are matched between DIMM0 and DIMM1 of both channels.
256 MB
512 MB
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17124
Figure 6. Dual Channel (Interleaved) Mode Configuration with Four DIMMs
1.4.1.2 Single Channel (Asymmetric) Mode Configurations
NOTE
Dual channel (Interleaved) mode configurations provide the highest memory throughput.
Figure 7 shows a single channel configuration using one DIMM. In this example, only the DIMM0
(blue) socket of Channel A is populated. Channel B is not populated.
256 MB
Figure 7. Single Channel (Asymmetric) Mode Configuration with One DIMM
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17125
Figure 8 shows a single channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the
DIMM0 (blue) socket of Channel B.
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
Figure 8. Single Channel (Asymmetric) Mode Configuration with Three DIMMs
20
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17126
Product Description
1.5 Intel® 945P Chipset
The Intel 945P chipset consists of the following devices:
• Intel 82945P Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect
• Intel 82801G I/O Controller Hub (ICH7) with DMI interconnect
The MCH component provides interfaces to the CPU, memory, PCI Express, and the DMI
interconnect. The ICH7 is a centralized controller for the board’s I/O paths.
For information about Refer to
The Intel 945P chipset http://developer.intel.com/
Resources used by the chipset Chapter 2
1.5.1 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH7 provides the USB controller for all ports. The port arrangement is as follows:
• Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
• Four ports are routed to two separate front panel USB connectors
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 16, page 47
The location of the front panel USB connectors Figure 17, page 48
• One parallel ATA IDE connector that supports two devices
• Four serial ATA IDE connectors that support one device per connector
1.5.2.1 Parallel ATE IDE Interface
The ICH7’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface. The
Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH7’s ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to 88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
For information about Refer to
The location of the Parallel ATA IDE connector Figure 17, page 48
1.5.2.2 Serial ATA Interfaces
The ICH7’s Serial ATA controller offers four independent Serial ATA ports with a theoretical
maximum transfer rate of 3 Gbits/sec per port. One device can be installed on each port for a
maximum of four Serial ATA devices. A point-to-point interface is used for host to device
connections, unlike Parallel ATA IDE which supports a master/slave configuration and two devices
per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for configurations
using the Windows* XP and Windows 2000 operating systems.
22
Product Description
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA IDE connectors Figure 17, page 48
1.5.2.3 Serial ATA RAID (Optional)
The optional ICH7-R supports the following RAID (Redundant Array of Independent Drives)
levels:
•RAID 0 - data striping. Multiple physical drives can be teamed together to create one logical
drive. As data is written or retrieved from the logical drive, both drives operate in parallel, thus
increasing the throughput. The ICH7-R allows for more than two drives to be used in a
RAID 0 configuration.
•RAID 1 - data mirroring. Multiple physical drives maintain duplicate sets of all data on
separate disk drives. Level 1 provides the highest data reliability because two complete copies
of all information are maintained. The ICH7-R allows for two or four drives to be used in a
RAID 1 configuration.
•RAID 0+1 (or RAID 10) - data striping and mirroring. RAID 0+1 combines multiple mirrored
drives (RAID 1) with data striping (RAID 0) into a single array. This provides the highest
performance with data protection. Data is striped across all mirrored sets. RAID 0+1 utilizes
several drives to stripe data (increased performance) and then makes a copy of the striped
drives to provide redundancy. The mirrored disks eliminate the overhead and delay of parity.
•RAID 5 - distributed parity. RAID Level 5 stripes data at a block level across several drives
and distributes parity among the drives; no single disk is devoted to parity. Because parity data
is distributed on each drive, read performance tends to be lower than other RAID types.
RAID 5 requires the use of three or four drives.
1.5.2.4 SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
hard drive controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in hard drive controller. The LED
indicates when data is being read from, or written to, either the add-in hard drive controller or the
onboard IDE controller (Parallel ATA or Serial ATA).
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 17, page 48
The signal names of the SCSI hard drive activity LED connector Table 20, page 50
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
1.6 PCI Express Connectors
The board provides the following PCI Express connectors:
• One PCI Express x16 connector supporting simultaneous transfer speeds up to 8 GBytes/sec
• Two PCI Express x1 connectors. The x1 interfaces support simultaneous transfer speeds up to
500 MBytes/sec
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface include the following:
• Support for the PCI Express enhanced configuration mechanism
• Automatic discovery, link training, and initialization
• Support for Active State Power Management (ASPM)
• SMBus 2.0 support
• Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
• Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
1.7 IEEE-1394a Connectors (Optional)
The optional IEEE-1394a interface addresses interconnection of both computer peripherals and
consumer electronics. The IEEE-1394a interface provides a throughput ranging from
100 Mbits/sec to 400 Mbits/sec. As a manufacturing option, the board includes three IEEE-1394a
connectors as follows:
• One IEEE-1394a connector located on the back panel.
• Two IEEE-1394a front-panel connectors located on the component side.
For information about Refer to
The location of the back panel IEEE-1394a connector Figure 16, page 47
The location of the front panel IEEE-1394a connectors Figure 17, page 48
The signal names of the front panel IEEE-1394a connectors Section 2.8.2.7, page 56
24
Product Description
1.8 Legacy I/O Controller
The legacy I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.44 MB or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the legacy I/O controller.
1.8.1 Serial Port
The Serial port A connector is located on the back panel. The serial port supports data transfers at
speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 16, page 47
1.8.2 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS Setup
program to set the parallel port mode.
For information about Refer to
The location of the parallel port connector Figure 16, page 47
1.8.3 Diskette Drive Controller
The legacy I/O controller supports one diskette drive. Use the BIOS Setup program to configure
the diskette drive interface.
For information about Refer to
The location of the diskette drive connector Figure 17, page 48
1.8.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2
connector. Power to the computer should be turned off before a keyboard or mouse is connected or
disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 16, page 47
The board supports the Intel® High Definition audio subsystem based on the Sigmatel* 9220 audio
codec. The audio subsystem supports the following features:
• Advanced jack sense for the back panel audio jacks that enables the audio codec to recognize
the device that is connected to an audio port. The back panel audio jacks are capable of
retasking according to user’s definition, or can be automatically switched depending on the
recognized device type.
• Stereo input and output for all back panel jacks
• Line out and Mic in functions for front panel audio jacks
• A signal-to-noise (S/N) ratio of 95 dB
1.9.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.2, page 15
1.9.2 Audio Connectors
The board contains audio connectors on both the back panel and the component side of the board.
The front panel audio connector provides mic in and line out signals for the front panel.
For information about Refer to
The location of the front panel audio connector Figure 17, page 48
The signal names of the front panel audio connector Table 18, page 50
The back panel audio connectors Section 2.8.1, page 47
26
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