The BL440ZX motherboard may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata
are documented in the BL440ZX Motherboard Specification Update.
Revision History
RevisionRevision HistoryDate
-001First release of the BL440ZX Motherboard Technical Product
Specification.
This product specification applies only to standard BL440ZX motherboards with BIOS identifier
4B4LZ0XA.86A.000X.P0X.
Changes to this specification will be published in the BL440ZX Motherboard Specification Update
before being incorporated into a revision of this document.
December 1998
Information in this doc ument is provided in connec tion with Intel product s. No license, express or impl ied, by est oppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and
Conditions of Sale for such products, Intel ass umes no liability whatsoever, and Intel disc laims any express or implied
warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular
purpose, merchantability, or infringement of any patent, copyright or other intellectual propert y right Intel products are not
designed, intended or authorized for use in any medical, life saving, or life sustaining applications or for any other
application in which the failure of the Intel product could create a situation where personal injury or death may occur.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
The BL440ZX motherboard may contain design defects or errors known as errata whi ch may cause the produc t to deviate
from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents whic h have an ordering number and are referenc ed in this docum ent, or other Intel lit erature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
†
Third party brands and names are the property of their respective owners.
Copyright Intel Corporation, 1998.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and BIOS for the BL440ZX motherboard. It describes the
standard motherboard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the motherboard and its
components to the vendors, system integrators, and other engineers and technicians who need this
level of information. It is specifically not intended for general audiences.
What This Document Contains
ChapterDescription
1A description of the hardware used on this board
2A map of the resources of the board
3The features supported by the BIOS Setup program
4The contents of the BIOS Setup program’s menus and submenus
5A description of the BIOS error messages, beep codes, and Power On Self Tests
(POST) codes
6A list of where to find information about specifications supported by the
motherboard
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
Warnings indicate conditions that, if not observed, can cause personal injury.
Other Common Notation
‡
#Used after a signal name to identify an active-low signal (such as USBP0#).
(NxnX)When used in the description of a component, N indicates component type, xn are the relative
KBKilobyte (1024 bytes).
KbitKilobit (1024 bits).
MBMegabyte (1,048,576 bytes).
MbitMegabit (1,048,576 bits).
GBGigabyte (1,073,741,824 bytes).
xxhAn address or data value ending with a lowercase h indicates a hexadecimal value.
x.x VVolts. Voltages are DC unless otherwise specified.
†
Indicates a feature that is implemented—at least in part—on a riser card.
coordinates of its location on the motherboard, and X is the instance of the particular part at that
general location. For example, J5J1 is a connector, located at 5J. It is the first connector in the
5J area.
This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
The BL440ZX motherboard is a versatile platform that offers a wide variety of features. Some of
the features are implemented—at least in part—on the riser card. Throughout this manual, the
symbol is used to indicate such a feature. Because there is no standard riser card, no detailed
description of an implementation can be given. See Section 6.2 to obtain NLX riser card design
information.
The BL440ZX motherboard’s features are summarized below.
Form FactorNLX (10.0 inches by 8.25 inches)
Processor
• Support for SMBIOS, ACPI, APM, Management Level 3.0, and Plug and
®
82443ZX PCI/AGP controller (PAC)
®
82371EB PCI/ISA IDE Xcelerator (PIIX4E)
(SDRAM)
†
keyboard
ES1373 AC ’97 v1.03 digital controller
Play (see Section 6.2 for specification compliance levels)
®
Celeron™ processor on the 66-MHz host bus
†
AudioPCI† 64V audio using the Ensoniq
†
2X AGP controller
‡
10
Motherboard Description
Not all of the following manufacturing options are available in all marketing channels. Please
contact your Intel representative to determine what manufacturing options are available to you.
Manufacturing Options
Front Panel USB
Onboard Chassis
Intrusion Detection
‡
One of the two USB channels routed to the riser card
Photo sensor on the motherboard
Piezoelectric speaker
GIntel 82371EB PIIX4EPIntel 82559 LAN controller
HProcessor fan connectorQSMSC FDC37M807 I/O controller
IBattery
MNDIMM sockets
OATI RAGE PRO TURBO 2X AGP graphics
K
®
Intel
82443ZX PAC
controller
I
H
OM07455
12
Figure 1. Motherboard Components
Motherboard Description
1.2 Microprocessor
The motherboard supports a socketed Celeron processor. The processor’s VID pins automatically
program the voltage regulator on the motherboard to the required processor voltage. The processor
connects to the motherboard through the 370-pin PGA370S socket.
The motherboard supports the processors listed in Table 1.
Table 1.Processors Supported by the Motherboard
Processor SpeedHost Bus FrequencyCache Size
300A MHz
333 MHz
366 MHz
66 MHz
66 MHz
66 MHz
128 KB
128 KB
128 KB
All supported onboard memory can be cached.
1.3 Main Memory
The motherboard has two dual inline memory module (DIMM) sockets. SDRAM can be installed
in one or both sockets. The motherboard also supports both serial presence detect (SPD) and nonSPD data structures.
2
Using the SPD data structure programmed into an E
PROM on the DIMM, the BIOS can
determine the SDRAM size and speed. Using the non-SPD data structure, the BIOS will
dynamically determine SDRAM size and speed. Minimum memory size is 16 MB; maximum
memory size is 256 MB. Memory size and speed can vary between sockets. The BIOS can
support an SPD SDRAM DIMM in one socket and a non-SPD SDRAM DIMM in the other.
CAUTION
BIOS recovery cannot be done using non-SPD DIMMs. SPD data structure is required for the
recovery process.
The motherboard supports the following memory features:
• 168-pin DIMMs with gold-plated contacts
• 66-MHz or 100-MHz unbuffered SDRAM on the 66-MHz host bus
The motherboard supports single- or double-sided DIMMs in the following sizes:
DIMM
Capacity
16 MB2 Mbit X 6416 Mbit1 M X 168
16 MB2 Mbit X 6416 Mbit2 M X 88
16 MB2 Mbit X 6464 Mbit2 M X 322
32 MB4 Mbit X 6416 Mbit2 M X 816*
32 MB4 Mbit X 6464 Mbit2 M X 324
32 MB4 Mbit X 6464 Mbit4 M X 164
64 MB8 Mbit X 6464 Mbit4 M X 168
64 MB8 Mbit X 6464 Mbit8 M X 88
128 MB16 Mbit X 6464 Mbit8 M X 816*
* If the number of SDRAMs is greater than nine, the DIMM will be double-sided.
NOTE
✏
DIMM
Organization
SDRAM
Density
SDRAM
Organization
Number of
SDRAMs
All memory components and DIMMs used with the BL440ZX motherboard must comply with the
PC SDRAM Unbuffered DIMM Specification. You can access this document through the Internet
at: http://www.intel.com/design/pcisets/memory/
See Section 6.2 for information about this SDRAM DIMM specification.
14
Motherboard Description
1.4 Chipset
The Intel 82440ZX AGPset includes a Host-PCI bridge integrated with both an optimized DRAM
controller and an Accelerated Graphics Port (AGP) interface. The I/O subsystem of the 82440ZX
is based on the PIIX4E, which is a highly integrated PCI-ISA/IDE Accelerator Bridge.
1.4.1 Intel 82443ZX PCI/AGP Controller
The Intel 82443ZX PCI/AGP controller (PAC) provides bus-control signals, address paths, and
data paths for transfers between the processor’s host bus, PCI bus, the AGP, and main memory.
The PAC features:
• Processor interface control
Support for 66-MHz processor host bus
32-bit addressing
Desktop optimized GTL+ compliant host bus interface
• Integrated DRAM controller, with support for
+3.3 V only DIMM DRAM configurations
Up to two double-sided DIMMs
100-MHz or 66-MHz SDRAM on the 66-MHz host bus
DIMM serial presence detect via SMBus interface
16- and 64-Mbit devices with 2 KB, 4 KB, and 8 KB page sizes
x 4, x 8, x 16, and x 32 DRAM widths
Symmetrical and asymmetrical DRAM addressing
• AGP interface
Complies with the AGP specification (see Section 6.2 for specification information)
Support for a 2X AGP device
Synchronous coupling to the host bus frequency
• PCI bus interface
Complies with the PCI specification Rev. 2.1, +5 V 33-MHz interface (see Section 6.2 for
specification information)
Asynchronous coupling to the host-bus frequency
PCI parity generation support
Data streaming support from PCI-to-DRAM
Support for four PCI bus masters in addition to the host and PCI-to-ISA I/O bridge
Support for concurrent host, AGP, and PCI transactions to main memory
• Data buffering
DRAM write buffer with read-around-write capability
Dedicated host-to-DRAM, PCI0-to-DRAM, and PCI1/AGP-to-DRAM read buffers
AGP dedicated inbound/outbound FIFOs, used for temporary data storage
The Intel 82371EB PCI ISA IDE Xcelerator (PIIX4E) is a multifunction PCI device implementing
the PCI-to-ISA bridge, PCI IDE functionality, Universal Serial Bus (USB) host/hub functionality,
and enhanced power management. The PIIX4E features:
• Multifunction PCI-to-ISA bridge
Support for the PCI bus at 33 MHz
PCI specification compliance (see Section 6.2 for specification information)
Full ISA bus support
• USB controller
Two USB ports (see Section 6.2 for specification information)
Legacy support for USB keyboard and mouse
Support for the Universal Host Controller Interface (UHCI) Design Guide, revision 1.1,
interface
• Integrated dual-channel enhanced IDE interface
Support for up to four IDE devices
PIO Mode 4 transfers up to 16 MB/sec
Support for Ultra DMA/33 synchronous DMA mode transfers up to 33 MB/sec
Bus master mode with an 8 x 32-bit buffer for bus master PCI IDE burst transfers
• Enhanced DMA controller
Two 8237-based DMA controllers
Support for PCI DMA with three PC/PCI channels and distributed DMA protocols
• Interrupt controller based on 82C59
Support for 15 interrupts
Programmable edge/level sensitivity
• Power management logic
Sleep/resume logic
Support for Wake on LAN
Support for ACPI (see Section 6.2 for specification information)
• Real-Time Clock
256-byte battery-backed CMOS SRAM
Date alarm
• 16-bit counters/timers based on 82C54
†
technology
16
Motherboard Description
1.4.2.1 Universal Serial Bus (USB)
The motherboard has two USB ports; one USB peripheral can be connected to each port. For more
than two USB devices, an external hub can be connected to either port. The motherboard provides
the two USB ports on the back panel. For riser cards with front panel USB port support, a
motherboard manufacturing option is available that provides one USB port on the back panel and
the other USB channel routed to the riser card.
The motherboard fully supports the universal host controller interface (UHCI) and uses UHCIcompatible software drivers. See Section 6.2 for information about the USB specification.
USB features include:
• Self-identifying peripherals that can be plugged in while the computer is running
• Automatic mapping of function to driver and configuration
• Support for isochronous and asynchronous transfer types over the same set of wires
• Support for up to 127 physical devices
• Guaranteed bandwidth and low latencies appropriate for telephony, audio, and other
applications
• Error-handling and fault-recovery mechanisms built into the protocol
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
1.4.2.2 IDE Support
The motherboard has two independent bus-mastering IDE interfaces. These interfaces support:
• ATAPI devices (such as CD-ROM drives)
• ATA devices using the transfer modes listed in Table 46
The BIOS supports logical block addressing (LBA) and extended cylinder head sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The motherboard supports laser servo (LS-120) diskette technology through its IDE interfaces.
The LS-120 drive can be configured as a boot device by setting the BIOS Setup program’s Boot
Device Menu (see Section 4.7) to one of the following:
• ARMD-FDD (ATAPI Removable Media Device - Floppy Disk Drive)
• ARMD-HDD (ATAPI Removable Media Device - Hard Disk Drive)
1.4.2.3 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock is compatible with DS1287 and MC146818 components. The clock provides a
time-of-day clock and a multicentury calendar with alarm features and century rollover. The realtime clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for
BIOS use.
The time, date, and CMOS values can be specified in the Setup program. The CMOS values can
be returned to their defaults by using the Setup program.
The recommended method of accessing the date in systems with Intel motherboards is from the
Real-Time Clock (RTC) via the BIOS. The BIOS on Intel motherboards contains a century
checking and maintenance feature that checks the least two significant digits of the year stored in
the RTC during each BIOS request (INT 1Ah). During this check, the BIOS reads the date and, if
less than 80 (i.e., 1980 is the first year supported by the PC), updates the century byte to 20. This
feature enables operating systems and applications using the BIOS date/time services to reliably
manipulate the year as a four-digit value.
For more information on proper date access in systems with Intel motherboards, please see
http://support.intel.com/support/year2000/motherboard.htm
A coin-cell battery powers the real-time clock and CMOS memory. When the computer is not
plugged into a wall socket, the battery has an estimated life of three years. When the computer is
plugged in, the 3.3 V standby current extends the life of the battery. The clock is accurate to ± 13
minutes/year at 25 ºC with 3.3 V applied.
1.5 I/O Interface Controller
The motherboard uses the SMSC FDC37M807 I/O controller, which features:
• Support for one diskette drive
• ISA Plug-and-Play compatible register set
• One serial port
• FIFO support on both serial port and diskette drive interfaces
• One parallel port with ECP and EPP support
• PS/2-style mouse and keyboard interfaces
• PCI PME interface to PIIX4E
• Intelligent automatic power management of devices when certain conditions are met. Support
The Setup program provides configuration options for the I/O controller.
1.5.1 Serial Port
The motherboard has one serial port. The 9-pin D-sub connector for serial port A is located on the
back panel. The serial port has an NS16C550-compatible UART that supports data transfers at
speeds up to 115.2 Kbits/sec with BIOS support.
18
Motherboard Description
1.5.2 Parallel Port
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on
the back panel of the motherboard. In the Setup program, there are four options for parallel port
operation:
• Output only (standard mode).
• Bidirectional (PS/2 compatible).
• Bidirectional Enhanced Parallel Port (EPP). A driver from the peripheral manufacturer is
required for operation. See Section 6.2 for EPP compliance.
• Bidirectional high-speed Extended Capabilities Port (ECP).
1.5.3 Diskette Drive Controller
The I/O controller is software-compatible with the 82077 diskette drive controller and supports a
†
single diskette drive in either PC-AT
interface can be configured for the following diskette drive capacities and sizes:
• 360 KB, 5.25-inch
• 1.2 MB, 5.25-inch
• 720 KB, 3.5-inch
• 1.2 MB, 3.5-inch (driver required)
• 1.25/1.44 MB, 3.5-inch
• 2.88 MB, 3.5-inch
or PS/2 mode. In the Setup program, the diskette drive
1.5.4 PS/2 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel of the motherboard. The +5 V
†
lines to these connectors are protected with a PolySwitch
reestablishes the connection after an overcurrent condition is removed.
NOTE
✏
The mouse and keyboard can be plugged into either PS/2 connector. Power to the computer
should be turned off before a keyboard or mouse is connected or disconnected.
The keyboard controller contains code that provides the traditional keyboard and mouse control
functions and also supports Power On/Reset password protection. A Power On/Reset password
can be specified in the BIOS Setup program.
at line out and from any analog input including line in, CD-ROM, auxiliary line in, and video
(stereo audio from a video source)
• Ensoniq 3D positional audio support
• Power management support for APM, ACPI, and PCI (see Section for 6.2 for specification
compliance levels)
• Audio inputs:
Two analog line-level stereo inputs for connection from CD-ROM audio (from the riser
card)
One mono analog line-level input for telephony (speakerphone input from the riser card)
One mono microphone input (A motherboard jumper routes the signal from the back panel
or the riser card. See Table 19 for jumpering information.)
• Audio outputs:
Stereo line-level output (shareable between the back panel and the riser card)
Mono output for speakerphone (from the riser card)
1.6.1 Creative Sound Blaster AudioPCI 64V AC ’97 v1.03 Digital
Controller
Creative Sound Blaster AudioPCI 64V, using the Ensoniq ES1373 digital controller, provides the
following features:
• PCI compliance (see Section for 6.2 for specification compliance level)
• PCI bus master for PCI audio
• 64-voice hardware wavetable
†
• Aureal A3D
• Ensoniq 3D positional audio and Microsoft DirectSound
API, Sound Blaster Pro†, Roland MPU-401 MIDI, joystick compatibility
†
3D support
1.6.2 Crystal CS4297 AC ’97 v1.03 Analog Codec
The Crystal CS4297 AC ’97 v1.03 analog codec provides the following features:
• 18 bit stereo full-duplex codec
• Fixed 48 kHz sampling rate
1.6.3 Audio Connectors
See Section 1.13.1 for the location and pinouts of the motherboard audio connectors. Other audio
connectors may be supported on the riser card.
20
Motherboard Description
1.6.4 Audio Drivers and Utilities
Audio software and utilities are available from Intel’s World Wide Web site (see Section 6.1).
1.7 ATI RAGE PRO TURBO 2X AGP Graphics Controller
The ATI RAGE PRO TURBO 2X AGP graphics controller provides the following features:
• Comprehensive AGP support, including 2X (133 MHz) fully pipelined operation and sideband
support
• Full bus mastering support
• Triple 8-bit palette DAC with gamma correction. Pixel rates up to 230 MHz
• DDC1 and DDC2B+ for Plug and Play monitors
• Game acceleration including support for Microsoft’s DirectDraw†: double buffering, virtual
sprites, transparent blit, masked blit, and context chaining
• 4 KB on-chip texture cache
†
• Direct3D
The motherboard provides 8 MB of SDRAM graphics memory.
texture lighting
See Intel’s World Wide Web site (see Section 6.1) for graphics drivers.
1.8 LAN Subsystem
The Intel 82559 Fast Ethernet Wired for Management (WfM) PCI LAN subsystem provides both
10Base-T and 100Base-TX connectivity. Features include:
• 32-bit direct bus mastering on the PCI bus
• Shared memory structure in the host memory that copies data directly to/from host memory
• 10Base-T and 100Base-TX capability using a single RJ-45 connector with connection and
activity status LEDs
• IEEE 802.3µ Auto-Negotiation for the fastest available connection
• Jumperless configuration; the LAN subsystem is completely software-configurable
See Section 6.2 for Wired for Management specification information.
1.8.1 Intel 82559 LAN Controller
The integrated Intel 82559 LAN controller features include:
• 3.3 V operation
• CSMA/CD Protocol Engine
• PCI bus interface (see Section 6.2 for PCI specification information)
• DMA engine for movement of commands, status, and network data across the PCI bus
• Integrated physical layer interface, including:
Complete functionality necessary for the 10Base-T and 100Base-TX network interfaces;
when in 10 Mbit/sec mode, the interface drives the cable directly
A complete set of Media Independent Interface (MII) management registers for control
and status reporting
802.3µ Auto-Negotiation for automatically establishing the best operating mode when
connected to other 10Base-T or 100Base-TX devices, whether half- or full-duplex capable
• Integrated power management features, including:
Support for APM
Support for Wake on LAN technology
1.8.2 LAN Subsystem Software
The Intel 82559 Fast Ethernet WfM PCI LAN software and drivers are available from Intel’s
World Wide Web site (see Section 6.1).
1.8.3 RJ-45 LAN Connector LEDs
Two LEDs are built into the RJ-45 LAN connector. They indicate the following LAN conditions.
Table 2.RJ-45 LAN Connector LEDs
LED ColorLED StateIndicates
GreenOff10 Mbit/sec speed is selected.
On100 Mbit/sec speed is selected.
YellowOffLAN link is not established.
On (steady state)LAN link is established.
On (brighter and pulsing)The computer is communicating with another computer on
the LAN.
1.9 Wake on LAN Technology
Wake on LAN technology enables remote wake-up of the computer through a network. This
feature can be implemented in one of two ways: using the onboard Intel 82559 LAN controller or,
if the riser card has a Wake on LAN technology connector, using a PCI add-in network interface
card (NIC) with remote wake-up capabilities. If using a NIC, the remote wake-up connector on the
NIC must be connected to the riser card Wake on LAN technology connector.
The onboard or NIC LAN controller monitors network traffic at the MII; upon detecting a Magic
†
Packet
CAUTION
Operation of this motherboard requires a power supply providing at least 720 mA of current on
the +5 VSB line. Failure to provide adequate standby current when implementing Wake on LAN
technology can damage the power supply.
, the controller asserts a wake-up signal that powers up the computer.
22
Motherboard Description
1.10 Wake on Ring / Resume on Ring Technologies
This section describes two technologies that enable telephony devices to access the computer when
it is in a power-managed state.
1.10.1 Wake on Ring Technology
The operation of Wake on Ring can be summarized as follows:
• Powers up the computer from the APM Soft-Off mode
• Requires two calls to access the computer:
First call powers up the computer
Second call enables access
• Implements incoming call differently for external as opposed to internal modems:
For external modems, motherboard hardware monitors the ring indicate (RI) input of the
serial port
For internal modems, a cable must be routed from the modem to the Wake on Ring
connector
1.10.2 Resume on Ring Technology
The operation of Resume on Ring can be summarized as follows:
• Resumes operation from the APM sleep mode or the ACPI S1 state
• Requires only one call to access the computer
1.11 Hardware Monitor Subsystem
The hardware monitor subsystem provides low-cost instrumentation capabilities. The features of
the hardware monitor subsystem include:
• An integrated ambient temperature sensor
• Fan speed sensors (see Figure 2 for the location of fan connector on the motherboard)
• Power supply voltage monitoring to detect levels above or below acceptable values
• Support for chassis intrusion detection using an optional onboard photo sensor or a two-pin
connector on the riser card
When suggested ratings for temperature, fan speed, or voltage are exceeded, an interrupt is
activated. The hardware monitor component connects to the SMBus.
1.12 Fan Speed Control
The motherboard includes two independent circuits for controlling various system cooling fans:
one is on the motherboard and the other is routed to the riser card.
The processor fan header (J4D1) on the motherboard is intended to drive a processor-mounted fan
either full-speed or off, depending on the operating state of the system. The fan speed is monitored
®
by the hardware monitor subsystem and can be read by applications such as Intel
LANDesk
Client Manager (LDCM) using the System Management BIOS (SMBIOS) described in
Section 3.4.
1.12.2 Fan Control Signal to the Riser Card
The NLX specification defines the fan control (FAN_CTL) signal as a means to control the speeds
of fans connected to an NLX riser card or power supply. The BL440ZX motherboard is capable of
driving FAN_CTL at different output levels, depending on the operating state of the system.
Initially, two levels are defined for high and low fan speed operation. Based on the cooling needs
and capabilities of a given system platform, the system OEM can redefine these output levels to
achieve a better balance of acoustic and thermal performance. Applications such as LDCM can
access the SMBIOS to redefine the FAN_CTL output levels.
1.12.3 System Management Support
®
While the system is running an APM operating system, the BIOS controls both fan circuits, as
shown in Table 3. With an ACPI operating system, the voltage to both circuits depends on the
system state, as shown in Table 4.
Table 3.Fan Speed Control under APM Operating System
Processor Fan Voltage
APM System States
Full On / Standby+12 V (default)OEM-definable “high speed”
Suspend0 V (default)OEM-definable “low speed”
Table 4.Fan Speed Control under ACPI Operating System
ACPI Sleep States
S0+12 V+12 V
S1**
S2No supportNo support
S3No supportNo support
S4No supportNo support
S50 V0 V
(connector J4D1, pin 2)
Processor Fan Voltage
(connector J4D1, pin 2)
FAN_CTL Signal to Riser Card
(current limit = 50 mA)
(default = +12 V)
(default = +8 V)
FAN_CTL Signal to Riser Card
(current limit = 50 mA)
* Controlled by the operating system.
24
1.13 Motherboard Connectors
Figure 2 show the location of the motherboard connectors.
N
M
L
Motherboard Description
A
1
H
GFB
I
JK
ADIMM socketsHUSB Port 1
BVideoIUSB Port 0
CParallel portJAudio Line Out
DSerial portKAudio Mic In
ERJ-45 LANLNLX riser card edge
FPS/2 keyboard/mouseMProcessor fan
GPS/2 keyboard/mouseNPGA370S processor socket
Only the back panel connectors of this motherboard have overcurrent protection. The internal
motherboard connectors do not have overcurrent protection; they should connect only to devices
inside the computer chassis, such as fans and internal peripherals. Do not use these connectors
for powering devices external to the computer chassis. A fault in the load presented by the
external devices could cause damage to the computer, the interconnecting cable, and the external
devices themselves.