The AN430TX motherboard may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized
errata are documented in the AN430TX Motherboard Specification Update.
Revision History
Revision
-001
Revision HistoryDate
First release of the AN430TX Motherboard Technical Product Specification.4/97
This product specification applies only to standard AN430TX motherboards with BIOS
identifier AN430TX0.86A.
Changes to this specification will be published in the AN430TX Motherboard
Specification Update before being incorporated into a revision of this document.
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
The AN430TX may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
†
Third-party brands and names are the property of their respective owners.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 7641
Mt. Prospect, IL 60056-7641
or call in North America 1-800-879-4683, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Copyright 1997, Intel Corporation. All rights reserved.
The motherboard is designed to fit into a standard ATX form factor chassis. Figure 2 illustrates the
form factor for the motherboard. The location of the I/O connectors and mounting holes are in
strict compliance with the ATX specification (see Section 5.1).
9.04
8.95
8.05
2.85
0.25
0.0
0.65
0.0
3.10
4.90
Figure 2. Motherboard Dimensions
11.35
11.10
OM06161
10
Motherboard Description
1.4 I/O Shield
The back panel I/O shield for the AN430TX motherboard must meet specific dimensional and
material requirements. Computers based on this motherboard need the back panel I/O shield in
order to pass certification testing. Figure 3 shows the critical dimensions for the I/O shield and
indicates the position of each cutout. The example shown is chassis-specific and will not
necessarily work with other chassis types.
4.610
1.590
0.295
1.955
0.133
0.597
0.200
0.478
1.407
0.458
0.768
1.158
0.671
0.395
0.553
0.990
1.911
2.184
3.327
4.735
4.899
0.193
Note: Material = 0.010 ±.0.001 Thick Stainless Steel, Half Hard
• Pentium processors operating at 90, 100, 120, 133, 150, 166, and 200 MHz
• Pentium processors with MMX technology operating at 166, and 200 MHz
An onboard voltage regulator derives the necessary voltage from the computer’s power supply and
enables use of standard or VRE-specified processors. The motherboard automatically detects the
type of processor (Pentium processor or Pentium processor with MMX technology).
CAUTION
If you use clips to secure a heat sink
to the processor, do not use bail-wire
style heat sink clips, such as the type
shown in the figure to the right.
These clips have been known to
damage the motherboard when
installed or removed incorrectly.
1.5.1 Microprocessor Upgrade
The motherboard has a 321-pin Socket 7 zero insertion force (ZIF) microprocessor socket.
Socket 7 supports upgrades to higher performance Pentium OverDrive processors not supported by
Socket 5.
12
Motherboard Description
1.6 Memory
1.6.1 Main Memory
The motherboard has two 168-pin DIMM sockets. Memory can be installed in one or two sockets.
Minimum memory size is 8 MB. Maximum memory size is 256 MB. The BIOS automatically
detects memory type, size, and speed so no jumper settings are required.
• Single- or double-sided DIMMs in the following sizes:
DIMM SizeTypeConfigurationTechnology
8 MB60 ns EDO1M x 6416 Mbit
16 MB60 ns EDO2M x 6416 Mbit
32 MB60 ns EDO4M x 6416 Mbit
64 MB60 ns EDO8M x 6416 Mbit
8 MBCAS Latency 2 SDRAM1M x 6416 Mbit
16 MBCAS Latency 2 SDRAM2M x 6416 Mbit
32 MBCAS Latency 2 SDRAM4M x 6416 Mbit
64 MBCAS Latency 2 SDRAM8M x 6464 Mbit
128 MBCAS Latency 2 SDRAM16M x 6464 Mbit
Memory type, size, and speed can vary between sockets, so EDO and SDRAM can be installed on
the same motherboard. Parity (x 72) DIMMs can be installed but are not recommended for the
following reasons:
• The motherboard does not provide parity checking or ECC
• Parity DIMMs cause excessive capacitive loading on memory data and address lines
1.6.1.1 EDO DRAM
EDO DRAM improves memory read performance by holding the memory data valid until the next
CAS# falling edge, unlike fast page mode DRAM, which tri-states the memory data when CAS#
negates to precharge for the next memory cycle. With EDO DRAM, the CAS# precharge overlaps
the data-valid time, which allows CAS# to negate earlier while still satisfying the memory datavalid window.
Synchronous DRAM (SDRAM) is designed to improve main memory performance. Unlike fast
page or EDO DRAM, SDRAM is synchronous with the memory clock. This simplifies the timing
design and increases memory speed because all timing is dependent on the number of memory
clock cycles. SDRAM DIMM should meet the Intel 4-clock 66 MHz 64-bit unbuffered SDRAM
DIMM v1.0 specification.
CAUTION
The board does not support SDRAM DIMMs with an n x 4 DRAM base due to loading anomalies.
For example, a DIMM that uses sixteen 16 Mbit x 4 devices should not be used.
NOTE
✏
The AN430TX supports unbuffered, 4-clock 3.3V SDRAM DIMMs only. Buffered, 5V, or 2-clock
SDRAM DIMMs cannot be used.
1.6.2 Second Level Cache
The 512 KB direct-mapped write-back L2 cache consists of two 64K x 32 global write enable
(GWE) pipeline burst asynchronous RAMs (PBSRAMs) and a 32K x 8 external tag SRAM. These
devices are soldered to the motherboard.
1.7 Chipset
The Intel 82430TX PCIset consists of the 82439TX System Controller (MTXC) device and the
82371AB PCI ISA IDE Xcelerator (PIIX4) device.
1.7.1 82439TX System Controller (MTXC)
The MTXC integrates the cache and main memory DRAM control functions and provides bus
control to handle transfers between the processor, cache, main memory, and the PCI bus. The
MTXC allows PCI masters to achieve full PCI bandwidth by using the snoop ahead feature. For
increased system performance the MTXC integrates posted write and read prefetch buffers. The
MTXC comes in a 324-pin MBGA package that features:
• Microprocessor interface control
• Integrated L2 write-back cache controller
Supports pipeline burst SRAM
64 MB maximum DRAM cacheability
Direct mapped organization—write back only
Cache hit read/write cycle timings at 3-1-1-1
Back to back read/write cycles at 3-1-1-1-1-1-1-1
14
Motherboard Description
• Integrated DRAM controller
8 MB to 256 MB main memory
64-Mbit DRAM/SDRAM technology support
3.3V EDO and unbuffered synchronous DRAM support
Non-parity (x64) support only
• Fully synchronous minimum latency PCI bus interface
PCI compliance (see Section 5.1 for compliance level)
30 and 33 MHz bus speeds
PCI to DRAM data throughput at greater than 100 MB/sec
Up to four PCI masters in addition to the PIIX4
• Power management control
Provides PCI CLKRUN# signal to control memory clock on the PCI bus (on/off)
Internal clock control (gated off if no host or PCI bus activity)
1.7.2 82371AB PCI ISA IDE Xcelerator (PIIX4)
The Intel 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multifunction PCI device implementing a
PCI to ISA bridge, PCI IDE functionality, a Universal Serial Bus (USB) host/hub function, and
Enhanced Power Management. The PIIX4 comes in a 324-pin MBGA package that features:
• Multifunction PCI to ISA bridge
Supports the PCI bus at 30 and 33 MHz
PCI compliant (see section 5.1 for compliance level)
Full ISA or extended I/O (EIO) bus support
• USB controller
Two USB ports (see section 5.1 for compliance level)
Supports legacy keyboard and mouse
Supports UHCI design guide revision 1.1 interface
• Integrated dual-channel enhanced IDE interface
Support for up to four IDE devices
PIO Mode 4 transfers at up to 14 MB/sec
Supports “Ultra DMA/33” synchronous DMA mode transfers up to 33 MB/sec
Integrated 8 x 32-bit buffer for bus master PCI IDE burst transfers
Bus master mode
• Enhanced DMA controller
Two 8237-based DMA controllers
Supports PCI DMA with three PC/PCI channels and distributed DMA protocols
Fast type-F DMA for reduced PCI bus usage
• Interrupt controller based on 82C59
Support for 15 interrupts
Programmable for edge/level sensitivity
• Power management logic
Sleep/resume logic
Supports thermal alarm
Support for wake on modem through Ring Indicate input
• Real-Time Clock
256 byte battery-backed CMOS SRAM
Includes date alarm
• 16-bit counters/timers based on 82C54
1.7.3 Universal Serial Bus (USB) Support
The motherboard features two USB ports. The ports permit the direct connection of two USB
peripherals without an external hub. If more devices are required, an external hub can be
connected to either of the built-in ports. The motherboard fully supports the standard universal
host controller interface (UHCI) and uses standard software drivers that are UHCI-compatible.
Features of the USB include:
• Self-identifying, hot pluggable peripherals
• Automatic mapping of function to driver and configuration
• Support for isochronous and asynchronous transfer types over the same set of wires
• Support for up to 127 physical devices
• Guaranteed bandwidth and low latencies appropriate for telephony, audio, and other
applications
• Error handling and fault recovery mechanisms built into protocol
NOTE
✏
Computers that have an unshielded cable attached to the USB port might not meet FCC Class B
requirements, even if no device or a low speed (sub-channel) USB device is attached to the cable.
Use shielded cable that meets the requirements for high speed (fully rated) devices.
1.7.4 IDE Support
The motherboard has two independent bus mastering PCI IDE interfaces that support PIO Mode 3,
PIO Mode 4, ATA-33 (Ultra DMA/33), and ATAPI (e.g., CD-ROM) devices. The BIOS supports
Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS) translation modes.
IDE device transfer rate and translation mode are automatically detected by the BIOS.
Normally, programmed I/O operations require a substantial amount of processor bandwidth;
however, in true multi-tasking operating systems like Windows
mastering IDE can be devoted to other tasks while disk transfers are occurring.
1.7.4.1 LS-120 Support
LS-120 MB Diskette technology enables users to store 120 MB of data on a single, 3.5-inch
removable diskette. LS-120 technology is backward (both read and write) compatible with
1.44 MB and 720 KB DOS-formatted diskettes and is supported by Windows 95 and Windows
†
operating systems.
NT
The AN430TX motherboard allows connection of an LS-120 compatible drive and a standard
3.5-inch diskette drive. The LS-120 drive can be configured as a boot device, if selected in the
BIOS setup utility.
†
95, the bandwidth freed by bus
16
Motherboard Description
NOTE
✏
If you connect an LS-120 drive to an IDE connector and configure it as the “A” drive and
configure a standard 3.5-inch floppy as a “B” drive, the standard floppy must be connected to the
floppy drive cable’s “A” connector (the connector at the end of the cable).
1.8 Super I/O Controller
The PC87307VUL Super I/O Controller from National Semiconductor is an ISA Plug and Play
compatible (see section 5.1 for compliance level), multifunction I/O device that provides the
following features:
• Serial ports:
Two 16450/16550A-software compatible UARTs
Send/receive 16-byte FIFO
Four 8-bit DMA options for the UART with Slow Infrared Support (USI)
Ring indicator support for both serial ports
• Multimode bidirectional parallel port
Standard mode, IBM
Enhanced Parallel Port (EPP) mode with BIOS and driver support
High-speed Extended Capabilities Port (ECP) mode
• Floppy disk controller
DP8473 and N82077 compatible
16 byte FIFO
PS/2
CMOS disk input and output logic
High performance digital data separator (DDS)
PC-AT
• Keyboard and mouse controller
Industry standard 8042A compatible
General purpose microcontroller
8 bit internal data bus
• Support for an IrDA and Consumer IR-compliant infrared interface
†
diagnostic register support
†
and PS/2 drive mode support
†
and Centronics† compatible
By default, the I/O controller interfaces are automatically configured during boot up. The I/O
controller can also be manually configured in the Setup program.
1.8.1 Serial Ports
The motherboard has one 9-pin D-Sub serial port connector located on the back panel, and one
keyed 10-pin header located on the motherboard for cabling to the back panel. The 16540 and
16550A compatible UARTs support data transfers at speeds up to 921.6 Kbits/sec, while the
extended UART mode supports data rates up to 1.5 Mbits/sec.
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on
the back panel of the motherboard. In the Setup program, there are four options for parallel port
operation:
• Compatible (standard mode)
• Bidirectional (PS/2-compatible)
• Bidirectional Enhanced Parallel Port (EPP) (see Section 5.1 for EPP specification compliance
level)
• Bidirectional Extended Capabilities Port (ECP)
1.8.3 Floppy Controller
The I/O controller is software compatible with the DP8473 and N82077 floppy drive controllers
and supports both PC-AT and PS/2 modes. In the Setup program, the floppy interface can be
configured for the following floppy drive capacities and sizes:
• 360 KB, 5.25-inch
• 1.2 MB, 5.25-inch
• 720 KB, 3.5-inch
• 1.2 MB, 3.5-inch (driver required)
• 1.25/1.44 MB, 3.5-inch
• 2.88 MB, 3.5-inch
1.8.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel of the motherboard.
The 5 V lines to these connectors are protected with a PolySwitch
fuse, reestablishes the connection after an over-current condition is removed. While this device
eliminates the possibility of having to replace a fuse, power to the computer should be turned off
before connecting or disconnecting a keyboard or mouse.
NOTE
✏
You can plug the mouse and keyboard into either connector.
The keyboard controller contains the Phoenix keyboard and mouse controller code, which provides
the traditional keyboard and mouse control functions, and also supports Power On/Reset password
protection. A Power On/Reset password can be specified in the Setup program.
The keyboard controller also supports the following hot-key sequences:
• <Ctrl><Alt><Del> Software reset. This key sequence resets the computer’s software by
jumping to the beginning of the BIOS code and running the Power On Self Test (POST).
†
circuit that, like a self-healing
18
Motherboard Description
1.8.5 Infrared Support
The motherboard has a 6-pin header that supports Hewlett Packard† HSDL-1000 compatible
infrared (IR) transmitters/receivers. In the Setup program, Serial Port 2 can be directed to a
connected IR device. The connection can be used to transfer files to or from portable devices like
laptops, PDAs and printers. The Infrared Data Association (IrDA) specification supports data
transfers of 115 Kbits/sec at a distance of 1 meter. See section 5.1 for IrDA specification
compliance level.
1.8.5.1 Consumer Infrared Support
The motherboard has a dedicated signal pin that supports Consumer Infrared (IR) devices (remote
controls). The signal pin supports receive only. Consumer IR devices can be used to control
telephony functions and multimedia operations like volume and CD track changes. In this mode,
data rates of up to 685.57 Kbits/sec are supported. A software and hardware interface is needed to
use this feature.
1.9 Graphics Subsystem
The optional onboard graphics subsystem features the ATI-264GT Rage II+ graphics controller.
1.9.1 Graphics Controller
The ATI-264GT Rage II+ provides the following features:
• Drawing coprocessor that operates concurrently with the host processor
• Optional video coprocessor that enables simultaneous display of 24 bits per pixel (bpp) video
and 8 bpp graphics
• VGA
• PCI compliant
• Support for power management
• Support for VESA Display Data Channel (DDC2B)
• Video scaler, color space converter, true color palette
• Triple-clock synthesizer
• Support for ATI multimedia feature connector
• 3-D graphics capability
• PCI bus master
1.9.1.1 Video Memory
The motherboard supports 2 MB of 66MHz (15 ns burst mode cycle time) SGRAM for video
memory, soldered to the board. There are no upgrade options for video memory.
Table 1.ATI-264GT Rage II+ Maximum Refresh Rates at Different Resolutions
2 MB MemoryMaximum Refresh Rate (Hz) At:
4-bit Color
Resolution
640 x 480160160160160
800 x 600160160160160
1024 x 768160160160not supported
1152 x 864160160160not supported
1280 x 1024160160160not supported
(16 Colors)
8-bit Color
(256 Colors)
16-bit Color
(64K Colors)
24-bit Color
(16M Colors)
1.9.1.3 Graphics Drivers and Utilities
Graphics drivers and common graphics utilities are available for Windows 3.x, Windows 95, and
Windows NT. Drivers and utilities are available from Intel’s World Wide Web site (see
Section 5.2).
1.9.2 VESA/ATI Multimedia Channel Connector
The motherboard has an optional 40-pin VESA/ATI Multimedia Channel connector that uses
26 pins for the VESA standard bus and 12 pins for the ATI Enhanced Visual Architecture bus. The
connector features a shared frame buffer interface and a Local Peripheral Bus (LPB) with a
bidirectional interface that supports video companion devices like MPEG/live video decoders.
1.9.3 Brooktree Video Capture Processor
The motherboard features an optional Brooktree Bt829A Video Capture Processor for digitizing
analog NTSC/PAL/SECAM input signals from TV tuners, VCRs, cameras, and other sources of
composite or Y/C video. The Bt829A has the mixed signal circuitry required to convert an analog
composite signal into a scaled digital video stream supporting several video formats, resolutions
and frame rates. The Bt829A features include:
• Single-chip composite/S-Video NTSC/PAL/SECAM to YCrCb digitizer
• Square pixel and CCIR601 resolution for NTSC, PAL, and SECAM
• Chroma comb filtering
• Horizontal and vertical filtered scaling
• Programmable hue, brightness, saturation, and contrast
• User-programmable cropping of the video window
• 2x oversampling
• Two-wire I
• 8- or 16-bit pixel interface
• Automatic NTSC/PAL format detection
• Automatic gain control
2
C bus interface
20
Motherboard Description
The motherboard provides two inputs for video on the video riser card I/O panel: an RCA input
connector for composite video signals, and a 7-pin mini-DIN connector for S-Video signals and
2
Inter-Integrated Circuit (I
C) signals.
The Bt829A’s registers are accessed using the I
device. To reprogram the default settings, you must connect an I
2
C/S-Video connector. The I2C serial clock and data lines transfer data from the master device at
I
2
C interface. The Bt829A operates as an I2C slave
2
C master to the 7-pin mini-DIN
a rate of 100 Kbits/sec.
1.9.3.1 Video Capture Input Connector
A 1x4 pin connector is available on the motherboard for applying a composite video signal (from a
TV Tuner add-in card, for example) to the input of the Brooktree Bt829A Video Capture device.
2
Two pins are dedicated to external control capability via the I
C protocol using serial clock (SCL)
and serial data (SDA) pins.
1.9.3.2 Video Capture Drivers and Utilities
Video capture software and utilities are available from Intel’s World Wide Web site (see
Section 5.2).
1.9.4 ImpacTV NTSC/PAL Encoder
The optional ATI-ImpacTV NTSC/PAL Encoder is an ASIC that provides a TV-out interface for
the ATI-264GTB 3D Rage II+ multimedia graphics accelerators. Quality issues such as image
flicker, illegible text and low-definition graphics are controlled through on-chip circuitry for
scaling, flicker removal, and artifact suppression. Features include:
• Circuitry for producing interlaced images with flicker removed
• Circuitry for eliminating dot crawl
• Filters for bringing out detail in fine text while suppressing color artifacts
• Support for both NTSC and PAL formats
• Filters that ensure signal bandwidth does not exceed TV standards
• Fully programmable timing that enables NTSC or PAL signals to be generated from monitor
resolutions that include 320x200, 320x240, 320x350, 320x400, 360x200, 360x240, 360x400,
360x440, 512x384, 640x350, 640x400, 640x480, 720x350, 720x400, 720x480, and 800x600
• Simultaneous display of images on both a TV and a PC monitor
• Independent horizontal positioning of the TV image and the PC monitor image
• Independent vertical positioning of the TV image and the PC monitor image
• Independent horizontal scaling of the TV image and the PC monitor image
• Power management for full VESA DPMS and EPA Energy Star compliance
• Automatic power down of the ASIC at initialization if a TV is not detected
• Support for both composite and S-Video connectors
The motherboard provides two outputs for video on the video riser card I/O panel: an RCA
connector for composite video-out signals and a 4-pin mini-DIN connector for S-Video output
signals.
A video riser card is required for TV outputs and video capture inputs (shown in Figure 7).
1.10 Audio Subsystem
The onboard audio subsystem features the Yamaha OPL† YMF715, a 100-pin SQFP audio chip. It
integrates a 16-bit audio codec, OPL3 FM synthesis and its DAC, 3-D enhanced stereo controller,
and an interface for MPU-401 and a joystick. The YMF715 provides all the digital audio and
analog mixing functions needed for recording and playing sound on personal computers. It
features the following:
• Integrated 3-D enhanced stereo controller including all required analog components
• Stereo analog-to-digital and digital-to-analog converters
• Analog mixing, anti-aliasing, and reconstruction filters
• Support for 16-bit address decode
• Line, microphone, mono, and modem inputs
• ADPCM, A-law or µlaw digital audio compression/decompression
• Full digital control of all mixer and volume control functions
• Software switching between rear panel Mic In and Line In connectors
• Plug and Play compatibility
• Sound Blaster
• Pin compatible with the Yamaha YMF711
†
and Windows Sound System compatibility
The following table shows the IRQ, DMA channel, and base I/O address options for the audio
subsystem. These options are automatically chosen by the Plug and Play interface, so there are no
default settings.
IRQ
Resource
Sound Blaster
(DMA playback, DMA shared with
Windows Sound System capture)
Windows Sound System
(DMA playback)
MPU-401
(IRQ shared with Sound Blaster)
MIDI / Game Port201h
†
AdLib
(Options)
5
7
9
10
11
5
7
9
10
11
DMA Channel
(Options)
0
1
3
0
1
3
I/O Address
(Options)
220h
240h
220-280h
530h
E80h
530-F48h
330h
300h
300-334h
201-211h
388h
388-3F8h
22
Motherboard Description
1.10.1 Yamaha OPL4-ML
The Yamaha OPL4-ML wavetable is a ROM table containing live instrument sound samples.
Wave synthesis results in richer and more realistic sounds then that of FM synthesis.
1.10.2 Audio Drivers and Utilities
Audio software and utilities are available from Intel’s World Wide Web site (see Section 5.2).
1.10.3 Audio Connectors
The board has these audio connectors:
• Back panel audio jacks (Line In, Line Out, Mic In)
• CD-ROM audio connector (either standard CD or optional ATAPI styles provided)
A 1 x 4-pin connector is available for connecting the audio output of an internal CD-ROM
connector to the audio subsystem’s mixer. The connector is compatible with most cables supplied
with ATAPI CD-ROM headers designed to connect to audio add-in cards.
1Reset IDE2Ground
3Host data 74Host data 8
5Host data 66Host data 9
7Host data 58Host data 10
9Host data 410Host data 11
11Host data 312Host data 12
13Host data 214Host data 13
15Host data 116Host data 14
17Host data 018Host data 15
19Ground20Key
21DDRQ0 [DDRQ1]22Ground
23I/O write#24Ground
25I/O read#26Ground
27IOCHRDY28Vcc pull-up
29DDACK0# [DDACK1#]30Ground
31IRQ 14 [IRQ 15]32Reserved
33Address 134Reserved
35Address 036Address 2
37Chip select 1P# [Chip select 1S#]38Chip Select 3P# [Chip select 3S#]
39Activity#40Ground
NOTE:Signal names in brackets ([ ]) are for the secondary IDE connector
1NC2NC
3Ground4Composite in
5Ground6Y in
7Ground8SCL
9Ground10SDA
11Ground12C-In
13Ground14+12 V
15Ground16Composite out
17Ground18Luma out
19Ground20Chroma out
21Ground22+5 V
23NC24NC (Reserved)
28
Motherboard Description
1.11.1 Power Supply Connector
When used with a power supply that supports remote power on/off, the motherboard can turn off
the computer’s power through software control. Pin 14 of the power supply connector lets the
motherboard recognize a power supply that supports this “soft-off” feature; the power supply must
tie pin 14 to ground.
When the BIOS receives the correct APM command from the operating system, the BIOS turns off
power to the computer. For example, in the Windows 95 Start menu, the user selects Shutdown to
turn off the power.
If power to the computer is interrupted by a power outage or a disconnected power cord, when
power resumes, the computer remains in the off state until the power on switch is pressed.
Table 15.Power Supply Connector (J7L1)
PinSignal NamePinSignal Name
1+3.3 V11+3.3 V
2+3.3 V12-12 V
3Ground13Ground
4+5 V14PS-ON# (Power Supply Remote
On/Off Control)
5Ground15Ground
6+5 V16Ground
7Ground17Ground
8PWRGD (Power Good)18-5 V
9+5 VSB (Standby for real-time clock)19+5 V
10+12 V20+5 V
When advanced power management (APM) is enabled in the BIOS and the operating system’s
APM driver is loaded, the computer can enter Sleep (Standby) mode in one of two ways:
• Pressing the optional front panel Sleep/Resume button
• Prolonged inactivity; the timeout period is adjustable in the Setup program
A sleep/resume button is supported by the 2-pin header located on the front panel I/O connector.
The front panel sleep/resume switch must be a momentary SPST type that is normally open.
Closing the sleep/resume switch generates a system management interrupt (SMI) to the processor,
which immediately goes into system management mode (SMM). While the computer is in sleep
mode it is fully capable of responding to and servicing external interrupts (such as an incoming
fax) even though the monitor turns on only if a keyboard or mouse interrupt occurs. To reactivate
the computer, or resume, you must press the sleep/resume button again, or use the keyboard or
mouse.
1.11.2.2 Infrared connector
Serial Port 2 can be configured to support an IrDA module connected to this 6-pin header. After
configuring the IrDA interface, you can transfer files to or from portable devices such as laptops,
PDAs, and printers using application software.
1.11.2.3 Hard Drive (HD) LED
You can connect this header to an LED to provide a visual indicator that data is being read from or
written to an IDE hard drive. For the LED to function properly, the IDE drive must be connected
to the onboard IDE controller on the motherboard.
1.11.2.4 Sleep/Power LED
You can connect this header to an LED that will light when the computer is powered on. This
LED will also blink when the computer is in a power-managed state.
1.11.2.5 Reset
You can connect this header to a momentary SPST type switch that is normally open. When the
switch is closed, the board resets and runs the POST.
1.11.2.6 Speaker
A speaker may be installed on the motherboard as a manufacturing option. The speaker option
includes a jumper on pins 26-27 of the front panel connector. You can disable the onboard speaker
by removing the jumper, and you can connect an offboard speaker in its place. The speaker
(onboard or offboard) provides error beep code information during the Power-On Self Test (POST)
in the event that the computer cannot use the video interface. The speaker is not connected to the
audio subsystem, and does not receive output from the audio subsystem.
32
1.11.3 Back Panel Connectors
Figure 6 shows the location of the back panel I/O connectors, which include:
• PS/2-style keyboard and mouse connectors
• Two USB connectors
• One parallel port
• One serial port
• Optional video monitor connector
• MIDI/game port
• External audio jacks: Line Out, Line In and Mic In
1Data
2No connect
3Ground
4+5 V (fused)
5Clock
6No connect
Table 18.USB Connectors
PinSignal Name
1Power
2USBP0# [USBP1#]
3USBP0 [USBP1]
4Ground
Table 19.Parallel Port Connector
PinSignal NamePinSignal Name
1Strobe#14Auto Feed#
2Data bit 015Fault#
3Data bit 116INIT#
4Data bit 217SLCT IN#
5Data bit 318Ground
6Data bit 419Ground
7Data bit 520Ground
8Data bit 621Ground
9Data bit 722Ground
10ACK#23Ground
11Busy24Ground
12Error25Ground
13Select
The motherboard contains three PCI slots, two ISA slots and one shared slot (for a PCI or ISA
card). The PCI bus supports up to four bus masters through the four PCI connectors (see
Section 5.1 for information about compliance with the PCI specification).
Table 27.PCI Bus Connectors
PinSignal NamePinSignal NamePinSignal NamePinSignal Name
A1+5 V (TRST#)*B1-12 VA32AD16B32AD17
A2+12 VB2Ground (TCK)*A33+3.3 VB33C/BE2#
A3+5 V (TMS)*B3GroundA34FRAME#B34Ground
A4+5 V (TDI)*B4no connect (TDO)* A35GroundB35IRDY#
A5+5 VB5+5 VA36TRDY#B36+3.3 V
A6INTA#B6+5 VA37GroundB37DEVSEL#
A7INTC#B7INTB#A38STOP#B38Ground
A8+5 VB8INTD#A39+3.3 VB39LOCK#
A9ReservedB9PRSNT1#A40SDONEB40PERR#
A10+5 V (I/O)B10ReservedA41SBO#B41+3.3 V
A11ReservedB11PRSNT2#A42GroundB42SERR#
A12GroundB12GroundA43PARB43+3.3 V
A13GroundB13GroundA44AD15B44C/BE1#
A14ReservedB14ReservedA45+3.3 VB45AD14
A15RST#B15GroundA46AD13B46Ground
A16+5 V (I/O)B16CLKA47AD11B47AD12
A17GNT#B17GroundA48GroundB48AD10
A18GroundB18REQ#A49AD09B49Ground
A19ReservedB19+5 V (I/O)A50KeyB50Key
A20AD30B20AD31A51KeyB51Key
A21+3.3 VB21AD29A52C/BE0#B52AD08
A22AD28B22GroundA53+3.3 VB53AD07
A23AD26B23AD27A54AD06B54+3.3 V
A24GroundB24AD25A55AD04B55AD05
A25AD24B25+3.3 VA56GroundB56AD03
A26IDSELB26C/BE3#A57AD02B57Ground
A27+3.3 VB27AD23A58AD00B58AD01
A28AD22B28GroundA59+5 V (I/O)B59+5 V (I/O)
A29AD20B29AD21A60REQ64C#B60ACK64C#
A30GroundB30AD19A61+5 VB61+5 V
A31AD18B31+3.3 VA62+5 VB62+5 V
*These signals (in parentheses) are optional in the PCI specification and are not implemented on this motherboard
Host Bus Frequency*J9C1-CSee Table 30
Processor FrequencyJ9C1-DSee Table 30
BIOS recoveryJ8A11-2 Normal (Default)
*These jumpers also set the PCI and ISA bus frequencies
2-3 VRE voltage (Default)
2-3 Password clear/disabled
5-6 Clear
2-3 Access denied
5-6 (Reserved)
2-3 Recovery
1.13.1 Processor Configuration (J9C1-C, D)
The motherboard must be configured for the frequency of the installed processor. Table 30 shows
the jumper settings for each frequency and the corresponding host bus, PCI bus, and ISA bus
frequencies.
Table 30.Jumper Settings for Processor and Bus Frequencies
Processor
Freq. (MHz)
2005-61-2 and 5-666338.333
1665-62-3 and 5-666338.332.5
1504-52-3 and 5-660307.52.5
1335-62-3 and 4-566338.332
1204-52-3 and 4-560307.52
1005-61-2 and 4-566338.331.5
904-51-2 and 4-560307.51.5
NOTE
✏
There are no separate or additional jumpering requirements for Pentium processors with MMX
technology.
Jumpers
J9C1-C
Jumpers
J9C1-D
Host Bus
Freq. (MHz)
PCI Bus
Freq. (MHz)
ISA Bus
Freq. (MHz)
Bus/Processor
Freq. Ratio
42
Motherboard Description
1.13.2 Password Clear (J9C1-A)
Use this jumper to clear the password if the password is forgotten. The default setting is pins 1-2
(password enabled). To clear the password, turn off the computer, move the jumper to pins 2-3,
and turn on the computer. Then, turn off the computer and return the jumper to pins 1-2 to restore
normal operation. If the jumper is in the 2-3 position (password disabled), you cannot set a
password.
1.13.3 Clear CMOS (J9C1-A)
This jumper resets the CMOS settings to the default values. This procedure must be done each
time the BIOS is updated. The default setting for this jumper is pins 4-5 (keep CMOS settings).
To reset the CMOS settings to the default values, turn off the computer, move the jumper to
pins 5-6, then turn on the computer. When the computer displays the message “NVRAM cleared
by jumper,” turn off the computer and return the jumper to pins 4-5 to restore normal operation.
1.13.4 BIOS Setup Access (J9C1-B)
This jumper enables or disables access to the Setup program. The default setting is pins 1-2
(access enabled). To disable access to the Setup program, move the jumper to pins 2-3.
1.13.5 BIOS Recovery (J8A1)
This jumper lets you recover the BIOS data from a diskette in the event of a catastrophic failure.
The default setting is pins 1-2 (normal operation). To recover the BIOS, turn off the computer,
move the jumper to pins 2-3, then turn on the computer to perform BIOS recovery. After recovery,
turn off the computer and return the jumper to pins 1-2 to restore normal operation. See
Section 3.1.12 for more details.
1.13.6 Processor Voltage (J6M1)
This jumper sets the output of the onboard voltage regulator. For processors that require Standard
voltage, place the jumper on pins 1-2. For processors that require VRE voltage, place the jumper
on pins 2-3. Voltage specifications are as follow:
• Standard = 3.3 - 3.465 V
• VRE = 3.465 - 3.63 V
CAUTION
When installing a processor in the motherboard for the first time or upgrading to a new processor,
check the processor’s documentation for the correct voltage setting. Operating the processor at
the wrong voltage can cause unreliable performance.
1.14 Reliability
The Mean-Time-Between-Failures (MTBF) data is calculated from predicted data at 55 oC.
Motherboard MTBF:69,416 hours
Non-Operating-40 oC to +70 oC
Operating0 oC to +55 oC
Vibration
Unpackaged5 Hz to 20 Hz : 0.01g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz : 0.02g² Hz (flat)
Packaged10 Hz to 40 Hz : 0.015g² Hz (flat)
40 Hz to 500 Hz : 0.015g² Hz sloping down to 0.00015 g² Hz
1.16 Power Consumption
Tables 32 and 33 list voltage and current specifications for a computer that contains the
motherboard, a 200 MHz Pentium processor with MMX technology, 32 MB SDRAM, 256 KB
cache, 2 MB SGRAM graphics memory, a 3.5-inch floppy drive, a 1.6 GB hard drive, an 8X IDE
CD-ROM, and a 28.8 Kbps ISA faxmodem. This information is preliminary and is provided only
as a guide for calculating approximate power usage with additional resources added.
NOTE
✏
AC power measurements include all peripheral components mentioned above. DC current
measurements include only the motherboard components.
Table 32.DC Voltage
DC VoltageAcceptable Tolerance
+3.3 V± 5%
+5 V± 5%
-5 V± 5%
+12 V± 5%
-12 V± 5%
Table 33.Power Usage for a static Windows 95 Desktop
APM ModeSystem AC (watts)Motherboard DC (amps)
APM disabled in BIOS580.95.00.010.160.03
Maximum power savings280.62.00.010.130.03
44
+3.3 V+5 V-5 V+12 V-12 V
Motherboard Description
1.16.1 Power Supply Considerations
The motherboard is designed to operate with at least a 200 W ATX power supply for typical
configurations or a higher wattage supply for heavily loaded configurations. The power supply
must meet the following requirements:
• Rise time for power supply: 2 ms to 20 ms
• Minimum delay for Reset to Power Good: 100 ms
• Minimum Powerdown warning: 1 ms
• 3.3 V output must reach its minimum regulation level within ± 20 ms of the 5V output
reaching its minimum regulation level
1.17 Regulatory Compliance
This printed circuit assembly complies with the following safety and EMI regulations when
correctly installed in a compatible host system.
1.17.1 Safety
1.17.1.1 UL 1950 - CSA 950-95, 3rd edition, Dated 3-28-95
The Standard for Safety of Information Technology Equipment including Electrical Business
Equipment. (USA & Canada)
1.17.1.2 CSA C22.2 No. 950-93, 3rd Edition
The Standard for Safety of Information Technology Equipment including Electrical Business
Equipment. (Canada)
Title 47 of the Code of Federal Regulations, Parts 2 & 15, Subpart B, pertaining to unintentional
radiators. (USA)
1.17.2.2 CISPR 22, 2nd Edition, 1993
Limits and methods of measurement of Radio Interference Characteristics of Information
Technology Equipment. (International)
1.17.2.3 EN 55 022, 1995
Limits and methods of measurement of Radio Interference Characteristics of Information
Technology Equipment. (Europe)
1.17.2.4 EN 50 082-1 (1992)
Generic Immunity Standard; Currently compliance is determined via testing to IEC 801-2, -3 and
-4. (Europe)
1.17.2.5 VCCI Class 2 (ITE)
Implementation Regulations for Voluntary Control of Radio Interference by Data Processing
Equipment and Electronic Office Machines. (Japan)
1.17.2.6 ICES-003, Issue 2
Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
1.17.3 Product Certification Markings
This printed circuit assembly has the following product certification markings:
• European CE Marking: Consists of a marking on the board or shipping container.
• UL Recognition Mark: Consists of the UL File No. E139761 on the component side of the
board and the PB No. on the solder side of the board. Board material flammability is 94V-1
or -0.
• Canadian Compliance: Consists of small c followed by a stylized backward UR on component
side of board.
46
2 Motherboard Resources
NOTE
✏
For more detailed information about the resources used for onboard audio, see the Audio
Subsystem section in Chapter 1.
2.1 Memory Map
Table 34.Memory Map
Address Range
(decimal)
1024 K - 262144 K100000 - 10000000255 MBExtended Memory
960 K - 1024 KF0000 - FFFFF64 KBIOS
944 K - 960 KEC000 - EFFFF16 KBoot Block (available as UMB)
936 K - 944 KEA000 - EBFFF8 KESCD (Plug and Play configuration and
932 K - 936 KE9000 - E9FFF4 KReserved for BIOS
928 K - 932 KE8000 - E8FFF4 KOEM Logo or Scan User Flash
896 K - 928 KE0000 - E7FFF32 KPOST BIOS (available as UMB)
800 - 896 KC8000 - DFFFF96 KAvailable High DOS memory (open to ISA
640 K - 800 KA0000 - C7FFF160 KVideo memory and BIOS
639 K - 640 K9FC00 - 9FFFF1 KExtended BIOS data (movable by memory
512 K - 639 K80000 - 9FBFF127 KExtended conventional memory
0 K - 512 K00000 - 7FFFF512 KConventional memory
2.2 DMA Channels
Table 35.DMA Channels
Address Range
(hex)SizeDescription
DMI)
and PCI bus)
manager software)
DMA Channel NumberData WidthResource
08- or 16-bitsAudio
18- or 16-bitsAudio / Parallel Port
28- or 16-bitsFloppy Drive
38- or 16-bitsECP parallel port / Audio
4Reserved - Cascade Channel
516-bitsOpen
616-bitsOpen
716-bitsOpen
03B4 - 03B52 bytesVideo (VGA)
03BA1 byteVideo (VGA)
03BC - 03BF4 bytesLPT3
03C0 - 03CA11 bytesVideo (VGA)
03CC1 byteVideo (VGA)
03CE - 03CF2 bytesVideo (VGA)
03D4 - 03D52 bytesVideo (VGA)
03DA1 byteVideo (VGA)
03E8 - 03EF8 bytesCOM3
03F0 - 03F56 bytesFloppy Channel 1
03F61 bytePrimary IDE Channel Command Port
03F7 (Write)1 byteFloppy Channel 1 Command
03F7, bit 71 bitFloppy Disk Change Channel 1
03F7, bits 6:07 bitsPrimary IDE Channel Status Port
03F8 - 03FF8 bytesCOM1
04D0 - 04D12 bytesEdge/level triggered PIC
0530 - 05378 bytesWindows Sound System
0604 - 060B8 bytesWindows Sound System
LPTn + 400h8 bytesECP port, LPTn base address + 400h
0CF8 - 0CFB*4 bytesPCI Configuration Address Register
0CF9**1 byteTurbo and Reset Control Register
0CFC - 0CFF4 bytesPCI Configuration Data Register
0E80 - 0E878 bytesWindows Sound System
0F40- 0F478 bytesWindows Sound System
0F86 - 0F872 bytesYamaha OPL3-SA Configuration
FF00 - FF078 bytesIDE Bus Master Register
FFA0 - FFA78 bytesPrimary Bus Master IDE Registers
FFA8 - FFAF8 bytesSecondary Bus Master IDE Registers
Dynamically
allocated in PCI
I/O space
*DWORD access only
**Byte access only
32 bytesUSB
Motherboard Resources
NOTE
✏
See the Audio section(s) in Chapter 1 for specific I/O addresses that can be used by the audio
components on your motherboard. This table does not list I/O addresses that may be used by addin cards in the computer.
000000Intel 82430TX (MTXC)
000700Intel 82430TX (PIIX4 ) PCI/ISA bridge, function 0
000701Intel 82430TX (PIIX4 ) IDE Bus Master, function 1
000702Intel 82430TX (PIIX4 ) USB, function 2
000703Intel 82430TX (PIIX4) Power Management, function 3
000800ATI VGA Graphics
000D00PCI Expansion Slot #1 (J4E2)
000E00PCI Expansion Slot #2 (J4E1)
000F00PCI Expansion Slot #3 (J4D1)
001000PCI Expansion Slot #4 (J4C1)
Device
Number (hex)
2.5 Interrupts
Table 38.Interrupts
IRQSystem Resource
NMII/O Channel Check
0Reserved, Interval Timer
1Reserved, Keyboard Buffer Full
2Reserved, Cascade Interrupt From Slave PIC
3COM2*
4COM1*
5LPT2 (Plug and Play option) / Audio / User available
6Floppy Drive
7LPT1*
8Real Time Clock
9User available
10User available / USB
11Windows Sound System* / User available
12Onboard Mouse Port (if present, else user available)
13Reserved, Math Coprocessor
14Primary IDE (if present, else user available)
15Secondary IDE (if present, else user available)
*Default, but can be changed to another IRQ
Function
Number (hex)Description
50
Motherboard Resources
2.6 PCI Interrupt Routing Map
The PCI specification allows for sharing of interrupts between devices attached to the PCI bus. In
most cases, the small amount of latency added by interrupt sharing does not affect the normal
operation or throughput of the devices. However, in some special cases where maximum
performance is needed from a device, you may want to ensure that it does not share an interrupt
with other PCI devices.
This section describes the interrupt sharing mechanism and how the interrupt signals are connected
between the motherboard’s PCI expansion slots and onboard PCI devices. Use this information to
avoid sharing an interrupt for a PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
• INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also
classified as INTA.
• INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
• INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a
fourth interrupt is classified as INTD.
The PIIX4 PCI-to-ISA bridge has four Programmable Interrupt Request (PIRQ) input signals. Any
PCI interrupt source (either onboard or from a PCI add-in card) connects to one of these PIRQ
signals. Because there are only four signals, some PCI interrupt sources are mechanically tied
together on the motherboard and therefore share the same interrupt. Table 39 lists the PIRQ
signals and shows how the signals are connected to the PCI expansion slots and to onboard PCI
interrupt sources.
For example, assume that you plug an add-in card that has one interrupt (group INTA) into the
fourth PCI slot. In this slot, an interrupt source from group INTA connects to the PIRQD signal,
which is already connected to the onboard video and USB PCI sources. The add-in card shares an
interrupt with these onboard interrupt sources. The PCI interrupts will dynamically configure an
available interrupt on the interrupt controller contained within the PIIX4.
Now, however, plug an add-in card that has one interrupt (group INTA) into the first PCI slot.
Plug a second add-in card that has two interrupts (groups INTA and INTB) into the second PCI
slot. INTA in the first slot is connected to signal PIRQA. INTA in the second slot is connected to
signal PIRQB, and INTB is connected to signal PIRQC. With no other cards added, the three
interrupt sources on the first two cards each have a PIRQ signal to themselves. Typically, they will
not share an interrupt.
NOTE
✏
The PIIX4 can connect each PIRQ line internally to one of the IRQ signals (3,4,5,7,9,11,14,15).
Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in
certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be
connected to the same IRQ signal.
52
3 BIOS and Setup Program
3.1 Introduction
The motherboard uses an Intel BIOS, which is stored in Flash EEPROM and can be upgraded
using a floppy disk-based program. In addition to the BIOS, the Flash EEPROM contains the
Setup program, Power-On Self Tests (POST), advanced power management (APM), the PCI autoconfiguration utility, and Windows 95-ready Plug and Play. See Section 5.1 for the supported
versions of these specifications.
This motherboard supports BIOS shadowing, allowing the BIOS to execute from 64-bit onboard
write-protected DRAM.
The BIOS displays a sign-on message during POST identifying the type of BIOS and a revision
code. The initial production BIOS on the motherboard is identified as AN430TX0.86A.
3.1.1 BIOS Flash Memory Organization
The Intel PA28FB200BX 2 Mbit Flash component is organized as 256K x 8 (256 KB). The Flash
device is divided into areas as described in Table 40. The table shows the addresses in the ROM
image in normal mode (the addresses change in BIOS Recovery Mode).
Table 40.Flash Memory Organization
Address (Hex)SizeDescription
FFFF0000 - FFFFFFFF64 KBMain BIOS *
FFFEC000 - FFFEFFFF16 KBBoot Block
FFFEA000 - FFFEBFFF8 KBVirtual Product Data (VPD) Extended System Configuration Data
(ESCD) (DMI configuration data / Plug and Play data)
FFFE9000 - FFFE9FFF4 KBUsed by BIOS (e.g., for Event Logging)
FFFE8000 - FFFE8FFF4 KBOEM logo or Scan Flash Area
FFFC0000 - FFFE7FFF160 KBMain BIOS Block
*At runtime, only this section is shadowed into RAM below the 1 MB address
Flash memory simplifies distributing BIOS upgrades. You can install a new version of the BIOS
from a diskette. BIOS upgrades are available to be downloaded from the secure section on the
Intel bulletin board or from Intel’s FTP or World Wide Web sites (see Section 5.2).
The disk-based Flash upgrade utility, IFLASH.EXE, has three options for BIOS upgrades:
• Update the Flash BIOS from a file on a disk
• Copy the current BIOS code from the Flash EEPROM to a disk file as a backup, in the event
that an upgrade cannot be successfully completed
• Compare the BIOS in the Flash device with a file to make sure the computer has the correct
version
The upgrade utility ensures that the upgrade BIOS extension matches the target computer to
prevent accidentally installing a BIOS for a different type of computer.
3.1.3 Plug and Play: PCI Auto-configuration
The PCI auto-configuration utility operates in conjunction with the Setup program to let you insert
and remove PCI cards without user configuration (Plug and Play). When you turn on the computer
after adding a PCI card, the BIOS automatically configures interrupts, I/O space, and other
parameters. Any interrupts set to “available” in Setup are considered free for use by PCI add-in
cards. PCI interrupts are distributed to available ISA interrupts that have been not been assigned to
an ISA card or to system resources. The assignment of PCI interrupts to ISA IRQs is
nondeterministic. An ISA device cannot share an interrupt allocated to PCI.
PCI configuration information is stored in ESCD format. You can clear the ESCD data by moving
the CMOS Clear jumper (see Section 1.13.3).
For information about the version of PCI and Plug and Play supported by this BIOS, see
Section 5.1. You can obtain copies of the specifications from the Intel World Wide Web site (see
Section 5.2). Peer-to-peer hierarchical PCI Bridge is supported, and by using an OEM-supplied
option ROM or TSR, a PCI-to-PCMCIA bridge capability is possible as well.
3.1.4 PCI IDE Support
If you select “Auto” in Setup, the BIOS automatically sets up the two local bus IDE connectors
with independent I/O channel support. The IDE interface supports hard drives up to PIO Mode 4
and recognizes any ATAPI devices, including CD-ROM drives and tape drives (see Section 5.1 for
the supported version of ATAPI). The BIOS determines the capabilities of each drive and
configures them to optimize capacity and performance. To take advantage of the high capacities
typically available today, hard drives are automatically configured for Logical Block Addressing
(LBA) and to PIO Mode 3 or 4, depending on the capability of the drive. You can override the
auto-configuration options by specifying manual configuration in Setup. The ATAPI Specification
recommends that ATAPI devices be configured as shown in Table 41.
54
BIOS and Setup Program
Table 41.Recommendations for Configuring an ATAPI Device
Primary CableSecondary Cable
Drive 0Drive 1Drive 0Drive 1
Normal, no ATAPIATA
Disk and CD-ROM for enhanced IDE systemsATAATAPI
Legacy IDE System with only one cableATAATAPI
Enhanced IDE with CD-ROM and a tape or two CD-ROMsATAATAPIATAPI
3.1.5 ISA Plug and Play
If you select in Setup to boot with a Plug and Play OS (see Section 3.2.4.1), the BIOS autoconfigures only ISA Plug and Play cards that are required for booting (IPL devices). If you select
to not boot with a Plug and Play OS, the BIOS auto-configures all Plug and Play ISA cards.
3.1.6 ISA Legacy Devices
Since ISA legacy devices are not auto-configurable, the resources for them must be reserved. You
can reserve resources in the Setup program or with an ISA configuration utility (see Section 5.2 for
a Web site address).
The computer’s configuration information is stored in ESCD format. You can clear the ESCD data
by moving the CMOS Clear jumper (see Section 1.13.3).
3.1.7 Desktop Management Interface
Desktop Management Interface (DMI) is a method of managing computers in an enterprise. The
main component of DMI is the Management Information Format (MIF) database, which contains
information about the computer and its components. Using DMI, a system administrator can
obtain the system types, capabilities, operational status, installation date and other information
about the computer’s components. The DMI specification requires that certain information about
the computer’s motherboard be made available to an applications program. This information is
located in a series of data structures which are accessed in various ways by the DMI service layer.
Component instrumentation allows the service layer to gain access to information stored in the
general-purpose area of non-volatile RAM. The MIF database defines the data and provides the
method for accessing the information.
The BIOS support for DMI enables the maximum benefit from applications such as LANDesk
Client Manager from Intel. The BIOS stores and can report on the following types of DMI
information:
• BIOS data, such as the BIOS revision level
• Fixed information, such as data about the motherboard, peripherals, serial numbers and asset
tags, etc.
• Information discovered during bootup, such as memory size, cache size, processor speed, etc.
An OEM can use a utility that makes DMI calls to program system and chassis-related information
into the Flash memory, so the BIOS can also report that information. Once this information is
written, it is locked (read-only).
Intel can provide a utility for making DMI calls to the BIOS. The latest DMI specification is
available from Intel (see Section 5.2) and other sites.
DMI does not work directly under non-Plug and Play operating systems (e.g., Windows NT).
However, the BIOS supports a DMI table interface for such OSs. Using this support, a DMI
service-level application running on a non-Plug and Play OS can access the DMI BIOS
information.
3.1.8 Advanced Power Management
The BIOS supports Advanced Power Management (APM); see Section 5.1 for the version
supported. You can initiate the energy saving Standby mode in two ways:
• Pressing the optional front panel Sleep/Resume button
• Prolonged inactivity; the timeout period is adjustable in the Setup program
When in Standby mode, the motherboard reduces power consumption by using the processor’s
System Management Mode (SMM) capabilities and by spinning down hard drives and reducing
power to or turning off VESA DPMS-compliant monitors. In Setup you can select the DPMS
mode to use for the monitor: Standby, Suspend, Sleep, or Disabled.
While in Standby mode, the computer retains the ability to respond to external interrupts; it can
service requests such as incoming faxes or network messages while unattended. Any keyboard or
mouse activity brings the computer out of Standby mode and immediately restores power to the
monitor.
APM is disabled in the BIOS by default; however, the computer must be configured with an
OS-dependent APM driver for the power-saving features to take effect. For example, Windows 95
enables APM automatically upon detecting the presence of the APM BIOS.
3.1.9 Language Support
The BIOS Setup program and help messages can be supported in 32 languages. Five languages are
available at this time: American English, German, Italian, French, and Spanish. The BIOS
includes extensions to support the Kanji character set and other non-ASCII character sets.
Translations of other languages may become available at a later date.
The default language is American English, which is always present unless another language is
programmed into the BIOS using the Flash Memory Update Program (IFLASH.EXE). See
Section 5.2 for information about downloading IFLASH and other utilities.
56
BIOS and Setup Program
3.1.10 Boot Options
Booting from CD-ROM is supported in adherence to the “El Torito” bootable CD-ROM format
specification developed by Phoenix Technologies and IBM. Under the Boot Options field in
Setup, CD-ROM is one of four possible boot devices, which are defined in priority order. The
default settings are:
• First boot device - Removable devices (floppy drive)
• Second boot device - Hard drive
• Third boot device - CD-ROM
• Fourth boot device - Network
If you select CD-ROM as the boot device, it must be the first device.
NOTE
✏
A copy of the “El Torito” specification is available on the Phoenix Web site
http://www.ptltd.com/techs/specs.html.
In Setup you can also select the network as a boot device, which allows booting from a network
add-in card with a remote boot ROM installed.
3.1.11 OEM Logo or Scan Area
The motherboard supports a 4 KB programmable Flash user area at memory location
E8000-E8FFF. You can use this area to display a custom OEM logo during POST, or can insert a
binary image that executes at certain times during the POST. A utility is available from Intel to
assist with installing a logo into Flash for display during POST.
3.1.12 USB Support
The USB connector on the motherboard allows you to attach any of several USB devices as they
become available. Typically, the device driver for USB devices will be managed by the OS.
However, because keyboard and mouse support may be needed in the Setup program before the OS
boots, the BIOS supports USB legacy keyboards and mice. You can disable this support if
necessary.
3.1.13 BIOS Setup Access Jumper
You can move the Setup Access jumper on the motherboard to enable or disable access to the
Setup program. The default is for access to be enabled. See Section 1.13.4 for the specific pins on
which to place the jumper.
Some types of failure can destroy the BIOS data. For example, the data could be lost if a power
outage occurs while your are updating the BIOS in Flash memory. You can recover the BIOS data
from a diskette by changing the setting of the BIOS Recovery jumper (see Section 1.13.5).
To create a BIOS recovery diskette, you must make a bootable DOS diskette and place the
recovery files on it. The recovery files are available from Intel.
To recover the BIOS, turn off the computer and move the jumper to the BIOS recovery setting.
Insert the bootable BIOS recovery diskette in drive A:. Boot the computer to recover the BIOS.
Two beeps and the end of floppy access to drive A: indicate a successful BIOS recovery. After a
successful recovery, turn off the computer by pressing the power switch for at least 4 seconds, and
return the jumper to the original pins to restore normal operation. A series of continuous beeps
indicates that the recovery operation failed.
NOTE
✏
No video is displayed during the recovery process.
3.2 BIOS Setup Program
The Setup program lets you modify the configuration for most basic changes without opening the
computer. Setup is accessible only during the Power-On Self Test (POST). To enter Setup, press
the <F2> key after the POST memory test has begun and before boot begins. See Section 1.13.4
for information on placing the jumper that prevents user access to Setup for security purposes.
3.2.1 Overview of the Setup Menu Screens
Table 42 lists the screens displayed by the Setup program. Setup initially displays the Main menu
screen. In each screen there are options for modifying the computer’s configuration. Select a
menu screen by pressing the left <←> or right <→> arrow keys. Use the up <↑> or down <↓>
arrow keys to select items in a screen. Use the <Enter> key to select a sub-menu. After you have
selected an item, use the <+> and <−> keys to modify the setting.
58
BIOS and Setup Program
Table 42.Overview of the Setup Menu Screens
Setup Menu ScreenDescription
MainSet up and modify some of the basic options of a PC, such as time, date,
diskette drives, and hard drives.
AdvancedModify the more advanced features of a PC, such as peripheral configuration
and advanced chipset configuration.
SecuritySpecify passwords that can be used to limit access to the computer.
PowerAccess and modify Power Management options.
BootModify options that affect boot up, such as the boot sequence.
ExitSave or discard changes.
Setup SubscreensDescription
Floppy OptionsUsed to configure diskette drive interface.
Primary IDE MasterUsed to configure the primary master IDE drive.
Primary IDE SlaveUsed to configure the primary slave IDE drive.
Secondary IDE MasterUsed to configure the secondary master IDE drive.
Secondary IDE SlaveUsed to configure the secondary slave IDE drive.
Resource ConfigurationUsed to reserve memory blocks and specific IRQs.
Peripheral ConfigurationUsed to configure peripherals.
Keyboard ConfigurationUsed to configure keyboard options.
Video ConfigurationUsed to configure onboard video resources.
DMI Event LoggingView and modify DMI event logs.
Hard DriveUsed to select hard drive.
Removable DevicesUsed to select removable devices.
3.2.2 Main Menu
3.2.2.1 Processor Type
Displays processor type.
3.2.2.2 Processor Speed
Displays processor speed.
3.2.2.3 Cache RAM
Displays size of L2 cache.
3.2.2.4 Total Memory
Displays the total amount of RAM on the motherboard.
Selects the current default language used by the BIOS. The options are:
• English (US) (default)
• Italiano
• Français
• Deutsch
• Español
3.2.2.7 System Time
Specifies the current time.
3.2.2.8 System Date
Specifies the current date. Select the month, day, and year from a pop-up menu.
3.2.2.9 Floppy Options Submenu
When selected, this is used to configure the diskette drives.
3.2.2.9.1 Diskette A:
Specifies the capacity and physical size of diskette drive A:. The options are:
• Disabled
• 360 KB, 5.25 inch
• 1.2 MB, 5.25 inch
• 720 KB, 3.5 inch
• 1.44/1.25 MB, 3.5 inch (default)
• 2.88 MB, 3.5 inch
3.2.2.9.2 Diskette B:
Specifies the capacity and physical size of diskette drive B:. The options are:
• Disabled (default)
• 360 KB, 5.25 inch
• 1.2 MB, 5.25 inch
• 720 KB, 3.5 inch
• 1.44/1.25 MB, 3.5 inch
• 2.88 MB, 3.5 inch
3.2.2.9.3 Floppy Write Protect
Disables or enables write protect for the diskette drive(s). The options are:
• Disabled (default)
• Enabled
60
BIOS and Setup Program
3.2.2.10 Primary IDE Master
Reports size of a connected IDE device. When selected, this displays the device configuration
subscreen for the Primary IDE master interface.
3.2.2.11 Primary IDE Slave
Reports size of a connected IDE device. When selected, this displays the device configuration
subscreen for the Primary IDE slave interface.
3.2.2.12 Secondary IDE Master
Reports size of a connected IDE device. When selected, this displays the device configuration
subscreen for the Secondary IDE master interface.
3.2.2.13 Secondary IDE Slave
Reports size of a connected IDE device. When selected, this displays the device configuration
subscreen for the Secondary IDE slave interface.
3.2.3 Primary/Secondary IDE Master/Slave Configuration Submenus
Used to manually configure the hard drive or have the computer automatically configure it.
3.2.3.1 Type
Selects the drive type that corresponds to the drive installed in your system. If set to User, the
number of Cylinders, Heads, and Sectors can be modified. The options are:
• None
• ATAPI Removable
• IDE Removable
• CD-ROM
• User
• Auto (default)
3.2.3.2 Cylinders
If device configuration is set to Auto, this field reports the number of cylinders for your hard disk
and cannot be modified. If IDE Device Configuration is set to User Definable, you must type the
correct number of cylinders for your hard disk.
3.2.3.3 Heads
If device configuration is set to Auto, this field reports the number of heads for your hard disk and
cannot be modified. If IDE Device Configuration is set to User Definable, you must type the
correct number of heads for your hard disk.
If device configuration is set to Auto, this field reports the number of sectors for your hard disk and
cannot be modified. If IDE Device Configuration is set to User Definable, you must type the
correct number of sectors for your hard disk.
3.2.3.5 Maximum Capacity
Reports the maximum capacity of your hard disk, which is calculated from the number of
cylinders, heads, and sectors. There are no options.
3.2.3.6 Multi-Sector Transfers
Determines the number of sectors per block for multiple sector transfers. The options are:
• Disabled
• 2 Sectors
• 4 Sectors
• 8 Sectors
• 16 Sectors (default)
Check the specifications for your hard disk drive to determine which setting provides optimum
performance for your drive.
3.2.3.7 LBA Mode Control
Specifies the IDE translation mode. LBA causes logical block addressing to be used in place of
Cylinders, Heads, and Sectors. The options are:
• Disabled
• Enabled (default)
CAUTION
Do not change the IDE translation mode from the option selected when the hard drive was
formatted. Changing the option after formatting can result in corrupted data.
3.2.3.8 32 Bit I/O
Enables or disables 32 bit IDE data transfers. The options are:
• Disabled (default)
• Enabled
3.2.3.9 Transfer Mode
Sets how fast the transfers occur on the IDE interface. The options are:
• Standard
• Fast PIO 1
• Fast PIO 2
• Fast PIO 3
• Fast PIO 4 (default)
62
3.2.3.10 Ultra DMA
Sets the Ultra DMA mode for the hard disk drive. The options are:
• Disabled (default)
• Mode 0
• Mode 1
• Mode 2
3.2.4 Advanced Menu
3.2.4.1 Plug & Play O/S
Select Yes if a Plug and Play operating system is being used. The options are:
• No
• Yes (default)
3.2.4.2 Reset Configuration Data
Used to clear the computer’s configuration data. The options are:
• No (default)
• Yes
BIOS and Setup Program
3.2.4.3 Memory Cache
The options are:
• Disabled
• Enabled (default)
3.2.4.4 Memory Bank 0
This status field reports the size and type of memory module in bank 0. There are no options.
3.2.4.5 Memory Bank 1
This status field reports the size and type of memory module in bank 1. There are no options.
3.2.4.6 Resource Configuration Submenu
3.2.4.6.1 Memory Reservation
Reserves specific upper memory blocks for use by legacy ISA devices. The options are:
Selects the delay before key repeat. The options are:
• ¼ sec
• ½ sec (default)
• ¾ sec
• 1 sec
3.2.4.9 Video Configuration Subscreen
3.2.4.9.1 Palette Snooping
Controls the ability of a primary PCI graphics controller to share a common palette with an ISA
add-in video card. The options are:
• Disabled (default)
• Enabled
3.2.4.9.2 Video Monitor Type
Selects the type of video monitor being used. (Available only with the ATI-ImpacTV option.) The
options are:
• VGA
• VGA and TV Out (default)
3.2.4.9.3 TV Out Signal Type
Selects the type of TV Out signal to be used. (Available only with the ATI-ImpacTV option.) The
options are:
• NTSC (North America) (default)
• PAL (Europe)
• PAL-M (South America)
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BIOS and Setup Program
3.2.4.10 DMI Event Logging Sub-menu
3.2.4.10.1 Event Log Capacity
Indicates if there is space available in the event log. There are no options.
3.2.4.10.2 Event Log Validity
Indicates if the contents of the event log are valid. There are no options.
3.2.4.10.3 View DMI event log
Enables viewing of DMI event log. Press <Enter> to view the event log. If there are no event logs
stored, the screen will read “No unread events”.
3.2.4.10.4 Clear all DMI event logs
Clears the DMI Event Log after rebooting. The options are:
• No (default)
• Yes
3.2.4.10.5 Event Logging
Enables Logging of DMI events. The options are:
• Disabled
• Enabled (default)
3.2.4.10.6 Mark DMI Events as read
Used to mark all DMI events as read. Press <Enter> to access the confirmation dialog box.
3.2.5 Security Menu
3.2.5.1 User Password Is
Reports if there is a User password set. There are no options.
3.2.5.2 Supervisor Password Is
Reports if there is a Supervisor password set. There are no options.
3.2.5.3 Set User Password
Sets the User password. The user will be asked to enter the new password and confirm the new
password. The password can be up to seven alphanumeric characters.
3.2.5.4 Set Supervisor Password
Sets the Supervisor password. The user will be asked to enter the new password and confirm the
new password. The password can be up to seven alphanumeric characters.
When enabled, the computer will boot; however, if the computer is password protected, the
keyboard will be locked. Enter the user password to unlock the computer. The user password is
also required to boot from the floppy drive. The options are:
• Disabled (default)
• Enabled
3.2.6 Power Menu
3.2.6.1 Power Management
Enables or disables the BIOS Advanced Power Management feature. When set to disabled, fields
for Inactivity Timer, Hard Drive, and Video will not appear. The options are:
• Disabled (default)
• Enabled
3.2.6.2 Inactivity Timer
Sets the amount of time before the computer enters standby mode. The options are:
• Off (default)
• 1 Minute
• 2 Minutes
• 4 Minutes
• 6 Minutes
• 8 Minutes
• 12 Minutes
• 16 Minutes
3.2.6.3 Hard Drive
Enables the hard drive to be power managed during Standby and Suspend. The options are:
• Disabled
• Enabled (default)
3.2.6.4 Video
Enables video to be power managed during Standby and Suspend. The options are:
• Disabled
• Enabled (default)
3.2.7 Boot Menu
3.2.7.1 Scan User Flash Area
Allows BIOS to scan the flash memory for user binaries. The options are:
• Disabled (default)
• Enabled
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BIOS and Setup Program
3.2.7.2 First Boot Device
This status field reports the category of bootable device. The options are one (and only one) of the
following:
• Removable devices
• Hard Drive
• ATAPI CD-ROM devices
• Network boot
3.2.7.3 Second Boot Device
This status field reports the category of bootable device. The options are one (and only one) of the
following:
• Removable devices
• Hard Drive
• ATAPI CD-ROM devices
• Network boot
3.2.7.4 Third Boot Device
This status field reports the category of bootable device. The options are one (and only one) of the
following:
• Removable devices
• Hard Drive
• ATAPI CD-ROM devices
• Network boot
3.2.7.5 Fourth Boot Device
This status field reports the category of bootable device. The options are one (and only one) of the
following:
• Removable devices
• Hard Drive
• ATAPI CD-ROM devices
• Network boot
3.2.7.6 Hard Drive
This screen lists the available hard drive devices. The computer attempts to boot the operating
system from the first hard-drive in this list. If no operating system is found, the computer tries the
next drive listed until an operating system is found.
The options are any available hard drives. Press <Enter> for a list of available devices. To select
the boot device, use the up <↑> or down <↓> arrow keys. Press <+> to move the device up the
list, or <-> to move it down the list. Press <Esc> to exit this menu.
This screen lists the available removable devices. The operating system assigns drive letters to
these devices in the order listed. You may change the sequence and therefore the drive lettering for
these devices by pressing the <+> or <-> keys.
The options are any available removable devices. Press <Enter> for a list of available devices. To
select the boot device, use the up <↑> or down <↓> arrow keys. Press <+> to move the device up
the list, or <-> to move it down the list. Press <Esc> to exit this menu.
3.2.8 Exit Menu
This section describes how to exit Setup with or without saving the changes you have made to
battery-backed CMOS RAM.
3.2.8.1 Exit Saving Changes
Exits Setup and saves the changes in CMOS RAM. You can also press the <F10> key anywhere
in the Setup program to do this.
3.2.8.2 Exit Discarding Changes
Exits Setup program without saving any changes. This means that any changes you have made
while in Setup are discarded and not saved. Pressing the <Esc> key in any of the four main screens
will also exit and discard changes.
3.2.8.3 Load Setup Defaults
Returns all of the Setup options to their defaults. The default Setup values are loaded from the
ROM table. You can also press the <F9> key anywhere in Setup to load the defaults.
3.2.8.4 Load Custom Defaults
Loads the setup settings from the Custom Defaults.
3.2.8.5 Save Custom Defaults
Normally, the BIOS reads the setup settings from battery backed CMOS RAM. If the CMOS
RAM fails, the BIOS uses the Custom Defaults (if you have set them). If no Custom Defaults are
set, the BIOS uses the factory defaults.
3.2.8.6 Discard Changes
Discards any changes made up to this point in Setup without exiting Setup. This selection loads
the CMOS RAM values that were present when the computer was turned on.
70
4 Error Messages
4.1 BIOS Error Messages
Table 43.BIOS Error Messages
Error MessageExplanation
Diskette drive A error or
Diskette drive B error
Extended RAM Failed at offset: nnnnExtended memory not working or not configured properly at offset
Failing Bits: nnnnThe hex number nnnn is a map of the bits at the RAM address (in
Fixed Disk 0 Failure or
Fixed Disk 1 Failure or
Fixed Disk Controller Failure
Incorrect Drive A type - run SETUPType of floppy drive A: not correctly identified in Setup.
Incorrect Drive B type - run SETUPType of floppy drive B: not correctly identified in Setup.
Invalid NVRAM media typeProblem with NVRAM (CMOS) access.
Keyboard controller errorThe keyboard controller failed test. Try replacing the keyboard.
Keyboard errorKeyboard not working.
Keyboard error nnBIOS discovered a stuck key and displays the scan code nn for the
Keyboard locked - Unlock key switchUnlock the system to proceed.
Monitor type does not match CMOS -
Run SETUP
Operating system not foundOperating system cannot be located on either drive A: or drive C:.
Parity Check 1Parity error found in the system bus. BIOS attempts to locate the
Parity Check 2Parity error found in the I/O bus. BIOS attempts to locate the
Press <F1> to resume, <F2> to
Setup
Drive A: or B: is present but fails the BIOS POST diskette tests.
Check to see that the drive is defined with the proper diskette type
in Setup and that the diskette drive is attached correctly.
nnnn.
System, Extended, or Shadow memory) which failed the memory
test. Each 1 (one) in the map indicates a failed bit.
Fixed disk is not working or not configured properly. Check to see
if fixed disk is attached properly. Run Setup be sure the fixed-disk
type is correctly identified.
stuck key.
Monitor type not correctly identified in Setup.
Enter Setup and see if fixed disk and drive A: are properly
identified.
address and display it on the screen. If it cannot locate the
address, it displays ????.
address and display it on the screen. If it cannot locate the
address, it displays ????.
Displayed after any recoverable error message. Press <F1> to
start the boot process or <F2> to enter Setup and change any
settings.
Previous boot incomplete - Default
configuration used
Real time clock errorReal-time clock fails BIOS test. May require board repair.
Shadow Ram Failed at offset: nnnnShadow RAM failed at offset nnnn of the 64k block at which the
System battery is dead - Replace and
run SETUP
System cache error - Cache disabledRAM cache failed the BIOS test. BIOS disabled the cache.
System CMOS checksum bad - run
SETUP
System RAM Failed at offset: nnnnSystem RAM failed at offset nnnn of in the 64k block at which the
System timer errorThe timer test failed. Requires repair of system board.
Previous POST did not complete successfully. POST loads default
values and offers to run Setup. If the failure was caused by
incorrect values and they are not corrected, the next boot will likely
fail. On systems with control of wait states, improper Setup settings
can also terminate POST and cause this error on the next boot.
Run Setup and verify that the wait-state configuration is correct.
This error is cleared the next time the system is booted.
error was detected.
The CMOS clock battery indicator shows the battery is dead.
Replace the battery and run Setup to reconfigure the system.
System CMOS has been corrupted or modified incorrectly, perhaps
by an application program that changes data stored in CMOS. Run
Setup and reconfigure the system either by getting the Default
Values and/or making your own selections.
error was detected.
4.2 Port 80h POST Codes
During POST (power-on self test), the BIOS generates diagnostic progress codes (POST codes) to
I/O port 80h. If the POST fails, execution stops and the last POST code generated is left at port
80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes requires the use of an add-in card (often called a POST card). The
POST card can decode the port and display the contents on a medium such as a seven-segment
display. These cards can be purchased from JDR Microdevices or other sources.
The following table provides the POST codes that can be generated by the motherboard’s BIOS.
Some codes are repeated in the table because that code applies to more than one operation.
72
Table 44.Port 80h Codes
CodeDescription of POST Operation Currently In Progress
02hVerify Real Mode
03hDisable Non-Maskable Interrupt (NMI)
04hGet CPU type
06hInitialize system hardware
08hInitialize chipset with initial POST values
09hSet IN POST flag
0AhInitialize CPU registers
0BhEnable CPU cache
0ChInitialize caches to initial POST values
0EhInitialize I/O component
0FhInitialize the local bus IDE
10hInitialize Power Management
11hLoad alternate registers with initial POST values
12hRestore CPU control word during warm boot
13hInitialize PCI Bus Mastering devices
14hInitialize keyboard controller
16hBIOS ROM checksum
17hInitialize cache before memory autosize
18h8254 timer initialization
1Ah8237 DMA controller initialization
1ChReset Programmable Interrupt Controller
20hTest DRAM refresh
22hTest 8742 Keyboard Controller
24hSet ES segment register to 4 GB
26hEnable A20 line
28hAutosize DRAM
29hInitialize POST Memory Manager
2AhClear 512 KB base RAM
2ChRAM failure on address line
2EhRAM failure on data bits
2FhEnable cache before system BIOS shadow
30hRAM failure on data bits
32hTest CPU bus-clock frequency
33hInitialize POST Dispatch Manager
34hTest CMOS RAM
35hInitialize alternate chipset registers
36hWarm start shut down
37hReinitialize the chipset (MB only)
CodeDescription of POST Operation Currently In Progress
38hShadow system BIOS ROM
39hReinitialize the cache (MB only)
3AhAutosize cache
3ChConfigure advanced chipset registers
3DhLoad alternate registers with CMOS values
40hSet Initial CPU speed new
42hInitialize interrupt vectors
44hInitialize BIOS interrupts
45hPOST device initialization
46hCheck ROM copyright notice
47hInitialize manager for PCI Option ROMs
(Rel. 5.1 and earlier)
48hCheck video configuration against CMOS
49hInitialize PCI bus and devices
4AhInitialize all video adapters in system
4BhDisplay QuietBoot screen
4ChShadow video BIOS ROM
4EhDisplay BIOS copyright notice
50hDisplay CPU type and speed
51hInitialize EISA board
52hTest keyboard
54hSet key click if enabled
56hEnable keyboard
58hTest for unexpected interrupts
59hInitialize POST display service
5AhDisplay prompt "Press F2 to enter SETUP"
5BhDisable CPU cache
5ChTest RAM between 512 and 640 KB
60hTest extended memory
62hTest extended memory address lines
64hJump to UserPatch1
66hConfigure advanced cache registers
67hInitialize Multi Processor APIC
68hEnable external and CPU caches
69hSetup System Management Mode (SMM) area
6AhDisplay external L2 cache size
6ChDisplay shadow-area message
6EhDisplay possible high address for UMB recovery
74
continued ☛
Table 44.Port 80h Codes (continued)
CodeDescription of POST Operation Currently In Progress
70hDisplay error messages
72hCheck for configuration errors
74hTest real-time clock
76hCheck for keyboard errors
7AhTest for key lock on
7ChSet up hardware interrupt vectors
7EhInitialize coprocessor if present
80hDisable onboard Super I/O ports and IRQs
81hLate POST device initialization
82hDetect and install external RS232 ports
83hConfigure non-MCD IDE controllers
84hDetect and install external parallel ports
85hInitialize PC-compatible PnP ISA devices
86hRe-initialize onboard I/O ports
87hConfigure Motherboard Configurable Devices
88hInitialize BIOS Data Area
89hEnable Non-Maskable Interrupts (NMIs)
8AhInitialize Extended BIOS Data Area
8BhTest and initialize PS/2 mouse
8ChInitialize floppy controller
8FhDetermine number of ATA drives
90hInitialize hard-disk controllers
91hInitialize local-bus hard-disk controllers
92hJump to UserPatch2
93hBuild MPTABLE for multi-processor boards
94hDisable A20 address line (Rel. 5.1 and earlier)
95hInstall CD-ROM for boot
96hClear huge ES segment register
97hFixup Multi Processor table
98hSearch for option ROMs. One long, two short beeps on checksum failure
99hCheck for SMART Drive
9AhShadow option ROMs
9ChSet up Power Management
9EhEnable hardware interrupts
9FhDetermine number of ATA and SCSI drives
A0hSet time of day
A2hCheck key lock
A4hInitialize typematic rate
CodeDescription of POST Operation Currently In Progress
A8hErase F2 prompt
AAhScan for F2 key stroke
AChEnter SETUP
AEhClear IN POST flag
B0hCheck for errors
B2hPOST done - prepare to boot operating system
B4hOne short beep before boot
B5hTerminate QuietBoot
B6hCheck password (optional)
B8hClear global descriptor table
B9hClean up all graphics
BAhInitialize DMI parameters
BBhInitialize PnP Option ROMs
BChClear parity checkers
BDhDisplay MultiBoot menu
BEhClear screen (optional)
BFhCheck virus and backup reminders
C0hTry to boot with INT 19
C1hInitialize POST Error Manager (PEM)
C2hInitialize error logging
C3hInitialize error display function
C4hInitialize system error handler
The following are for boot block in Flash ROM
E0hInitialize the chipset
E1hInitialize the bridge
E2hInitialize the CPU
E3hInitialize system timer
E4hInitialize system I/O
E5hCheck force recovery boot
E6hChecksum BIOS ROM
E7hGo to BIOS
E8hSet Huge Segment
E9hInitialize Multi Processor
EAhInitialize OEM special code
EBhInitialize PIC and DMA
EChInitialize Memory type
EDhInitialize Memory size
76
continued ☛
Table 44.Port 80h Codes (continued)
CodeDescription of POST Operation Currently In Progress
EEhShadow Boot Block
EFhSystem memory test
F0hInitialize interrupt vectors
F1hInitialize Run Time Clock
F2hInitialize video
F3hInitialize beeper
F4hInitialize boot
F5hClear Huge segment
F6hBoot to Mini DOS
F7hBoot to Full DOS
Error Messages
77
5 Specifications and Online Support
5.1 Specifications
The motherboard complies with the following specifications:
Table 45.Compliance with Specifications
Specification DescriptionRevision Level
APMAdvanced Power Management
BIOS interface specification
ATA-33Synchronous DMA Transfer
Protocol specification (to be
proposed as Ultra DMA/33
standard)
ATXATX form factor specificationRevision 2.01, February 1997
DDCDisplay Data Channel standardVersion 2, Revision 0, April 9, 1996