Integrated Silicon Solution IS62WV5128ALL, IS62WV5128BLL User Manual
IS62WV5128ALL
®
IS62WV5128BLL
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V – 2.2V V
2.5V – 3.6V V
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
DD (IS62WV5128ALL)
DD (IS62WV5128BLL)
DESCRIPTION
The ISSI IS62WV5128ALL / IS62WV5128BLL are highspeed, 4M bit static RAMs organized as 512K words by 8
bits. It is fabricated using ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields highperformance and low power consumption devices.
When CS1 is HIGH (deselected) the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV5128ALL and IS62WV5128BLL are packaged
in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin
sTSOP (TYPE I), 32-pin TSOP (Type II), and 36-pin mini
BGA.
ISSI
MAY 2005
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
A0-A18
V
DD
GND
I/O0-I/O7
CS1
OE
WE
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
512K x 8
MEMORY ARRAY
COLUMN I/O
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
1
IS62WV5128ALL, IS62WV5128BLL ISSI
PIN DESCRIPTIONS
A0-A18 Address Inputs
CS1 Chip Enable 1 Input
CS 2 Chip Enable 2 Input
OE Output Enable Input
WE Write Enable Input
I/O0-I/O7 Input/Output
N C No Connection
VDD Power
GND Ground
®
36-pin mini BGA (B) (6mm x 8mm)
(Package Code B)
1 2 3 4 5 6
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
VDD
I/O6
I/O7
A9
A1
A2
OE
A10
NC
WE
NC
A18
CS1
A11
A3
A4
A5
A17
A16
A12
A6
A7
A15
A13
A8
I/O0
I/O1
VDD
GND
I/O2
I/O3
A14
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV5128ALL, IS62WV5128BLL ISSI
1
2
3
4
5
6
7
8
9
10
11
12
13
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32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
A15
A18
WE
A13
A8
A9
A11
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
V
DD
PIN DESCRIPTIONS
A0-A18 Address Inputs
CS1 Chip Enable 1 Input
OE Output Enable Input
WE Write Enable Input
I/O0-I/O7 Input/Output
VDD Power
GND Ground
PIN CONFIGURATION
®
32-pin TSOP (TYPE I), (Package Code T)
32-pin sTSOP (TYPE I) (Package Code H)
1
A11
2
A9
3
A8
4
A13
5
WE
6
A18
7
A15
8
V
DD
9
A17
10
A16
11
A14
A12
A7
A6
A5
A4
12
13
14
15
16
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
32-pin TSOP (TYPE II)
(Package Code T2)
1-800-379-4774
3
IS62WV5128ALL, IS62WV5128BLL ISSI
OPERATING RANGE (VDD)
Range Ambient Temperature IS62WV5128ALL IS62WV5128BLL
Commercial 0°C to +70°C 1.65V - 2.2V 2.5V - 3.6V
Industrial –40°C to +85°C 1.65V - 2.2V 2.5V - 3.6V
®
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.2 to VDD+0.3 V
VDD VDD Related to GND –0.2 to VDD+0.3 V
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1.0 W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions VDD Min. Max. Unit
VOH Output HIGH Voltage IOH = -0.1 mA 1.65-2.2V 1.4 — V
IOH = -1 mA 2.5-3.6V 2. 2 — V
VOL Output LOW Voltage IOL = 0.1 mA 1.65-2.2V — 0.2 V
IOL = 2.1 mA 2.5-3.6V — 0.4 V
VIH Input HIGH Voltage 1.65-2.2V 1.4 VDD + 0.2 V
2.5-3.6V 2. 2 VDD + 0.3 V
(1)
VIL
ILI Input Leakage GND ≤ VIN ≤ VDD –1 1 µA
Input LOW Voltage 1.65-2.2V –0.2 0.4 V
2.5-3.6V –0.2 0.6 V
ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled – 1 1 µA
Notes:
1. VIL (min.) = –1.0V for pulse width less than 10 ns.
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/05
IS62WV5128ALL, IS62WV5128BLL ISSI
®
CAPACITANCE
(1)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 8 pF
COUT Input/Output Capacitance VOUT = 0V 1 0 pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
AC TEST CONDITIONS
Parameter IS62WV5128ALL IS62WV5128BLL
(Unit) (Unit)
Input Pulse Level 0.4V to VDD-0.2V 0.4V to VDD-0.3V
Input Rise and Fall Times 5 ns 5ns
Input and Output Timing VREF VREF
and Reference Level
Output Load See Figures 1 and 2 See Figures 1 and 2
IS62WV5128ALL IS62WV5128BLL
1.65 - 2.2V 2.5V - 3.6V
R1(Ω) 3070 3070
R2(Ω) 3150 3150
VREF 0.9V 1.5V
VTM 1.8V 2.8V
AC TEST LOADS
R1
VTM
OUTPUT
30 pF
Including
jig and
scope
Figure 1
R2
Figure 2
VTM
OUTPUT
5 pF
Including
jig and
scope
R1
R2
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
05/02/05
1-800-379-4774
5
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