![](/html/74/7481/7481ac98489231a0d4e8c39fe06220c05c676677f40c3233588f8e3dd750ee45/bg1.png)
Hex Schmitt-Trigger Inverter
The 74LV14 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT14.
The 74LV14 provides six inverting buffers with Schmitt-trigger
action.
•
Wide Operating Voltage: 1.0 to 5.5 V
•
Optimized for Low Voltage applications: 1.0 to 3.6 V
•
Accepts TTL input levels between V
•
Low input current
=2.7 V and VCC =3.6 V
CC
TECHNICAL DATA
IN74LV14
ORDERING INFORMATION
IN74LV14N Plastic
IN74LV14D SOIC
IZ74LV14 Chip
TA = -40° ÷ 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Input Output
A
LH
HL
Y=
A
PIN 14 =V
PIN 7 = GND
CC
1
![](/html/74/7481/7481ac98489231a0d4e8c39fe06220c05c676677f40c3233588f8e3dd750ee45/bg2.png)
IN74LV14
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
IIK*
IOK*
Io*
CC
DC supply voltage (Referenced to GND)
1
DC input diode current
2
DC output diode current
3
DC output source or sink current
-0.5 ÷ +7.0
±
20
±
50
±
25
-bus driver outputs
I
GND
DC GND current for types with
±
50
- bus driver outputs
I
CC
DC VCC current for types with
±
50
- bus driver outputs
P
Tstg Storage temperature
T
Power dissipation per paskade, plastic DIP+
D
SOIC package+
Lead temperature, 1.5 mm from Case for 10 seconds
L
750
500
-65 ÷ +150
260
(Plastic DIP ), 0.3 mm (SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C
1
: V
*
2
: Vo < -0.5V or Vo > VCC+0.5V
*
3
: -0.5V < Vo < VCC+0.5V
*
SOIC Package: : - 8 mW/°C from 70° to 125°C
<
-0.5V or V
I
>
V
+0.5V
I
CC
V
mA
mA
mA
mA
mA
mW
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
VIN, V
T
tr, t
CC
A
f
DC Supply Voltage (Referenced to GND) 1.0 5.5 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -40 +125
Input Rise and Fall Time
1.0 V≤V
2.0 V≤V
2.7 V≤V
3.6 V≤V
<2.0 V
CC
<2.7 V
CC
<3.6 V
CC
≤5.5 V
CC
0
0
0
0
CC
500
200
100
50
V
°
C
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused outputs must be left open.
2
).