INTEGRAL IW4017BN, IW4017BD Datasheet
TECHNICAL DATA
29
Counter/Divider
High-Voltage Silicon-Gate CMOS
The IW4017B is 5-stage Johnson counter having 10 decoded
outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT
signal. Schmitt trigger action in the CLOCK input circuit provides
pulse shaping that allows unlimited clock input pulse rise and fall
times.
The counter is advanced one count at the positive clock signal
transition if the CLOCK INHIBIT signal is low. Counter advancement
via the clock line is inhibited when the CLOCK INHIBIT signal is
high. A high RESET signal c lears the counter to it s zer o co unt. Use of
the Johnson counter configuration permits high-speed operation, 2input decode-gating and spike-free decoded outputs. Anti-lock gating
is provided, thus assuring proper counting sequence. The decoded
outputs are normally low and go high only at their respective decoded
time slot. Each decoded output remains high for one full clock cycle. A
CARRY-OUT signal completes one cycle every 10 clock input cycles
in the IW4017B.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4017B
ORDERING INFORMATION
IW4017BN Plastic
IW4017BDW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
FUNCTION TABLE
Clock Clock
Enable
Reset Output State *
L X L no change
X H L no change
X X H reset counter
Q0=H, Q1-Q9=L,
C0=H
L L Advance to next
state
X L no change
X L no change
H L Advance to next
state
* Carry Out=H for Q0,Q1,Q2,Q3 or Q4=H
Carry Out = L otherwise, X=don’t care
IW4017B
30
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
V
IN
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
V
OUT
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
I
IN
DC Input Current, per Pin
±
10
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
P
D
Power Dissipation per Output Transistor 100 mW
Tstg Storage Temperature -65 to +150
°
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
°
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 3.0 18 V
VIN, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types -55 +125
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
).
Unused outputs must be left open.
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