INTEGRAL IW4002BN, IW4002BD Datasheet

Dual 4-Input NOR Gate

High-Voltage Silicon-Gate CMOS

The IW4002B NOR gates provide the system designer with direct

emplementation of the NOR function.

•

Operating Voltage Range: 3.0 to 18 V

•

Maximum input current of 1 µA at 18 V over full package­temperature range; 100 nA at 18 V and 25°C

•

Noise margin (over full package temperature range):

1.0 V min @ 5.0 V supply

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

TECHNICAL DATA

IW4002B

ORDERING INFORMATION

IW4002BN Plastic

IW4002BD SOIC

TA = -55° to 125° C for all packages

LOGIC DIAGRAM

PINS 6, 8 = NO CONNECTION

PIN 14 =V

PIN 7 = GND

CC

PIN ASSIGNMENT

NC = NO CONNECTION

FUNCTION TABLE

Inputs Output
ABCD Y
HXXX L
XHXX L
XXHX L
XXXH L
LLLL H

X = don’t care

7

IW4002B

MAXIMUM RATINGS

*

Symbol Parameter Value Unit

V

CC

V

V

OUT

I

IN

P

P

DC Supply Voltage (Referenced to GND) -0.5 to +20 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V

IN

DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+

D

SOIC Package+
Power Dissipation per Output Transistor 100 mW

D

±

10

750
500

Tstg Storage Temperature -65 to +150

T

Lead Temperature, 1 mm from Case for 10 Seconds

L

260

(Plastic DIP or SOIC Package)

*

Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

V

VIN, V

T

CC

A

DC Supply Voltage (Referenced to GND) 3.0 18 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V

OUT

Operating Temperature, All Package Types -55 +125

CC

mA

mW

°

C

°

C

V

°

C

This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V

IN

or V

OUT

)≤VCC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V

and V

IN

should be constrained to the range

OUT

CC

Unused outputs must be left open.

8

).