INTEGRAL IN9270N Datasheet
DTMF RECEIVER
High-Performance Silicon-Gate CMOS
The IN9270 is a complete DTMF receiver integrating both the
bandsplit filter and digital decoder functions. The filter section uses
switched capacitor techniques for high- and low-group filters and dialtone rejection. Digital counting techniques are employed in the
decoder to detect and decode all 16 DTMF tone-pairs into a 4-bit
code. External component count is minimized by on-chip provision of
a differential input amplifier, clock-oscillator and latched 3-state bus
interface.
•
Complete receiver in an 18-pin package.
•
Excellent performance.
•
CMOS, single 5 vol t operatio n.
•
Minimum board area.
•
Central office quality.
•
Low power consumption.
TECHNICAL DATA
IN9270
ORDERING INFORMATION
IN9270N
TA = -10° to 70° C
LOGIC DIAGRAM
PIN ASSIGNMENT
*
Connect to GND
PIN 9 = GND
PIN 18 = V
PINS 5,6 = NO CONNECTION
CC
1
IN9270
PIN DESCRIPTIONS
NAME PIN
ESt 16 Early steering output. Presents a logic high immediately when the digital
algorithm detects a recognizable tone-pair (signal condition). Any momentary loss
of signal condition will cause ESt to return to a logic low.
GS 3 Gain Select. Gives access to output of front-end differential amplifier for
connection of feedback resistor.
IC 5,6 Internal Connection. Must be tied to GND.
IN+ 1 Non-Inverti ng Input Connections to the front-end
IN- 2 Inverting Input
C1 7 Clock Input 3.579545 MHz crystal connected between
C2 8 Clock Output
Q1-Q4 11-14 3-state data outputs. When enabled by OE, provide the code corresponding to the
last valid tone-pair received.
StD 15 Delayed steering output. Presents a logic high when a received tone-pair has been
registered and the output latch updated; returns to logic low when the voltage on
St/GT falls below V
TSt
.
St/GT 17 Steering input/guard time output (bi-directional). A voltage greater than V
detected at St causes the device to register the detected tone-pair and update the
output latch. A voltage less than V
The GT output acts to reset the external steering time-constant; its state is a
function of ESt and the voltage on St.
OE 10 3-state output enable (input). Logic high enables the outputs Q1-Q4. Internal pull-
up.
V
CC
V
REF
18 Positive power supply, +5 V.
4 Reference voltage output, nominally VCC /2. May be used to bias the inputs at
mid-rail.
GND 9 Negative power supply, normally connected to 0 V.
DESCRIPTION
differential amplifier.
these pins completes internal oscillator.
frees the device to accept a new tone-pair.
TSt
TSt
,
FUNCTIONAL DESCRIPTION
The IN9270 monolithic DTMF receivers offer small
size, low power co nsumption and high perfor mance.
The architecture consists of a bandsplit filter section,
which separates the high and low tones of a receiver
pair, followed by a digital counting section which
verifies the frequency and duration of the received
tones before passing the corresponding code to the
output bus.
Filter Section
Separation of the low-group and high-group tones is
achieved byapplying the dual-tone signal to the inputs
2
of two filters - a sixth order for the high group and an
eight order for the low group. The band-widths of
which correspond to the bands enclosing the lowgroup and high-group tones (see Figure 1). The filter
section also incorporates notches at 350 Hz and
440 Hz for exceptional dial-tone rejection. Each filter
output is followed by a second order switchedcapacitor section which smooths the signals prior to
limiting. Limiting is performed by high-gain
comparators which are provided with hysteresis to
prevent detection of unwanted low-level signals and
noise; the outputs of the comparators provide full-rail
logic swings at the frequencies of the incoming tones.
IN9270
Decoder Section
The decoder uses digital counting techniques to
determine the frequencies of the limited tones and to
verify that they correspond to standard DTMF
frequencies. A complex averaging algorithm protects
against tone simulation by extraneous signals, such as
voice, while providing tolerance to small frequency
deviations and variations. This averaging algorithm
has been developed to ensure an optimum
combination of immunity to “talk-off” and tolerance
to the presence of interfering signals (“third tones”)
and noise. When the detector recognizes the
simultaneous presence of two valid tones (referred to
as “signal condition” in some industry specifications),
it raises the “early steering” flag (ESt). Any
subsequent loss of signal-condition will cause Est to
fall.
Steering Circuit
Before registration of a decoded tone-pair, the
receiver checks for a valid signal duration (referred to
as “character-recognition-condition”). This check is
performed by an external RC time-constant driven by
ESt. A logic high on E St causes V
rise as the capacitor discharges. Provided signalcondition is maintained (ESt remains high) for the
validation period (t
(V
) of the steering logic to register the tone-pair,
TSt
), VC reaches the threshold
GTP
latching its corresponding 4-bit code (see Figure 3)
into the output latch. At this point, the GT output is
activated and drives V
to VCC. GT continues to drive
C
high as long as ESt remains high. Fina lly after a short
delay to allow the output latch to settle, the “delayedsteering” outp ut flag, StD, go es high, signal ing that a
received tone-pair has been registered. The contents
of the output latch are made available on the 4-bit
output bus by raising the 3-state control input (OE) to
a logic high. The st eering circuit works in re verse to
validate the interdigit pause between signals. Thus, as
well as rejecting signals too short to be considered
valid, the receiver will tolerate signal interruptions
(“drop-out”) too short to be considered a valid pause.
The facility, together with the capability of selecting
the steering time-constants externally, allows the
designer to tailor performance to meet a wide variety
of system requirements.
(see Figure 2) to
C
Guard Time Adjustment
In many situations not requiring independent
selection of receive and pause, the simple steering
circuit of Figure 2 is applicable. Component values
are chosen according to the following formula:
t
= tDP + t
REC
tID = tDA + t
The value of tDP is a parameter of the device and t
GTP
GTA
REC
is the minimum signal duration to be recognized by
the receiver. A value for C of 0.1 µF is recommended
for most applications, leaving R to be selected by the
designer. For example, a suitable value of R for a t
REC
of 40 ms would be 300 k.
Different steering arrangements may be esed to select
independently the guard-times for tone-present (t
and tone-absent (t
). This may be necessary to meet
GTA
GTP
system specifications which place both accept and
reject limits on both tone duration and inter-digital
pause.
Guard-time adjustment also allows the designer to
tailor system parameters such as talk-off and noise
immunity. Increasing t
improves talk-off
REC
performance, since it reduces the probability that
tones simulated by speech will maintain signal
condition for long enough to be registered. On the
other hand, a relatively short t
with a long t
REC
DO
would be appropriate for extremely noisy
environments where fast acquisition time and
immunity to drop-outs would be requirements.
Design information for guard-time adjustment is
show in Figure 4.
Input Configuration
The input arrangement of the IN9270 provides a
differential-input operational amplifier as well as a
bias source (V
mid-rail.
Provision is made for connection of a feedback
resistor to the op-amp output (GS) for adjustment of
gain.
In a single-ended configuration, the input pins are
connected as shown in Figure 5 with the op-amp
connected for unity gain and V
1/2V
. Figure 6 shows the differential configuration,
CC
which permits the adjustment of gain with the
feedback resistor R
) which is used to bias the inputs at
REF
biasing the input at
REF
.
5
)
2
IN9270
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
I
IN
P
DC Supply Voltage (Referenced to GND) -0.3 to +6.0 V
DC Input Voltage (Referenced to GND) -0.3 to VCC +0.3 V
IN
DC InputCurrent, per Pin 10 mA
Power Dissipation in Still Air, Plastic DIP
D
**
500 mW
Tstg Storage Temperature -65 to +150
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**
Derating: -10 mW/
from 65°C to 70°C.
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
V
T
P
tr, t
CC
IN
A
O
f
DC Supply Voltage (Referenced to GND) 4.75 5.25 V
DC Input Voltage (Referenced to GND) 1.5 3.5 V
Operating Temperature -10 +70
Power Consumption ( f = 3.579 MHz, VCC = 5 V) - 45 mW
Input Rise and Fall Time 0 110 ns
°
C
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused outputs must be left open.
2
).
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