![](/html/d8/d8bc/d8bc24c0fd7e371986bf9d24e1e8a97335bed0fbd155dd64e991cfd57ba72098/bg1.png)
Octal D Flip-Flop with
Common Clock and Reset
High-Performance Silicon-Gate CMOS
The IN74HC273A is identical in pinout to the LS/ALS273. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of eight D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of
the Clock input. Reset is asynchronous and active low.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0 µA
•
High Noise Immunity Characteristic of CMOS Devices
TECHNICAL DATA
IN74HC273A
ORDERING INFORMATION
IN74HC273AN Plastic
IN74HC273ADW SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN 20=V
PIN 10 = GND
CC
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output
Reset Clock D Q
LX X L
HHH
HLL
H L X no change
H X no change
X = don’t care
331
![](/html/d8/d8bc/d8bc24c0fd7e371986bf9d24e1e8a97335bed0fbd155dd64e991cfd57ba72098/bg2.png)
IN74HC273A
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
I
OUT
I
CC
P
DC Supply Voltage (Referenced to GND) -0.5 to +7.0 V
DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
±
20
±
35
±
75
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
mA
mA
mA
mW
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
VIN, V
T
A
tr, t
f
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
Unused outputs must be left open.
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125
Input Rise and Fall Time (Figure 1) VCC =2.0 V
IN
or V
OUT
)≤VCC.
V
V
IN
=4.5 V
CC
=6.0 V
CC
and V
should be constrained to the range
OUT
0
0
0
CC
1000
500
400
V
°
C
ns
CC
).
332