INNOLUX N140FGE.LA2 Specification

PRODUCT SPECIFICATION

Doc. Number:

▓ Tentative Specification
□ Preliminary Specification
□ Approval Specification

MODEL NO.: N140FGE

SUFFIX: LA2

Customer:
APPROVED BY SIGNATURE

Name / Title

Note：300nits

Please return 1 copy for your confirmation with your
signature and comments.

Approved By Checked By Prepared By

陳郁甫

2012-08-06

23:33:37 CST

曹文彬

2012-07-27

10:55:17 CST

陳郁甫

2012-07-24

14:42:12 CST

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PRODUCT SPECIFICATION

CONTENTS

1. GENERAL DESCRIPTION.........................................................................................................4

1.1 OVERVIEW ................................................................................................................................4

1.2 GENERAL SPECIFICATI0NS ...................................................................................................4

2. MECHANICAL SPECIFICATIONS .............................................................................................4

2.1 CONNECTOR TYPE..................................................................................................................4

3. ABSOLUTE MAXIMUM RATINGS.............................................................................................5

3.1 ABSOLUTE RATINGS OF ENVIRONMENT ..........................................................................5

3.2 ELECTRICAL ABSOLUTE RATINGS......................................................................................5

3.2.1 TFT LCD MODULE ............................................................................................................5

4. ELECTRICAL SPECIFICATIONS...............................................................................................6

4.1 FUNCTION BLOCK DIAGRAM...............................................................................................6

4.2. INTERFACE CONNECTIONS .................................................................................................6

4.3 ELECTRICAL CHARACTERISTICS........................................................................................8

4.3.1 LCD ELETRONICS SPECIFICATION...............................................................................8

4.3.2 LED CONVERTER SPECIFICATION..............................................................................10

4.3.3 BACKLIGHT UNIT...........................................................................................................12

4.4 LVDS INPUT SIGNAL TIMING SPECIFICATIONS .............................................................13

4.4.1 LVDS DC SPECIFICATIONS ...........................................................................................13

4.4.2 LVDS DATA FORMAT......................................................................................................13

4.4.3 COLOR DATA INPUT ASSIGNMENT ............................................................................14

4.5 DISPLAY TIMING SPECIFICATIONS ...................................................................................15

4.6 POWER ON/OFF SEQUENCE ................................................................................................16

5. OPTICAL CHARACTERISTICS ...............................................................................................17

5.1 TEST CONDITIONS.................................................................................................................17

5.2 OPTICAL SPECIFICATIONS ..................................................................................................17

6. RELIABILITY TEST ITEM ........................................................................................................20

7. PACKING..................................................................................................................................21

7.1 MODULE LABEL ....................................................................................................................21

7.2 CARTON...................................................................................................................................22

7.3 PALLET.....................................................................................................................................23

8. PRECAUTIONS........................................................................................................................24

8.1 HANDLING PRECAUTIONS..................................................................................................24

8.2 STORAGE PRECAUTIONS ....................................................................................................24

8.3 OPERATION PRECAUTIONS.................................................................................................24

Appendix. EDID DATA STRUCTURE...........................................................................................25

Appendix. OUTLINE DRAWING..................................................................................................28

Appendix. SYSTEM COVER DESIGN NOTICE..........................................................................30

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PRODUCT SPECIFICATION

REVISION HISTORY

Version Date Page Description

0.0 Jul 23, 2012 All Tentative Spec Ver.0.0 was first issued.

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PRODUCT SPECIFICATION

1. GENERAL DESCRIPTION

1.1 OVERVIEW

N140FGE-LA2 is a 14.0” (14.0” diagonal) TFT Liquid Crystal Display module with LED Backlight unit

and 40 pins LVDS interface. This module supports 1600 x 900 HD+ mode and can display 262,144
colors. The optimum viewing angle is at 6 o’clock direction.

1.2 GENERAL SPECIFICATI0NS

Item Specification Unit Note
Screen Size 14.0” diagonal
Driver Element a-si TFT active matrix - ­Pixel Number 1600 x R.G.B. x 900 pixel ­Pixel Pitch 0.1935 (H) x 0.1935 (V) mm ­Pixel Arrange ment RGB vertical stripe - ­Display Colors 262,144 color ­Transmissive Mode Normally white - ­Surface Treatment Hard coating (3H), Anti-Glare - ­Luminance, White 300 Cd/m2
Power Consumption Total (6.3 W) (Tpy.) @ cell (1.3 W) (Max.), BL (5 W) (Max.) (1)

Note (1) The specified power consumption (with converter efficiency) is under the conditions at VCCS =

3.3 V, fv = 60 Hz, LED_VCCS = Typ, fPWM = 200 Hz, Duty=100% and Ta = 25 ± 2 ºC, whereas mosaic
pattern is displayed.

2. MECHANICAL SPECIFICATIONS

Item Min. Typ. Max. Unit Note

Horizontal (H) 319.9 320.4 320.9 mm

Module Size

Active Area

Note (1) Please refer to the attached dra win gs for more information of front and back outline dimensions.

Vertical (V) 204.6 205.1 205.6 mm
Thickness (T) - - 3.0 mm
Horizontal 309.3 309.6 309.9 mm
Vertical 173.85 174.15 174.45 mm

Weight - 270 280 g

2.1 CONNECTOR TYPE

Pin1 Pin40

(1)

Please refer Appendix Outline Drawing for detail design.

Connector Part No.: IPEX-20455-040E-12 & Foxconn-GS13401-1110A-7H or equivalent
User’s connector Part No: IPEX-20453-040T-01 or equivalent

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PRODUCT SPECIFICATION

3. ABSOLUTE MAXIMUM RATINGS

3.1 ABSOLUTE RATINGS OF ENVIRONMENT

Item Symbol

Min. Max.
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient T emperature TOP 0 +50 ºC (1), (2)

Note (1) (a) 90 %RH Max. (Ta <= 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC min. and 60 ºC max.

Relative Humidity (%RH)

100

90

Value

Unit Note

80

60

Operating

40

20
10

Storage Range

Temperature (ºC)

3.2 ELECTRICAL ABSOLUTE RATINGS

3.2.1 TFT LCD MODULE

Item Symbol

Power Supply V oltage VCCS (-0.3) (+4.0) V
Logic Input Voltage VIN (-0.3) (VCCS+0.3) V
Converter Input Voltage
Converter Control Signal Voltage
Converter Control Signal Voltage

LED_VCCS
LED_PWM,

LED_EN

Value

Min. Max.

(-0.3) (25) V (1)
(-0.3) (5) V (1)
(-0.3) (5) V (1)

Unit Note

80 60 -20 40 0 20 -40

(1)

Note (1) Stresses beyond those listed in above “ELECTRICAL ABSOLUTE RATINGS” may cause

permanent damage to the device. Normal operation should be restricted to the conditions
described in “ELECTRICAL CHARACTERISTICS”.

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4. ELECTRICAL SPECIFICATIONS

4.1 FUNCTION BLOCK DIAGRAM

LVDS Display
Data & Clock

VCCS

GND

Data

EDID

CLK

EDID

V

EDID

Converter
Input Signals

INPUT CONNECTOR

DC/DC CONVERTER &

REFERENCE VOLTAGE

LED CONVERTER BACKLIGHT UNIT

PRODUCT SPECIFICATION

TIMING

CONTROLLER

GENERATOR

EDID

EEPROM

SCAN DRIVER IC

TFT LCD

PANEL

DA TA DRIVER IC

4.2. INTERFACE CONNECTIONS

PIN ASSIGNMENT

Pin Symbol Description Remark

1 NC No Connection (Reserve)
2 VCCS Power Supply (3.3V typ.)
3 VCCS Power Supply (3.3V typ.)
4 VEDID DDC 3.3V power
5 NC No Connection (Reserved for CMI test)
6 CLKEDID DDC clock
7 DATAEDID DDC data
8 RXO0- LVDS Differential Data Input (Odd)

9 RXO0+ LVDS Differential Data Input (Odd)
10 VSS Ground
11 RXO1- LVDS Differential Data Input (Odd)
12 RXO1+ LVDS Differential Data Input (Odd)
13 VSS Ground
14 RXO2- LVDS Differential Data Input (Odd)
15 RXO2+ LVDS Differential Data Input (Odd)
16 VSS Ground
17 RXOC- LVDS Clock Data Input (Odd)
18 RXOC+ LVDS Clock Data Input (Odd)
19 VSS Ground
20 RXE0- LVDS Differential Data Input (Even) R0-R5, G0
21 RXE0+ LVDS Differential Data Input (Even)
22 VSS Ground
23 RXE1- LVDS Differential Data Input (Even) G1~G5, B0, B1

R0-R5, G0

G1~G5, B0, B1

B2-B5,HS,VS, DE

LVDS CLK

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PRODUCT SPECIFICATION

24 RXE1+ LVDS Differential Data Input (Even)
25 VSS Ground
26 RXE2- LVDS Differential Data Input (Even) B2-B5,HS,VS, DE
27 RXE2+ LVDS Differential Data Input (Even)
28 VSS Ground
29 RXEC- LVDS Clock Data Input (Even) LVDS CLK
30 RXEC+ LVDS Clock Data Input (Even)
31 LED_GND LED Ground
32 LED_GND LED Ground
33 LED_GND LED Ground
34 NC No Connectio n (Reserve)
35 LED_PWM PWM Control Signal of LED Converter
36 LED_EN Enable Control Signal of LED Converter
37 CABC_EN CABC Enable Input
38 LED_VCCS LED Power Supply
39 LED_VCCS LED Power Supply
40 LED_VCCS LED Power Supply

Note (1) The first pixel is odd as shown in the following figure.

1,1

(odd)

2,1
3,1

1,2

(even)

2,2

1,3

(odd)

1,4

(even)

1,Xmax

Pitch

Pitch

Ymax,1

Note (2) The setting of Color engine and CABC function are as follows.

Pin Enable Disable

CABC_EN Hi Lo or Open

Hi = High level, Lo = Low level.

Ymax,
Xmax

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PRODUCT SPECIFICATION

4.3 ELECTRICAL CHARACTERISTICS

4.3.1 LCD ELETRONICS SPECIFICATION

Parameter Symbol

Min. Typ. Max.
Power Supply Voltage VCCS (3.0) (3.3) (3.6) V (1)­Ripple Voltage VRP - (50) - mV (1)-

Value

Unit Note

CABC_EN Input Voltage

High Level V
Low Level V

Inrush Current I

(2.3) - (3.6) V

IHCABC

(0) - (0.5) V

ILCABC

- - 1.5 A (1),(2)

RUSH

Mosaic - TBD TBD mA (3)a

Power Supply Current

Black

lcc

- TBD TBD mA (3)b
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Note (2) I

: the maximum current when VCCS is rising

RUSH

I

: the maximum current of the first 100ms after power-on

IS

Measurement Conditions: Shown as the following figure. Test pattern: black.

+3.3V

Q1 2SK1475

VR1

R1

47K

Q2

2SK1470

C2

47K

R2

1K

0.01uF

(High to Low)

(Control Signal)

SW

+12V

C1

1uF

FUSE

C3
1uF

VCCS

(LCD Module Input)

VCCS rising time is 0.5ms

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PRODUCT SPECIFICATION

Note (3) The specified power supply current is under the conditions at VCCS = 3.3 V, Ta = 25 ± 2 ºC, DC
Current and f

= 60 Hz, whereas a power dissipation check pattern below is displayed.

v

a. Mosaic Pattern

Active Area

b. Black Pattern

Active Area

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PRODUCT SPECIFICATION

4.3.2 LED CONVERTER SPECIFICATION

Value

Parameter Symbol

Min. Typ. Max.

Converter Input power supply voltage LED_Vccs (6.0) (12.0) (21.0) V

Unit Note

Converter Inrush Current ILED

RUSH

- - (1.5) A (1)

Backlight On (2.3) - (5.0) V

EN Control Level

Backlight Off

0 - (0.5) V

PWM High Level (2.3) - (5.0) V

PWM Control Level

PWM Low Level

0 - (0.5) V

(10) - 100 %

PWM Control Duty Ratio

(5) - 100 % (2)

PWM Control Permissive Ripple
Voltage

PWM Control Frequency f

VPWM_pp - - 100 mV

(190) - (2K) Hz (3)

PWM

LED Power Current LED_VCCS =Typ. ILED TBD TBD TBD mA (4)

Note (1) ILED
ILED
Measurement Conditions: Shown as the following figure. LED_VCCS = Typ, Ta = 25 ± 2 ºC, f

: the maximum current when LED_VCCS is rising,

RUSH

: the maximum current of the first 100ms after power-on,

IS

PWM

= 200 Hz, Duty=100%.

LED_VCCS(Typ)

Q1 IRL3303

VR1

R1

47K

R2

1K

47K

0.01uF

Q2

IRL3303

C2

(High to Low)

(Control Signal)

SW=24V

LED_VCCS(Typ)

C1

1uF

FUSE

C3
1uF

(LED Converter Input)

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PRODUCT SPECIFICATION

≤

∗

∗+≤

LED_VCC

LED_PWM

LED_EN

ILED

0V

0V

0V

ILED

VLED rising time is 0.5ms

0.5ms
90%

10%

Rush

100ms

ILED

IS

Note (2) If the PWM control duty ratio is less than 10%, there is some possibility that acoustic noise or

backlight flash can be found. And it is also difficult to control the brightness linearity.

Note (3) If PWM control frequency is applied in the range less than 1KHz, the “waterfall” phenomenon on

the screen may be found. To avoid the issue, it’s a suggestion that PWM control frequency should
follow the criterion as below.

PWM control frequency f

+ fN )33.0( f

should be in the range

PWM

fN

PWM

)66.0(

N : Integer )3( ≥N

f : Frame rate

Note (4) The specified LED power supply current is under the conditions at “LED_VCCS = Typ.”, Ta = 25

± 2 ºC, f

= 200 Hz, Duty=100%.

PWM

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PRODUCT SPECIFICATION

4.3.3 BACKLIGHT UNIT

Ta = 25 ± 2 ºC

Parameter Symbol

LED Light Bar Power
Supply Volt age
LED Light Bar Power
Supply Current

L 25 29 30 V

V

I

L -- (115) -- mA

Min. Typ. Max.

Power Consumption PL (2.88) (3.34) (3.45) W (3)
LED Life Time LBL 15000 - - Hrs (4)

Note (1) LED current is measured by utilizing a high frequency current meter as shown below :

Value

Unit Note

(1)(2)(Duty100%)

V

L, IL

LED
Light Bar

Light Bar Feedback
Channels

Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter

with current balancing function to drive LED light-bar.

Note (3) P

= IL ×VL (Without LED converter transfer efficiency)

L

Note (4) The lifetime of LED is defined as the time when it continues to operate under the cond itions at Ta =

o

25 ±2

C and IL = 23 mA(Per EA) until the brightness becomes 50% of its original value.≦

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PRODUCT SPECIFICATION

|

|

4.4 LVDS INPUT SIGNAL TIMING SPECIFICATIONS

4.4.1 LVDS DC SPECIFICATIONS

Parameter Symbol

Min. Typ. Max.

LVDS Differential Input High Threshold V
LVDS Differential Input Low Threshold V
LVDS Common Mode Voltage VCM (1.125) - (1.375) V (1)
LVDS Differential Input Voltage |VID| (100) - (600) mV (1)
L VDS Terminating Resistor RT (100) Ohm -

Note (1) The parameters of LVDS signal s are defined as the following figures.

Single Ended

V

0V

CM

TH(LVDS)

(-100) - - mV

TL(LVDS)

- - (+100) mV

Value

Unit Note

V
V

VID|

(1),

=1.2V

CM

(1)

=1.2V

CM

Differential

4.4.2 LVDS DATA FORMAT

CLK+

Rxin2

Rxin1

Rxin0

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE B5 B4 B3 B2 Vsync Hsync

IN13 IN12 IN11 IN10 IN9 IN8 IN7

B1 G4 G3 G2 G1 B0 G5

IN6

G0 R3 R2 R1 R0

V

0V

V

IN5 IN4 IN3 IN2 IN1 IN0
R5

VID|

R4

Signal for 1 DCLK Cycle (T)

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RXEC+

RXE2+/-

PRODUCT SPECIFICATION

T/7

IN20 IN19 IN18 IN17 IN16 IN15 IN14

DE EB5 EB4 EB3 EB2 Vsync Hsync

RXE1+/-

RXE0+/-

IN13 IN12 IN11 IN10 IN9 IN8 IN7

EB1 EG4 EG3 EG2 EG1 EB0 EG5

IN6

EG0 ER3 ER2 ER1 ER0 ER5 ER4

IN5 IN4 IN3 IN2 IN1 IN0

Signal for 1 DCLK Cycle (T)

4.4.3 COLOR DATA INPUT ASSIGNMENT

The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input

for the color. The higher the binary input the brighter the color. The table below provides the assignment
of color versus data input.

Data Signal

Color

R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green

Basic
Colors

Gray
Scale
Of
Red

Gray
Scale
Of
Green

Gray
Scale
Of
Blue

Note (1) 0: Low Level Voltage, 1: High Level Voltage

Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)

:

:
Red(61)
Red(62)
Red(63)
Green(0)/Dark
Green(1)
Green(2)

:

:
Green(61)
Green(62)
Green(63)
Blue(0)/Dark
Blue(1)
Blue(2)

:

:
Blue(61)
Blue(62)
Blue(63)

0
1
0
0
0
1
1
1
0
0
0

:

:
1
1
1
0
0
0

:

:
0
0
0
0
0
0

:

:
0
0
0

Red Green Blue

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

1

1

1

0

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

0

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

:

:

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:

:

:

:

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:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

1

0

0

0

0

0

0

1

1

1

1

1

1

0

0

1

1

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

0

0

0

:

:

:

:

0

0

0

0

0

0

0

0

0

1

1

0

:

:

:

:

0

1

1

0

1

1

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PRODUCT SPECIFICATION

4.5 DISPLAY TIMING SPECIFICATIONS

The input signal timing specifications are shown as the following table and timing diagram.

Signal Item Symbol Min. Typ. Max. Unit Note

DCLK Frequency 1/Tc TBD (97.79) TBD MHz -

Vertical Total Time TV TBD (926) TBD TH -

Vertical Active Display Period TVD (900) (900) (900) TH -

DE

Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.

DE

DCLK

DE

Vertical Active Blanking Period TVB TV-TVD (26) TV-TVD TH -

Horizontal Total Time TH TBD (1760) TBD Tc -

Horizontal Active Display Period THD (1600) (1600) (1600) Tc -

Horizontal Active Blanking Period THB

INPUT SIGNAL TIMING DIAGRAM

TC

TH-THD

T

HD

(160)

TH-THD

Tc -

DATA

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PRODUCT SPECIFICATION

4.6 POWER ON/OFF SEQUENCE

The power sequence specifications are shown as the following table and diagram.

Symbol

Min. Typ. Max.
t1 (0.5) - (10) ms
t2 (0) - (50) ms
t3 (0) - (50) ms
t4 (500) - - ms
t5 (200) - - ms
t6 (200) - - ms
t7 (0.5) - (10) ms
tA (0.5) - (10) ms
tB (0) (10) ms
tC (10) - - ms
tD (10) - - ms
tE (10) - - ms

tF (10) - - ms

Value

Unit Note

- Power Supply
for LCD, VCCS

- Interface Signal

(LVDS Signal of
Transmitter), VI

- Power Supply for
LED Converter,
LED_VCCS

- LED Converter
Dimming Signal,
LED_PWM

- LED Converter
Enable Signal,
LED_EN

0V

0V

0V

0V

0V

Power On

90%

10%

Power Off

t1

t2

Valid Data

t6 t5

90%

10%

tA

tC

PWM Signal

tE t

90%

tB

t

D

F

90%

10%

t3

t7

10%

10%

t4

Note (1) Please don’t plug or unplug the interface cabl e when system is turned on.

Note (2) Please avoid floating state of the interface signal during signal invalid period.

Note (3) It is recommended that the backlight power must be turned on after the power supply for LCD and the

interface signal is valid.

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PRODUCT SPECIFICATION

θ

y

90

θ

y

90

θx− θx+

y

θ

θ

y

5. OPTICAL CHARACTERISTICS

5.1 TEST CONDITIONS

Item Symbol Value Unit
Ambient Temperature T a
Ambient Humidity Ha

25±2

50±10
Supply Volt age VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Light Bar Input Current IL

(115)

The measurement methods of optical characteristics are shown in Section 5.2. The following items
should be measured under the test conditions described in Section 5.1 and stable environment shown in
Note (5).

5.2 OPTICAL SPECIFICATIONS

Item Symbol Condition Min. Typ. Max. Unit Note

Contrast Ratio CR 500 650 - -

Response Time

Average Luminance of White

Red

Color
Chromaticity

Green

Blue

White

Horizontal

Viewing Angle

Vertical

White Variation of 5 Points

Note (1) Definition of Viewin g Angle (θx, θy):

θX- = 90º

TR - (3) (8) ms
T

- (7) (12) ms

F

L

AVE

Rx
Ry
Gx
Gy
Bx
By

=0°, θY =0°

θ

x

Viewing Normal Angle

255 300 - cd/m

(0.580)
(0.340)
(0.325)

Typ –

0.03

(0.565)
(0.159)

Typ +

0.03

(0.145)
Wx 0.313 ­Wy

θ

θ

θ

θ

δW

+

x

-

x

+

Y

-

Y

5p

CR≥10

θ

=0°, θY =0°

x

40 45
40 45 ­15 20 ­40 45 -

80 - - %

0.329

Normal

x =

= 0º

θy- θy+

x-

12 o’clock direction

+

+ =

º

o

C

%RH

mA

-

-

-

-

-

-

-

Deg.

2

(2),

(5),(7)
(3),(7)

(4),

(6),(7)

(1),(7)

(1),(5),

(7)

(5),(6),

(7)

6 o’clock

- =

y-

x+

θX+ = 90º

º

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Note (2) Definition of Contrast Ratio (CR):

The contrast ratio can be calculated by the following expression.

Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (1)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).

PRODUCT SPECIFICATION

Note (3) Definition of Response Time (T

R

100%

90%

Optical

Response

10%

0%

T

R

66.67 ms

Note (4) Definition of Average Luminan ce of White (L

Measure the luminance of White at 5 points

L

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

AVE

L (x) is corresponding to the luminance of the point X at Figure in Note (6)

, TF):

AVE

):

T

F

66.67 ms

Time

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Note (5) Measurement Setup:

(

A

)

The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.

LCD M odule

LCD P anel

USB2000

or equivalent

PRODUCT SPECIFICATION

CS-2000T

or equivalent

Center of the Screen

500 mm

Light Shield Room

mbient L uminance < 2 l u x

Note (6) Definition of White Variation (δW):
Measure the luminance of White at 5 points

= {Minimum [L (1)~L (5)] / Maximum [L (1)~ L (5)]}*100%

δW

5p

10mm

6

H/4

2

H

9

45

7

3

1

8

X

: Test Point

10

X=1 to 13

H/4 H/4 H/4

10mm

11

10mm 10mm

W/4 W/4 W/4 W/4

12

W

13

Active area

Note (7) The listed optical specifications refer to the initial value of manufacture, but the condition of

the specifications after long-term operation will not be warranted.

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PRODUCT SPECIFICATION

6. RELIABILITY TEST ITEM

Test Item Test Condition Note
High Temperature S t orage Test 60ºC, 240 hours
Low Temperature Storage Test -20ºC, 240 hours
Thermal Shock Storage Test

-20ºC, 0.5hour←→60℃, 0.5hour; 100cycles, 1hour/cycle
High Temperature Operation Test 50ºC, 240 hours
Low Temperature Operation Test 0ºC, 240 hours

High Temperature & High Humidity
Operation Test

ESD Test (Operation)

Shock (Non-Operating)

Vibration (Non-Operating)

Note (1) criteria : Normal display image with no obvious non-uniformity and no line defect.
Note (2) Evaluation should be tested after storage at room temperature for more than two hour
Note (3) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough

so that the module would not be twisted or bent by the fixture.

50°C, 80% RH, 240 hours

150pF, 330Ω, 1sec/cycle
Condition 1 : Contact Discharge, ±8KV
Condition 2 : Air Discharge, ±15KV

220G, 2ms, half sine wave,1 time for each direction of
±X,±Y,±Z

1.5G / 10-500 Hz, Sine wave, 30 min/cycle, 1cycle for each

X, Y, Z

(1) (2)

(1)

(1)(3)

(1)(3)

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PRODUCT SPECIFICATION

7. PACKING

7.1 MODULE LABEL

The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.

(a) Model Name: N140FGE - LA2
(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X

(d) Production Location: MADE IN XXXX.
(e) UL/CB logo: XXXX is UL factory ID.
Serial ID includes the information as below:

(a) Manufactured Date: Year: 0~9, for 2010~2019

Day: 1~9, A~Y, for 1

(b) Revision Code: cover all the change

X X X X X Y M D L N N N N

Month: 1~9, A~C, for Jan. ~ De c.

Serial No.
Product Line

Year, Month, Date

CMI Internal Use

Revision

CMI Internal Use

st

to 31st, exclude I , O and U

(c) Serial No.: Manufacturing sequence of product
(d) Product Line: 1 -> Line1, 2 -> Line 2, …etc.

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7.2 CARTON

PRODUCT SPECIFICATION

Figure. 7-2 Packing method

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7.3 PALLET

PRODUCT SPECIFICATION

Figure. 7-3 Packing method

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PRODUCT SPECIFICATION

8. PRECAUTIONS

8.1 HANDLING PRECAUTIONS

(1) The module should be assembled into the system firmly by using every mounting hole. Be careful

not to twist or bend the module.

(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause

electrical short or damage the polarizer.

(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and

assembly process.

(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer

is very soft and easily scratched.

(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not

use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It
might permanently damage the polarizer due to chemical reaction.

(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel

for a long time.

(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In

case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the LED wire.
(11) Pins of I/F connector should not be touched directly with bare hands.

8.2 STORAGE PRECAUTIONS

(1) High temperature or humidity may reduce the performance of module. Please store LCD module

within the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may

damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the

response time will become slowly, and the starting voltage of LED will be higher than the room

temperature.

8.3 OPERATION PRECAUTIONS

(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating.

This can prevent the CMIS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while

assembling with converter . Do not disassemble the module or insert anything into the Backlight unit.

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PRODUCT SPECIFICATION

Appendix. EDID DATA STRUCTURE

The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.

Byte #

(decimal)

10
11
12
13
14
15
16

17
18

19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

0
1
2
3
4
5
6
7
8
9

Byte #

(hex)

0 Header , Fixed 00 00000000
1 Header , Fixed FF 11111111
2 Header , Fixed FF 11111111
3 Header , Fixed FF 11111111
4 Header , Fixed FF 11111111
5 Header , Fixed FF 11111111
6 Header , Fixed FF 11111111
7 Header , Fixed 00 00000000
8 ID system manufacturer name 0D 00001101

9 ID system manufacturer name AE 10101110
0A ID system Product Code (LSB) 81 10000001
0B ID system Product Code (MSB) 14 00010100
0C 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
0D 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
0E 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000
0F 32-bit serial # Unused(01h for VESA, 00h for SPWG) 00 00000000

10 Week of manufacture 1 - 53 (unused: 00h) : 10h fixed by CMO 1E 00011110
11 Year of manufacture year - 1990(unsed:00h) : 14h (Year 2010) fixed

by CMO

12 Version=1 01 00000001
13 Revision=4 04 00000100
14 Vedio Input Definition 90 10010000
15 Active area horizontal 31cm 1F 00011111
16 Active area vertical 17cm 11 00010001
17 Display Gamma (Gamma = "2.2") 78 01111000
18 Feature support 02 00000010

19 Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0 58 01011000
1A Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0 7C 01111100
1B Rx=0.313 50 01010000
1C Ry=0.329 54 01010100
1D Gx=0.58 94 10010100
1E Gy=0.34 57 01010111
1F Bx=0.325 53 01010011

20 By=0.565 90 10010000

21 Wx=0.159 28 00101000

22 Wy=0.145 25 00100101

23 Established timings 1 00 00000000

24 Established timings 2 00 00000000

25 No manufacturer's specific timing 00 00000000

26 Standard timing ID # 1 01 00000001

27 Standard timing ID # 1 01 00000001

28 Standard timing ID # 2 01 00000001

Field Name and Comments

Value

(hex)

16 00010110

Value

(binary)

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PRODUCT SPECIFICATION

41
42
43

44
45
46
47
48
49
50
51
52
53

54
55

56
57
58
59
60
61
62
63
64

65
66

67
68
69
70

71
72

73
74
75
76
77
78
79
80
81
82

83
84

29 Standard timing ID # 2 01 00000001
2A Standard timing ID # 3 01 00000001

2B Standard timing ID # 3 01 00000001
2C Standard timing ID # 4 01 00000001
2D Standard timing ID # 4 01 00000001
2E Standard timing ID # 5 01 00000001
2F Standard timing ID # 5 01 00000001

30 Standard timing ID # 6 01 00000001

31 Standard timing ID # 6 01 00000001

32 Standard timing ID # 7 01 00000001

33 Standard timing ID # 7 01 00000001

34 Standard timing ID # 8 01 00000001

35 Standard timing ID # 8 01 00000001

36 Detailed timing description # 1 Pixel clock ( "97.79"MHz, According to

VESA CVT Rev1.4 )

37 # 1 97.79MHz/10000 =9779=2633(Hex) 26 00100110

38 # 1 H active ("1600") 40 01000000

39 # 1 H blank ("160") A0 10100000
3A # 1 H active : H blank ("1600 : 160") 60 01100000
3B # 1 V active ("900") 84 10000100
3C # 1 V blank ("26") 1A 00011010
3D # 1 V active : V blank ("900 : 26") 30 00110000
3E # 1 H sync offset ("48") 30 00110000
3F # 1 H sync pulse width ("32") 20 00100000

40 # 1 V sync offset : V sync pulse width ("3 : 5") 35 00110101

41 # 1 H sync offset : H sync pulse width : V sync offset : V sync width

("48 : 32 : 3 : 5")

42 # 1 H image size ("310 mm") 36 00110110

43 # 1 V image size ("174 mm") AE 10101110

44 # 1 H image size : V image size ("310 : 174") 10 00010000

45 # 1 H boarder ("0") 00 00000000

46 # 1 V boarder ("0") 00 00000000

47 Non-interlaced, Normal Display, Digital separate, Positive Hsync,

Negative Vsync

48 Detailed timing description # 2 Pixel clock ( "65.2"MHz, According to

VESA CVT Rev1.4 )

49 # 2 65.2MHz/10000 =6520=1978(Hex) 19 00011001
4A # 2 H active ("1600") 40 01000000
4B # 2 H blank ("160") A0 10100000
4C # 2 H active : H blank ("1600 : 160") 60 01100000
4D # 2 V active ("900") 84 10000100
4E # 2 V blank ("26") 1A 00011010
4F # 2 V active : V blank ("900 : 26") 30 00110000

50 # 2 H sync offset ("48") 30 00110000

51 # 2 H sync pulse width ("32") 20 00100000

52 # 2 V sync offset : V sync pulse width ("3 : 5") 35 00110101

53 # 2 H sync offset : H sync pulse width : V sync offset : V sync width

("48 : 32 : 3 : 5")

54 # 2 H image size ("310 mm") 36 00110110

33

00 00000000

1A 00011010
78 01111000

00 00000000

00110011

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PRODUCT SPECIFICATION

85
86

87
88

89
90

91
92
93
94
95
96
97
98

99
100
101
102
103
104
105
106

107
108

109
110
111
112
113
114
115
116
117
118
119
120
121
122

123
124
125

126
127

55 # 2 V image size ("174 mm") AE 10101110
56 # 2 H image size : V image size ("310 : 174") 10 00010000
57 # 2 H boarder ("0") 00 00000000

58 # 2 V boarder ("0") 00 00000000
59 Non-interlaced, Normal Display, Digital separate, Positive Hsync,

Negative Vsync

5A Flag 00 00000000
5B Flag 00 00000000
5C Flag 00 00000000
5D Data Type Tag: Alphanumeric Data String (ASCII) FE 11111110
5E Flag 00 00000000
5F Dell P/N 1st Character"5" 35 00110101

60 Dell P/N 2nd Character"C" 43 01000011
61 Dell P/N 3rd Character"J" 4A 01001010
62 Dell P/N 4th Character"8" 38 00111000
63 Dell P/N 5th Character"2" 32 00110010
64 EDID Revision 00 00000000
65 Manufacturer P/N"1" 31 00110001
66 Manufacturer P/N"4" 34 00110100
67 Manufacturer P/N"0" 30 00110000
68 Manufacturer P/N"F" 46 01000110

69 Manufacturer P/N"G" 47 01000111
6A Manufacturer P/N"E" 45 01000101
6B Manufacturer P/N (If <13 char, then terminate with ASCII code 0Ah,

set remaining char = 20h)

6C Flag 00 00000000
6D Flag 00 00000000
6E Flag 00 00000000
6F Data Type Tag: Manufacturer Specified Data 00 00 00000000

70 Flag 00 00000000

71 Color Management 00 00000000

72 Panel Type and Revision 41 01000001

73 Frame Rate 31 00110001

74 Light Controller Interface and Maximum Luminance 9E 10011110

75 Front Surface / Polarizer and Pixel Structure 00 00000000

76 Multi-Media Features 10 00010000

77 Multi-Media Features 00 00000000

78 Special Features 00 00000000

79 Special Features 02 00000010
7A Special Features 01 00000001
7B (If <13 char, then terminate with ASCII code 0Ah, set remaining char =

20h)

7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char =

20h)

7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char =

20h)

7E No extension 00 00000000
7F Checksum 6C 01101100

1A 00011010

0A 00001010

0A 00001010
20 00100000
20 00100000

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Appendix. OUTLINE DRAWING

PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

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PRODUCT SPECIFICATION

Appendix. SYSTEM COVER DESIGN NOTICE

1. Design gap A between panel & any components on system cover

a). Sufficient gap between panel & system is a must for preventing from backpack or pogo
test fail.

Definition

2 Design gap B1 & B2 between panel & protrusions

b). Zero gap from panel's maximum thickness boundary to any component s, foreign objects,
wire, cable or extrusion on system cover inner surface is forbidden.

2.0mm min. gap is recommended between panel & protrusions for preventing from shock

Definition

3 Design gap C between system front bezel & panel surface.

related failures.

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PRODUCT SPECIFICATION

C

LCD

Backlight

Panel Backcover

a). Sufficient gap between system front bezel & panel surface is a must for preventing from
pooling or glass broken.

Definition

4 Design gap D1 & D2 between system front bezel & PCB Assembly.

b). Zero gap or interference is forbidden.

System

front bezel

a). Sufficient gap between system front bezel & PCB assembly is a must for preventing from
abnormal display after backpack test, hinge test, twist test or pogo test.

Definition

5 Interference examination of antenna cable and WebCam wire

Definition

6 System inner surface examination

b). Zero gap or interference is forbidden.

WebCam Wire

a). Antenna cable or WebCam wire overlap with panel outline is forbidden for preventing
from abnormal display & white spot after backpack test, hinge test, twist test or pogo test.

b). Antenna cable or WebCam wire bypass panel outline is recommende d.

WebCam Wire

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PRODUCT SPECIFICATION

Definition a). Burr at logo edge, step, protrusion or PCB board will easily cause white spot or glass

broken.
b). Keeping flat surface underneath backlight is recommended.

7 Tape/sponge design on system inner su rface

Definition a) To prevent abnormal display & white spot after scuffing test, hinge test, pogo test,

backpack test, it is not recommended to add tape/sponge in separate location. Since each
tape/sponge may act as pressure concentration location.

b) We suggest to design a tape/sponge that well covered under panel rear cover.

8 Assembly SOP examination

Definition To prevent panel crack during system front bezel assembly process with hook design, it is

prohibited to press panel or any location that related directly to the panel.

9 Material used for system rear bezel

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PRODUCT SPECIFICATION

Definition To prevent panel crack during system front bezel assembly process without hook design, it

is only allowed to give slight pressure with large contact area. This can help to distribute the
stress to prevent point concentration, also it is suggest to put the system on a flat surface
stage during the assembly.

10 Material used for system rear bezel

Definition a) To prevent abnormal display & white spot after scuffing test, hinge test, pogo test,

backpack test, as the poor rigidity result from deformation of system rear cover during the
test.

b) We suggest to use aluminum-magnesium alloy as the rear frame material with thickness
min 1.5mm, instead of using PC/ABS.

11 System base unit design near keyboard and mouse pad

Definition To prevent abnormal display & white spot after scuffing test, hinge test, pogo test, backpack

test, no sharp edge design is allowed in any area that may damage the panel during the
test. We suggest to remove all sharp edges, or to reduce the thickness difference of
keyboard/mouse pad from the nearby surface.

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