Appendix. SYSTEM COVER DESIGN GUIDANCE.....................................................................................33
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PRODUCT SPECIFICATION
REVISION HISTORY
Version
0.0 Mar.13, 2013 All Tentative spec Ver. 0.0 was first issued.
Date Page Description
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PRODUCT SPECIFICATION
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N133BGE-E31 is a 13.3” (13.3” diagonal) TFT Liquid Crystal Display module with LED Backlight unit
and 30 pins eDP interface. This module supports 1366 x 768 HD mode and can display 262,144 colors.
The optimum viewing angle is at 6 o’clock direction.
1.2 GENERAL SPECIFICATI0NS
Item Specification Unit Note
Screen Size 13.3 diagonal
Driver Element a-si TFT active matrix - Pixel Number 1366 x R.G.B. x 768 pixel Pixel Pitch 0.2148 (H) x 0.2148 (V) mm Pixel Arrangement RGB vertical stripe - Display Colors 262,144 color Transmissive Mode Normally white - Surface Treatment Hard coating (3H), Anti - Glare - Luminance, White 200 Cd/m2
Power Consumption Total (2.95W) (Max.) @ cell (0.75W) (Max.), BL (2.2W) (Max.)
Backlight Unit LEDs X 9 strings X 3 pallel
Power Consumption 3.0 typ./ 3.2 max @ Black Pattern Watt
RoHs Compliance yes
Note (1) The specified power consumption is under the conditions at VCCS = 3.3 V, Ta = 25 ± 2 ºC,
(1)
LED_VCCS = Typ, fPWM = 200 Hz, Duty=100% and fv = 60 Hz, whereas mosaic pattern is displayed.
2. MECHANICAL SPECIFICATIONS
Item Min. Typ. Max. Unit Note
Horizontal (H) 306.8 306.3 305.8 mm
Module Size
Bezel Area
Active Area
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
Vertical (V) 177.2 177.7 178.2 mm
Thickness (T) - 3.3 3.6 mm
Horizontal 296.816 mm
Vertical 168.366 mm
Horizontal 293.3168 293.4168 293.5168 mm
Vertical 164.8664 164.9664 165.764 mm
Weight - 265 280 g
(1)
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2.1 CONNECTOR TYPE
Pin1 Pin30
PRODUCT SPECIFICATION
Please refer Appendix Outline Drawing for detail design.
Connector Part No. : I-PEX 20455-030E-12
User’s connector Part No. : IPEX-20453-030T-01
3. ABSOLUTE MAXIMUM RATINGS
3.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Min. Max.
Storage Temperature TST -20 +60 ºC (1)
Operating Ambient Temperature TOP 0 +50 ºC (1), (2)
Note (1) (a) 90 %RH Max. (Ta <= 40 ºC).
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
Value
Unit Note
(c) No condensation.
Note (2) The temperature of panel surface should be 0 ºC min. and 60 ºC max.
Relative Humidity (%RH)
100
90
80
60
Operating
40
20
10
Storage Range
Temperature (ºC)
80 60 -20 40 0 20 -40
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PRODUCT SPECIFICATION
3.2 ELECTRICAL ABSOLUTE RATINGS
3.2.1 TFT LCD MODULE
Item Symbol
Power Supply Voltage VCCS (-0.3) (+4.0) V
Logic Input Voltage VIN -0.3 VCCS+0.3
Converter Input Voltage
Converter Control Signal Voltage
Converter Control Signal Voltage
Note (1) Stresses beyond those listed in above “ELECTRICAL ABSOLUTE RATINGS” may cause
permanent damage to the device. Normal operation should be restricted to the conditions
described in “ELECTRICAL CHARACTERISTICS”.
LED_VCCS
LED_PWM,
LED_EN
Value
Min. Max.
(-0.3) (26) V
(-0.3) (5) V
(-0.3) (5) V
Unit Note
(1)
V
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4. ELECTRICAL SPECIFICATIONS
SCAN DRIVER IC
DC/DC CONVERTER &
INPUT CONNECTOR
EDID
EEPROM
4.1 FUNCTION BLOCK DIAGRAM
Display port
Signals
VCCS
GND
PRODUCT SPECIFICATION
DP INPUT/ TIMING
CONTROLLER
TFT LCD
PANEL
Converter
Input Signals
REFERENCE VOLTAGE
GENERATOR
LED
CONVERTER
DATA
BACKLIGHT
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4.2. INTERFACE CONNECTIONS
Pin Symbol Description Remark
1 NC No Connection (Reserved)
2 H_GND High Speed Ground
3 NC No Connection (Reserved)
4 NC No Connection (Reserved)
5 H_GND High Speed Ground
6 ML0- Complement Signal-Lane 0
7 ML0+ True Signal-Main Lane 0
8 H_GND High Speed Ground
9 AUX+ True Signal-Auxiliary Channel
10 AUX- Complement Signal-Auxiliary Channel
11 H_GND High Speed Ground
12 VCCS Power Supply +3.3 V (typical)
13 VCCS Power Supply +3.3 V (typical)
14 NC No Connection (Reserved for CMI test)
15 GND Ground
16 GND Ground
17 HPD Hot Plug Detect
18 BL_GND BL Ground
19 BL_GND BL Ground
20 BL_GND BL Ground
21 BL_GND BL Ground
22 LED_EN BL_Enable Signal of LED Converter
23 LED_PWM
24 NC No Connection
25 NC No Connection
26 LED_VCCS BL Power
27 LED_VCCS BL Power
28 LED_VCCS BL Power
29 LED_VCCS BL Power
30 NC No Connection (Reserved)
PWM Dimming Control Signal of LED
Converter
PRODUCT SPECIFICATION
Note (1) The first pixel is odd as shown in the following figure.
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PRODUCT SPECIFICATION
Pitch
1,1
(odd)
2,1
3,1
1,2
(even)
2,2
1,3
(odd)
1,4
(even)
Pitch
1,Xmax
Ymax,1
Ymax,
Xmax
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PRODUCT SPECIFICATION
4.3.1 LCD ELETRONICS SPECIFICATION
Parameter Symbol
Min. Typ. Max.
Power Supply Voltage VCCS 3.0 3.3 3.6 V (1)Ripple Voltage VRP - 50 - mV (1)-
Value
Unit Note
Inrush Current I
- - 1.5 A (1),(2)
RUSH
Mosaic (190) (227) mA (3)a
Power Supply Current
Black
Icc
(210) (230) mA (3)
Note (1) The ambient temperature is Ta = 25 ± 2 ºC.
Note (2) I
: the maximum current when VCCS is rising
RUSH
IIS: the maximum current of the first 100ms after power-on
Measurement Conditions: Shown as the following figure. Test pattern: black.
+3.3V
Q1 2SK1475
VR1
R1
47K
47K
R2
1K
0.01uF
Q2
2SK1470
C2
(High to Low)
(Control Signal)
SW
+12V
C1
1uF
FUSE
C3
1uF
VCCS
(LCD Module Input)
VCCS rising time is 0.5ms
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Page 11
PRODUCT SPECIFICATION
Note (3) The specified power supply current is under the conditions at VCCS = 3.3 V, Ta = 25 ± 2 ºC, DC
Current and f
a. Mosaic Pattern
= 60 Hz, whereas a power dissipation check pattern below is displayed
v
Active Area
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PWM Control Permissive Ripple
C2
4.3.2 LED CONVERTER SPECIFICATION
Parameter Symbol
PRODUCT SPECIFICATION
Value
Unit Note
Min. Typ. Max.
Converter Input power supply voltage
Converter Inrush Current
LED_Vccs
ILED
RUSH
(5.0) (12.0) (21.0) V
- - (1.5) A (1)
Backlight On (2.2) - (5.0) V
EN Control Level
Backlight Off
PWM High Level
PWM Control Level
PWM Low Level
0 - (0.6) V
(2.2) - (5.0) V
0 - (0.6) V
PWM Control Duty Ratio (5) - (100) %
Voltage
PWM Control Frequency f
LED Power Current LED_VCCS =Typ.
Note (1) ILED
: the maximum current when LED_VCCS is rising,
RUSH
190 - 2K Hz (2)
PWM
ILED (145) (174) (184) mA (3)
- - 100 mV
V
PWM_pp
ILEDIS: the maximum current of the first 100ms after power-on,
Measurement Conditions: Shown as the following figure. LED_VCCS = Typ, Ta = 25 ± 2 ºC, f
= 200 Hz, Duty=100%.
LED_VCCS(Typ)
Q1 IRL3303
(High to Low)
(Control Signal)
SW=24V
LED_VCCS(Typ)
C1
1uF
R1
47K
R2
1K
Q2
IRL3303
47K
VR1
0.01uF
FUSE
C3
1uF
(LED Converter Input)
PWM
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Page 13
PRODUCT SPECIFICATION
≤∗+
∗+≤
≥
LED_VCC
LED_PWM
LED_EN
ILED
0V
0V
0V
ILED
VLED rising time is 0.5ms
0.5ms
90%
10%
Rush
100ms
ILED
IS
Note (2) If PWM control frequency is applied in the range less than 1KHz, the “waterfall” phenomenon on
the screen may be found. To avoid the issue, it’s a suggestion that PWM control frequency should
follow the criterion as below.
PWM control frequency f
fN)33.0(
N
: Integer
f
: Frame rate
Note (3) The specified LED power supply current is under the conditions at “LED_VCCS = Typ.”, Ta =
25 ± 2 ºC, f
= 200 Hz, Duty=100%.
PWM
should be in the range
PWM
f
PWM
)3(
N
fN
)66.0(
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PRODUCT SPECIFICATION
4.3.3
Note (1) LED current is measured by utilizing a high frequency current meter as shown below :
BACKLIGHT UNIT
Parameter Symbol
LED Light Bar Power
Supply Voltage
LED Light Bar Power
Supply Current
Power Consumption PL - 1.7388 1.8630 W (3)
LED Life Time LBL 15,000 - - Hrs (4)
VL 23.4 25.2 27 V
IL 69
V
Light Bar Feedback
Channels
Ta = 25 ± 2 ºC
Value
Min. Typ. Max.
L, IL
LED
Light Bar
Unit Note
(1)(2)(Duty100%)
Note (2) For better LED light bar driving quality, it is recommended to utilize the adaptive boost converter with
current balancing function to drive LED light-bar.
Note (3) PL = IL ×VL, Converter efficiency 85%(typ).
Note (4) The lifetime of LED is defined as the time when it continues to operate under the conditions at Ta = 25 ±2
o
C and IL = 23 mA(Per EA) until the brightness becomes 50% of its original value.≦
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PRODUCT SPECIFICATION
0V
VCM
|VID|
4.4 LVDS INPUT SIGNAL TIMING SPECIFICATIONS
4.4.1 LVDS DC SPECIFICATIONS
Parameter Symbol Min. Typ. Max. Unit Notes
Differential Signal Common Mode
Voltage(MainLink and AUX)
AUX AC Coupling Capacitor C
Note (1) Display port interface related AC coupled signals should follow VESA DisplayPort Standard
Version1. Revision 1a and VESA Embedded DisplayPortTM Standard Version 1.1.
(2) The AUX AC Coupling Capacitor should be placed on Source Devices.
(3)The source device should pass the test criteria described in DisplayPortCompliance Test
Specification (CTS) 1.1
VCM 0 2 V (1)(3)
75 200 nF (2)
AUX
VD+
Single Ended
VD-
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PRODUCT SPECIFICATION
4.4.2 COLOR DATA INPUT ASSIGNMENT
The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input
for the color. The higher the binary input the brighter the color. The table below provides the assignment
of color versus data input.
Data Signal
Color
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red
Green
Basic
Colors
Gray
Scale
Of
Red
Gray
Scale
Of
Green
Gray
Scale
Of
Blue
Note (1) 0: Low Level Voltage, 1: High Level Voltage
Blue
Cyan
Magenta
Yellow
White
Red(0)/Dark
Red(1)
Red(2)
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PRODUCT SPECIFICATION
4.5 DISPLAY TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Signal Item Symbol Min. Typ. Max.
DCLK Frequency 1/Tc TBD (76.42) TBD MHz -
Vertical Total Time TV TBD (800) TBD TH -
Vertical Active Display Period TVD 768 (768) TBD TH -
DE
Note (1) Because this module is operated by DE only mode, Hsync and Vsync are ignored.
DE
Vertical Active Blanking Period TVB TV-TVD (32) TV-TVD TH -
Horizontal Total Time TH TBD (1592) TBD Tc -
Horizontal Active Display Period THD TBD (1366) TBD Tc -
Horizontal Active Blanking Period THB
INPUT SIGNAL TIMING DIAGRAM
TH-THD
(226)
TH-THD
Unit Note
Tc -
DCLK
DE
DATA
TC
THD
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PRODUCT SPECIFICATION
10%
t6
-
-
-
4.6 POWER ON/OFF SEQUENCE
The power sequence specifications are shown as the following table and diagram.
-Power Supply
for LCD, VCCS
-eDP Display
-HPD from Sink
-AUX Channel
-Main Link Data
0V
0V
Power On
90%
10%
t1
Power Off
t11
90%
t2
Black Video
t3
AUX Channel Operational
t4
Link
Training
t7
Idle
Video from Source
Valid Video Data
t10
Black Video
Idle or off
Restart
10%
t12
Power Supply for
LED Converter,
LED_VCCS
LED Converter
Dimming Signal,
LED_PWM
LED Converter
Enable Signal,
LED_EN
0V
0V
0V
10%
t5
90%
t8
t
A
t
C
t
E
t9
90%
10%
t
B
t
D
t
F
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PRODUCT SPECIFICATION
Timing Specifications:
Parameter
t1 Power rail rise time, 10% to 90%
t2
t3
t4
t5 Link training duration Source
t6 Link idle Source
t7
t8
t9
t10
t11
t12 VCCS Power off time Source
tA
tB
tC
tD
tE
tF
Note (1) Please don’t plug or unplug the interface cable when system is turned on.
Delay from LCD,VCCS to black
video generation
Delay from LCD,VCCS to HPD
high
Delay from HPD high to link
training initialization
Delay from valid video data from
Source to video on display
Delay from valid video data from
Source to backlight on
Delay from backlight off to end of
valid video data
Delay from end of valid video data
from Source to power off
VCCS power rail fall time, 90% to
10%
LED power rail rise time, 10% to
90%
LED power rail fall time, 90% to
10%
Delay from LED power rising to
LED dimming signal
Delay from LED dimming signal to
LED power falling
Delay from LED dimming signal to
LED enable signal
Delay from LED enable signal to
LED dimming signal
Description
Reqd.
By
Source (0.5) (10) ms -
Sink (0) (200)
Sink (0) (200)
Source - - ms
Sink (0) (50) ms
Source
Source - - ms
Source (0) (500)
Source (0.5) (10) ms
Source (0.5) (10) ms
Source (0) (10) ms
Source (1) - ms
Source (1) - ms
Source (1) - ms Source (1) - ms -
Value
Min Max
- - ms
- - ms
- - ms
(500) - ms
Unit Notes
Prevents display
noise until valid
ms
ms
ms
video data is
received from the
Source
Sink Aux Channel
must be
operational upon
HPD high
Allows for Source
to read Link
capability and
initialize
Dependant on
Source link
training protocol
Min accounts for
required BS-Idle
pattern. Max
allows for Source
frame
synchronization
Max allows Sink
validate video
data and timing
Source must
assure display
video is stable
Source must
assure backlight is
no longer
illuminated
-
-
-
-
-
-
-
Note (2) Please avoid floating state of the interface signal during signal invalid period.
Note (3) It is recommended that the backlight power must be turned on after the power supply for LCD and the
interface signal is valid.
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PRODUCT SPECIFICATION
5. OPTICAL CHARACTERISTICS
5.1 TEST CONDITIONS
Item Symbol Value Unit
Ambient Temperature Ta
Ambient Humidity Ha
25±2
50±10
Supply Voltage VCC 3.3 V
Input Signal According to typical value in "3. ELECTRICAL CHARACTERISTICS"
LED Light Bar Input Current IL 69 mA
The measurement methods of optical characteristics are shown in Section 5.2. The following items
should be measured under the test conditions described in Section 5.1 and stable environment shown in
Note (5).
5.2 OPTICAL SPECIFICATIONS
Item Symbol
Contrast Ratio CR 250 400 - - (2),(5),(7)
Response Time
Average Luminance of White
Red
Color
Chromaticity
Green
Blue
White
Horizontal
Viewing Angle
Vertical
TR - 8 12 ms
TF - 8 13 ms
L
AVE
Rx
Ry
Gx
Gy
Bx
By
Wx 0.313
Wy
θ
+
x
θ
-
x
θ
+
Y
θ
-
Y
White Variation of 5 Points δW5p θx=0°, θY =0°
Note (1) Definition of Viewing Angle (_x, _y):
Condition Min. Typ. Max. Unit
170 200 - cd/m
0.595
θ
=0°, θY =0°
x
Viewing Normal Angle
Typ –
0.03
0.345
0.320
0.565
0.155
0.130
0.329
40 45
CR≥10
40 45 15 20 40 45 70 - - % (5),(6),(7)
Typ +
0.03
o
C
%RH
-
-
-
-
-
-
-
-
Deg. (1),(5),(7)
2
(4),(6),(7)
Note
(3),(7)
(1),(7)
Normal
θx = θy = 0º
θy-θ
y+
θ
X-
= 90º
x-
y+
θx−
θx+
12 o’clock direction
θ
y+
= 90º
Note (2) DefinitionofContrastRatio (CR):
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6 o’clock
θ
y-
= 90º
y-
x+
θ
X+
= 90º
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PRODUCT SPECIFICATION
T
ime
66.67 ms
66.67 ms
The contrast ratio can be calculated by the following expression.
Contrast Ratio (CR) = L63 / L0
L63: Luminance of gray level 63
L 0: Luminance of gray level 0
CR = CR (1)
CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (6).
Note (3) Definition of Response Time (T
100%
90%
Optical
Response
10%
0%
TR
, TF):
R
TF
Note (4) Definition of Average Luminance of White (L
Measure the luminance of gray level 63 at 5 points
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
AVE
L (x) is corresponding to the luminance of the point X at Figure in Note (6)
Note (5) Measurement Setup:
The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
temperature change during measuring. In order to stabilize the luminance, the measurement
should be executed after lighting Backlight for 20 minutes in a windless room.
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AVE
):
Page 22
PRODUCT SPECIFICATION
Light Shield Room
( Ambient
L
uminance < 2
l u x)
X=1 to 13
X
LCD M odule
LCD P anel
USB2000
or equivalent
CS - 2000T
or equivalent
Center of the S creen
500 mm
Note (6) Definition of White Variation (δW):
Measure the luminance of gray level 63 at 5 points
δW5p = {
Minimum [L (1)~L (5)] / Maximum [L (1)~ L (5)]}*100%
10mm
6
H/4
23
7
8
: Test Point
H
H/4H/4H/4
Note (7) The listed optical specifications refer to the initial value of manufacture, but the condition of
the specifications after long-term operation will not be warranted.
9
45
111213
10mm10mm
10mm
W/4W/4W/4W/4
1
W
10
Active area
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PRODUCT SPECIFICATION
6. RELIABILITY TEST ITEM
Test Item Test Condition Note
High Temperature Storage Test 60ºC, 240 hours
Low Temperature Storage Test -20ºC, 240 hours
Thermal Shock Storage Test -20ºC, 0.5hour←→60, 0.5hour; 100cycles, 1hour/cycle℃
High Temperature Operation Test 50ºC, 240 hours
Low Temperature Operation Test 0ºC, 240 hours
High Temperature & High Humidity
Operation Test
ESD Test (Operation)
Shock (Non-Operating)
Vibration (Non-Operating)
Note (1) criteria : Normal display image with no obvious non-uniformity and no line defect.
Note (2) Evaluation should be tested after storage at room temperature for more than two hour
Note (3) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough
so that the module would not be twisted or bent by the fixture.
220G, 2ms, half sine wave,1 time for each direction of
±X,±Y,±Z
1.5G / 10-500 Hz, Sine wave, 30 min/cycle, 1cycle for each
X, Y, Z
(1) (2)
(1)
(1)(3)
(1)(3)
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PRODUCT SPECIFICATION
7. PACKING
7.1 MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
Rev. XX
(a) Model Name: N133BGE - E31
(b) Revision: Rev. XX, for example: C1, C2 …etc.
(c) Serial ID: X X X X X X X Y M D L N N N N
Serial ID includes the information as below:
(a) Manufactured Date: Year: 0~9, for 2010~2019
Month: 1~9, A~C, for Jan. ~ Dec.
Day: 1~9, A~Y, for 1st to 31st, exclude I , O and U
(b) Revision Code: cover all the change
(c) Serial No.: Manufacturing sequence of product
Serial No.
Product Line
Year, Month, Date
INX Internal Use
Revision
INX Internal Use
(d) Product Line: 1 -> Line1, 2 -> Line 2, etc.
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7.2 CARTON
PRODUCT SPECIFICATION
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7.3 PALLET
PRODUCT SPECIFICATION
Figure. 7-3 Packing
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PRODUCT SPECIFICATION
8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful
not to twist or bend the module.
(2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause
electrical short or damage the polarizer.
(3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and
assembly process.
(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer
is very soft and easily scratched.
(5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not
use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It
might permanently damage the polarizer due to chemical reaction.
(6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel
for a long time.
(7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In
case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap.
(8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC.
(9) Do not disassemble the module.
(10) Do not pull or fold the LED wire.
(11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module
within the specified storage conditions.
(2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may
damage LCD module when it is operating.
(3) It may reduce the display quality if the ambient temperature is lower than 10 ºC. For example, the
response time will become slowly, and the starting voltage of LED will be higher than the room
temperature.
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating.
(2) Always follow the correct power on/off sequence when LCD module is connecting and operating.
This can prevent the CMOS LSI chips from damage during latch-up.
(3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while
assembling with converter. Do not disassemble the module or insert anything into the Backlight unit.
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PRODUCT SPECIFICATION
Appendix. EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the
VESA Plug & Display and FPDI standards.
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PRODUCT SPECIFICATION
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
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72
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74
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76
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85
29 Standard timing ID # 2
2A Standard timing ID # 3
2B Standard timing ID # 3
2C Standard timing ID # 4
2D Standard timing ID # 4
2E Standard timing ID # 5
2F Standard timing ID # 5
30 Standard timing ID # 6
31 Standard timing ID # 6
32 Standard timing ID # 7
33 Standard timing ID # 7
34 Standard timing ID # 8
35 Standard timing ID # 8
Detailed timing description # 1 Pixel clock (“76.42MHz”, According to
36
VESA CVT Rev1.1)
37 # 1 Pixel clock (hex LSB first)
38 # 1 H active (“1366”)
39 # 1 H blank (“226”)
3A # 1 H active : H blank (“1366 : 226”)
3B # 1 V active (”768”)
3C # 1 V blank (”32”)
3D # 1 V active : V blank (”768 :32”)
3E # 1 H sync offset (”68”)
3F # 1 H sync pulse width ("45”)
40 # 1 V sync offset : V sync pulse width (”4 : 7”)
# 1 H sync offset : H sync pulse width : V sync offset : V sync width
41
(”68: 45 : 4 : 7”)
42 # 1 H image size (”293 mm”) 25
43 # 1 V image size (”165 mm”) A5
44 # 1 H image size : V image size (”293 : 165”)
45 # 1 H boarder (”0”)
46 # 1 V boarder (”0”)
# 1 Non-interlaced, Normal, no stereo, Separate sync, H/V pol
47
# 2 FE (hex) defines ASCII string (Model Name “N133BGE-E31”,
ASCII)
4B
4C # 2 Flag
4D # 2 1st character of name (“N”) 4E
4E # 2 2nd character of name (“1”) 31
4F # 2 3rd character of name (“3”) 33
50 # 2 4th character of name (“3”) 33
51 # 2 5th character of name (“B”) 42
52 # 2 6th character of name (“G”) 47
53 # 2 7th character of name (“E”) 45
54 # 2 8th character of name (“-”) 2D
55 # 2 9th character of name (“E”)
56 # 2 10th character of name (“3”)
57 # 2 11th character of name (“1”)
58 # 2 New line character indicates end of ASCII string
59 # 2 Padding with “Blank” character
5A Detailed timing description # 3
5B # 3 Flag
5C # 3 Reserved
5D # 3 FE (hex) defines ASCII string (Vendor “CMN”, ASCII)
5E # 3 Flag
5F # 3 1st character of string (“C”)
60 # 3 2nd character of string (“M”)
61 # 3 3rd character of string (“N”)
62 # 3 New line character indicates end of ASCII string
63 # 3 Padding with “Blank” character
64 # 3 Padding with “Blank” character
65 # 3 Padding with “Blank” character
66 # 3 Padding with “Blank” character
67 # 3 Padding with “Blank” character
68 # 3 Padding with “Blank” character
69 # 3 Padding with “Blank” character
6A # 3 Padding with “Blank” character
6B # 3 Padding with “Blank” character
6C Detailed timing description # 4
6D # 4 Flag
6E # 4 Reserved
# 4 FE (hex) defines ASCII string (Model Name“N133BGE-E31”,
6F
ASCII)
70 # 4 Flag
71 # 4 1st character of name (“N”) 4E
72 # 4 2nd character of name (“1”) 31
73 # 4 3rd character of name (“3”) 33
74 # 4 4th character of name (“3”) 33
75 # 4 5th character of name (“B”) 42
76 # 4 6th character of name (“G”) 47
77 # 4 7th character of name (“E”) 45
78 # 4 8th character of name (“-”) 2D
79 # 4 9th character of name (“E”)
7A # 4 10th character of name (“3”)
7B # 4 11th character of name (“1”)
7C # 4 New line character indicates end of ASCII string
7D # 4 Padding with “Blank” character
7E Extension flag
7F Checksum
33 00110011
31 00110001
0A 00001010
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
43 01000011
4D 01001101
4E 01001110
0A 00001010
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
20 00100000
00 00000000
00 00000000
00 00000000
FE 11111110
00 00000000
01001110
00110001
00110011
00110011
01000010
01000111
01000101
00101101
45 01000101
33 00110011
31 00110001
0A 00001010
20 00100000
00 00000000
A9 10101001
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Appendix. OUTLINE DRAWING
PRODUCT SPECIFICATION
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PRODUCT SPECIFICATION
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PRODUCT SPECIFICATION
Appendix.
0. Permanent deformation of system cover after reliability test
Definition
1. Design gap A between panel & any components on system rear-cover
SYSTEM COVER DESIGN GUIDANCE
System cover including front and rear cover may deform during reliability test. Permanent
deformation of system front and rear cover after reliability test should not interfere with
panel. Because it may cause issues such as pooling, abnormal display, and also white spot.
a). Sufficient gap between panel & system is recommended for preventing from backpack or
pogo test fail.
b). Zero gap from panel's maximum thickness boundary to any components, foreign objects,
Definition
2 Design gap B1 & B2 between panel & protrusions
wire, cable or extrusion on system cover inner surface is forbidden.
c). Interference between panel and system rear-cover is forbidden after reliability test.
Note: Recommend at least 0.6mm gap. If the gap is less than recommendation, please
check with INX.
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PRODUCT SPECIFICATION
a). Sufficient gap is recommended between panel & protrusions for preventing from shock
related failures.
Definition
3 Design gap C between system front-cover & panel surface.
b). Interference between panel and system rear-cover is forbidden after reliability test.
Note: Recommend at least 2.0mm gap. If the gap is less than recommendation, please
check with INX.
a). Sufficient gap between system front-cover & panel surface is a must for preventing from
Definition
pooling or glass broken.
b). Interference between panel and system (front & rear) cover is forbidden after reliability
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Page 35
PRODUCT SPECIFICATION
test.
c). Interference is also forbidden in the act of system front-cover deformation during swing
test, hinge test, knock test, or during pooling inspection procedure.
d). To remain sufficient gap, design with system rib higher than maximum panel thickness is
recommended.
Note: Recommend at least 0.1mm gap. If the gap is less than recommendation, please
check with INX.
4 Design gap D1 & D2 between system front-cover & PCB Assembly.
a). Sufficient gap between system front-cover & PCB assembly is a must for preventing from
abnormal display after backpack test, hinge test, twist test or pogo test.
b). Interference between panel and system front-cover is forbidden after reliability test.
c). Interference is also forbidden in the act of system front-cover deformation during swing
Definition
5 Interference examination of antenna cable and WebCam wire
test, hinge test, knock test, or during pooling inspection procedure.
d). To remain sufficient gap, design with system rib higher than maximum panel thickness is
recommended.
Note: Recommend for D1 at least 0.1mm gap, D2 at least 2.0mm gap. If the gap is less than
recommendation, please check with INX.
a). Antenna cable or WebCam wire overlap with panel outline is forbidden for preventing
from abnormal display & white spot after backpack test, hinge test, twist test or pogo test.
Definition
6 System rear-cover inner surface examination
b). Antenna cable or WebCam wire bypass panel outline is recommended.
c). Interference between panel and system rear-cover is forbidden after reliability test.
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PRODUCT SPECIFICATION
Definition a). Burr at logo edge, step, protrusion or PCB board will easily cause white spot or glass
broken.
b). Keeping flat surface underneath backlight is recommended.
c). Interference between panel and system cover is forbidden after reliability test.
7 Tape/sponge design on system inner surface
Definition a) To prevent abnormal display & white spot after scuffing test, hinge test, pogo test,
backpack test, it is not recommended to add tape/sponge in separate location. Since each
tape/sponge may act as pressure concentration location.
b) We suggest to design with a tape/sponge that well covered under panel rear-cover.
c). Interference between panel and system rear-cover is forbidden after reliability test.
8 Assembly SOP examination
Definition To prevent panel crack during system front-cover assembly process with hook design, it is
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Page 37
prohibited to press panel or any location that related directly to the panel.
9 Assembly SOP examination
PRODUCT SPECIFICATION
Definition To prevent panel crack during system front-cover assembly process without hook design, it
is only allowed to give slight pressure with large contact area. This can help to distribute the
stress and prevent stress concentration. Also it is suggest to put the system on a flat surface
stage during the assembly.
10 Material used for system rear-cover
Definition a) To prevent abnormal display & white spot after scuffing test, hinge test, pogo test,
backpack test, as the poor rigidity result from deformation of system rear-cover during the
test.
b) We suggest using aluminum-magnesium alloy as the system rear-cover material with
thickness min 1.5mm, instead of using PC/ABS.
11 System base unit design near keyboard and mouse pad
Definition To prevent abnormal display & white spot after scuffing test, hinge test, pogo test, backpack
test, no sharp edge design is allowed in any area that may damage the panel during the
test. We suggest to remove all sharp edges, or to reduce the thickness difference of
keyboard/mouse pad from the nearby surface.
12 Screw boss height design
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PRODUCT SPECIFICATION
Definition a). Gap left between panel rear-cover bracket and screw boss surface is prohibited.
b). To remain sufficient gap between panel and system rear-cover, screw boss height must
be designed with respect to the height of bracket bottom surface to panel bottom surface +
flatness change of panel itself.
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