International Rectifier suggests the following guidelines for safe operation and handling of
IRAUDAMP8 Demo board;
Always wear safety glasses whenever operating Demo Board
Avoid personal contact with exposed metal surfaces when operating Demo Board
Turn off Demo Board when placing or removing measurement probes
TEST PROCEDURES....................................................................................................................................... 6
PERFORMANCE AND TEST GRAPHS ..........................................................................................................7
PROTECTION SYSTEM OVERVIEW ............................................................................................................ 21
CLICK AND POP NOISE REDUCTION ......................................................................................................... 23
BUS PUMPING............................................................................................................................................... 23
INPUT SIGNAL AND GAIN SETTING ........................................................................................................... 25
GAIN SETTING............................................................................................................................................... 25
The IRAUDAMP8 Demo board is a reference design which uses only one IC (IRS2093M) to derive
appropriate input signals, amplify the audio input, and achieve a four-channel 120 W/ch (4Ω) half-bridge
Class D audio power amplifier. The reference design demonstrates how to use the IRS2093M Class D audio
controller and gate driver IC, implement protection circuits, and design an optimum PCB layout using
IRF6665 DirectFET MOSFETs. The reference design contains all the required housekeeping power supplies
for ease of use. The four-channel design is scalable, for power and number of channels.
Applications
AV receivers
Home theater systems
Mini component stereos
Powered speakers
Sub-woofers
Musical Instrument amplifiers
Automotive after market amplifiers
Features
Output Power: 120W x 4 channels,
Residual Noise: 200V, IHF-A weighted, AES-17 filter
Distortion: 0.012% THD+N @ 60W, 4Ω
Efficiency: 90% @ 120W, 4Ω, single-channel driven, Class D stage
Multiple Protection Features: Over-current protection (OCP), high side and low side
Over-voltage protection (OVP),
Under-voltage protection (UVP), high side and low side
Over-temperature protection (OTP)
PWM Modulator: Self-oscillating half-bridge topology with optional clock synchronization
Specifications
General Test Conditions (unless otherwise noted) Notes / Conditions
Supply Voltages ±35V
Load Impedance 4Ω
Self-Oscillating Frequency 400kHz No input signal, Adjustable
Gain Setting 26.5dB 1Vrms input yields rated power
Electrical Data Typical Notes / Conditions
IR Devices Used IRS2093M Audio Controller and Gate-Driver,
IRF6665 DirectFET MOSFETs
Modulator Self-oscillating, second order sigma-delta modulation, analog input
Power Supply Range ± 25V to ±35V Bipolar power supply
Output Power CH1-4: (1% THD+N) 120W 1kHz
Output Power CH1-4: (10% THD+N) 170W 1kHz
Rated Load Impedance 8-4Ω Resistive load
www.irf.com Page 3 of 34
IRAUDAMP8 REV 1.0
Standby Supply Current ±100mA No input signal
Total Idle Power Consumption 7W No input signal
Channel Efficiency 90% Single-channel driven,
CH1 IN CN1 Analog input for CH1
CH2 IN CN1 Analog input for CH2
CH3 IN CN1 Analog input for CH3
CH4 IN CN1 Analog input for CH4
SUPPLY P1 Positive and negative supply (+B / -B)
CH1 OUT P2 Output for CH1
CH2 OUT P2 Output for CH2
CH3 OUT P3 Output for CH3
CH4 OUT P3 Output for CH4
www.irf.com Page 5 of 34
Fig 1Typical Test Setup
IRAUDAMP8 REV 1.0
Test Procedures
Test Setup:
1. Connect 4-200 W dummy loads to 4 output connectors (P2 and P3 as shown on Fig 1)
and an Audio Precision analyzer (AP).
2. Connect the Audio Signal Generator to CN2 for CH1~CH4 respectively (AP).
3. Set up the dual power supply with voltages of ±35V; current limit to 10A.
4. TURN OFF the dual power supply before connecting to On of the unit under test (UUT).
5. Connect the dual power supply to P1. as shown on Fig 1
Power up:
6. Turn ON the dual power supply. The ±B supplies must be applied and removed at the
same time.
7. The Blue LED should turn ON immediately and stay ON
8. Quiescent current for the positive supply should be 100mA 10mA at +35V.
9. Quiescent current for the negative supply should be 115mA 10mA at –35V.
Switching Frequency test
10. With an Oscilloscope, monitor the switching waveform at test points VS1~VS4. Adjust VR1
to set the self oscillating frequency to 400 kHz 25 kHz.
Functionality Audio Tests:
11. Set the signal generator to 1kHz, 20 mV
12. Connect the audio signal generator to CN2(Input of CH1,CH2,CH3,CH4)
13. Sweep the audio signal voltage from 15 mV
14. Monitor the output signals at P2/P3 with an oscilloscope. The waveform must be a non
distorted sinusoidal signal.
15. Observe that a 1 V
input generates an output voltage of 21.2 V
RMS
R4A/(R3A), determines the voltage gain of IRAUDAMP8.
output.
RMS
RMS
to 1 V
RMS
.
. The ratio,
RMS
Test Setup using Audio Precision (Ap):
16. Use an unbalanced-floating signal from the generator outputs.
17. Use balanced inputs taken across output terminals, P2 and P3.
18. Connect Ap frame ground to GND at terminal P1.
19. Select the AES-17 filter(pull-down menu) for all the testing except frequency response.
20. Use a signal voltage sweep range from 15 mV
21. Run Ap test programs for all subsequent tests as shown in Fig 2- Fig 7below.
With this high efficiency, the IRAUDAMP8 design can handle one-eighth of the continuous rated
power, which is generally considered to be a normal operating condition for safety standards,
without additional heatsinks or forced air-cooling.
www.irf.com Page 11 of 34
IRAUDAMP8 REV 1.0
Thermal Interface Material’s Pressure Control
The pressure between DirectFET & TIM (Thermal Interface Material) is controlled by depth of Heat
Spreader’s groove. Choose TIM which is recommended by IR.
details). TIM’s manufacturer thickness, conductivity, & etc. determine pressure requirement.
Below shows selection options recommended:
(Refer to AN-1035 for more
www.irf.com Page 12 of 34
Fig 10 TIM Information
IRAUDAMP8 REV 1.0
Check the TIM’s compression deflection with constant rate of strain (example as Fig.11) base on
manufacturer’s datasheet. According to the stress requirement, find strain range for the TIM. Then,
calculate heat spreader groove depth as below:
**DirectFET’s height should be measured from PCB to the top of DirectFET after reflow. The
average height of IRF6665 is 0.6mm.
Fig 11 compression deflection with constant rate of strain
www.irf.com Page 13 of 34
IRAUDAMP8 REV 1.0
Power Supply Rejection Ratio (PSRR)
The IRAUDAMP8 obtains good power supply rejection ratio of -68 dB at 1kHz shown in Fig 12.
With this high PSRR, IRAUDAMP8 accepts any power supply topology when the supply voltages
fit between the min and max range.
+0
-10
-20
-30
-40
d
B
V
-50
-60
-70
-80
-90
2040k501002005001k2k5k10k20k
Hz
ColorSweep TraceLine Sty le Thick DataAxis Comment
11RedSolid2Anlr.Ampl Left
Fig 12 Amp8 Power Supply Rejection Ratio (PSRR)
www.irf.com Page 14 of 34
IRAUDAMP8 REV 1.0
Short Circuit Protection Response
Figs 13-14 show over current protection reaction time of the IRAUDAMP8 in a short circuit event.
As soon as the IRS2093 detects an over current condition, it shuts down PWM. After one second,
the IRS2093 tries to resume the PWM. If the short circuit persists, the IRS2093 repeats try and fail
sequences until the short circuit is removed.
Short Circuit in Positive and Negative Load Current
VS pin
VS pin
VS pin
CSD pin
CSD pin
VS pin
Load current
Positive OCPNegative OCP
Fig 13 Positive and Negative OCP Waveforms
.
OCP Waveforms Showing CSD Trip and Hiccup
VS pin
VS pin
Load current
Load current
Load current
Load current
CSD pin
Load current
CSD pin
Fig 14 OCP Response with Continuous Short Circuit
www.irf.com Page 15 of 34
IRAUDAMP8 REV 1.0
IRAUDAMP8 Overview
The IRAUDAMP8 features a 4CH self-oscillating type PWM modulator for the smallest space,
highest performance and robust design. This topology represents an analog version of a secondorder sigma-delta modulation having a Class D switching stage inside the loop. The benefit of the
sigma-delta modulation, in comparison to the carrier-signal based modulation, is that all the error
in the audible frequency range is shifted to the inaudible upper-frequency range by nature of its
operation. Also, sigma-delta modulation allows a designer to apply a sufficient amount of error
correction.
The IRAUDAMP8 self-oscillating topology consists of following essential functional blocks.
Referring to Fig 15 below, the input operational amplifier of the IRS2093 forms a front-end secondorder integrator with R3, C2, C3, and R2. The integrator that receives a rectangular feedback
signal from the PWM output via R4 and audio input signal via R3 generates a quadratic carrier
signal at the COMP pin. The analog input signal shifts the average value of the quadratic
waveform such that the duty cycle varies according to the instantaneous voltage of the analog
input signal.
PWM Comparator
The carrier signal at the COMP pin is converted to a PWM signal by an internal comparator that
has a threshold at middle point between VAA and VSS. The comparator has no hysteresis in its
input threshold.
Level Shifters
The internal input level-shifter transfers the PWM signal down to the low-side gate driver section.
The gate driver section has another level-shifter that level shifts up the high-side gate signal to the
high-side gate driver section.
www.irf.com Page 16 of 34
IRAUDAMP8 REV 1.0
Gate Drivers and DirectFETs
The received PWM signal is sent to the dead-time generation block where a programmable
amount of dead time is added into the PWM signal between the two gate output signals of LO and
HO to prevent potential cross conduction across the output power DirectFETs. The high-side levelshifter shifts up the high-side gate drive signal out of the dead-time block.
Each channel of the IRS2093’s drives two DirectFETs, high- and low-sides, in the power stage
providing the amplified PWM waveform.
Output LPF
The amplified PWM output is reconstructed back to an analog signal by the output LC LPF.
Demodulation LC low-pass filter (LPF) formed by L1 and C13, filters out the Class D switching
carrier signal leaving the audio output at the speaker load. A single stage output filter can be used
with switching frequencies of 400 kHz and greater; a design with a lower switching frequency may
require an additional stage of LPF.
Fig 15 Simplified Block Diagram of IRAUDAMP8 Class D Amplifier
www.irf.com Page 17 of 34
IRAUDAMP8 REV 1.0
Functional Descriptions
IRS2093 Gate Driver IC
The IRAUDAMP8 uses the IRS2093, a 4 Channel high-voltage (up to 200 V), high-speed power
MOSFET driver with internal dead-time and protection functions specifically designed for Class D
audio amplifier applications. These functions include OCP and UVP. The IRS2093 integrates bidirectional over current protection for both high-side and low-side MOSFETs. The dead-time can
be selected for optimized performance according to the size of the MOSFET, minimizing deadtime while preventing shoot-through. As a result, there is no gate-timing adjustment required
externally. Selectable dead-time through the DT pin voltage is an easy and reliable function which
requires only two external resistors, R12 and R13 as shown on Fig 16 or Fig 22 below.
The IRS2093 offers the following functions.
PWM modulator
Dead-time insertion
Over current protection
Under voltage protection
Level shifters
Refer to IRS2093 datasheet and AN-1146 for more details.
Fig 16 System-level View of IRAUDAMP8
www.irf.com Page 18 of 34
IRAUDAMP8 REV 1.0
Self-Oscillating Frequency
Self-oscillating frequency is determined by the total delay time along the control loop of the
system; the propagation delay of the IRS2093, the DirectFETs switching speed, the time-constant
of front-end integrator (R2, R3, R4, C2, C3 ). Variations in +B and –B supply voltages also affect
the self-oscillating frequency.
The self-oscillating frequency changes with the duty ratio. The frequency is highest at idling. It
drops as duty cycle varies away from 50%.
Adjustments of Self-Oscillating Frequency
Use R2 to set different self-oscillating frequencies. The PWM switching frequency in this type of
self-oscillating switching scheme greatly impacts the audio performance, both in absolute
frequency and frequency relative to the other channels. In absolute terms, at higher frequencies,
distortion due to switching-time becomes significant, while at lower frequencies, the bandwidth of
the amplifier suffers. In relative terms, interference between channels is most significant if the
relative frequency difference is within the audible range.
Normally, when adjusting the self-oscillating frequency of the different channels, it is suggested to
either match the frequencies accurately, or have them separated by at least 25kHz. Under the
normal operating condition with no audio input signal, the switching-frequency is set around
400kHz in the IRAUDAMP8.
www.irf.com Page 19 of 34
IRAUDAMP8 REV 1.0
Selectable Dead-time
The dead-time of the IRS2093 is set based on the voltage applied to the DT pin. Fig 17 lists the
suggested component value for each programmable dead-time between 45 and 105 ns.
All the IRAUDAMP8 models use DT1 (45ns) dead-time.
Dead-time Mode R1 R2 DT/SD Voltage
DT1 <10k Open Vcc
DT2
DT3
5.6k 4.7k
8.2k 3.3k
DT4 Open <10k COM
Recommended Resistor Values for Dead Time Selection
0.46 x Vcc
0.29 x Vcc
Dead-time
45nS
65nS
IRS2093M
>0.5mA
Vcc
R1
85nS
105nS
Vcc 0.57 xVcc 0.36xVcc 0.23xVcc
V
DT
R2
DT
COM
Fig 17 Dead-time Settings vs. VDT Voltage
www.irf.com Page 20 of 34
IRAUDAMP8 REV 1.0
Protection System Overview
The IRS2093 integrates over current protection (OCP) inside the IC. The rest of the protections,
such as over-voltage protection (OVP), under-voltage protection (UVP), and over temperature
protection (OTP), are detected externally to the IRS2093 (Fig 18).
The external shutdown circuit will disable the output by pulling down CSD pins, (Fig 19). If the
fault condition persists, the protection circuit stays in shutdown until the fault is removed.
R52
15k
R60
15k
R59
22k
R51
22k
Q5
MMBT5551
5
OS
4
VCC
D51
4.7V
IC6
LM26CIM5-XHA
1
HT
2
GND
3
VT
OTP
SD
GND
R56
47k
Q3
MMBT5551
OVPUVP
R54
10k
Z3
R53
39V
10k
MMBT5551
R55
47k
Q4
R57
47k
Z4
18V
R50
47k
R58
47k
-B
Fig 18 DCP, OTP, UVP and OVP Protection Circuits
.
Fig 19 Simplified Functional Diagram of OCP
www.irf.com Page 21 of 34
IRAUDAMP8 REV 1.0
Over-Current Protection (OCP)
Low-Side Current Sensing
The low-side current sensing feature protects the low side DirectFET from an overload condition
from negative load current by measuring drain-to-source voltage across R
during its on state.
DS(ON)
OCP shuts down the switching operation if the drain-to-source voltage exceeds a preset trip level.
The voltage setting on the OCSET pin programs the threshold for low-side over-current sensing.
When the VS voltage becomes higher than the OCSET voltage during low-side conduction, the
IRS2093 turns the outputs off and pulls CSD down to -VSS.
High-Side Current Sensing
The high-side current sensing protects the high side DirectFET from an overload condition from
positive load current by measuring drain-to-source voltage across R
during its on state. OCP
DS(ON)
shuts down the switching operation if the drain-to-source voltage exceeds a preset trip level.
High-side over-current sensing monitors drain-to-source voltage of the high-side DirectFET during
the on state through the CSH and VS pins. The CSH pin detects the drain voltage with reference
to the VS pin, which is the source of the high-side DirectFET. In contrast to the low-side current
sensing, the threshold of the CSH pin to trigger OC protection is internally fixed at 1.2V. An
external resistive divider R15, R16 and R17 are used to program a threshold as shown in Fig 18.
An external reverse blocking diode D1 is required to block high voltage feeding into the CSH pin
during low-side conduction. By subtracting a forward voltage drop of 0.6V at D1, the minimum
threshold which can be set for the high-side is 0.6V across the drain-to-source.
Over-Voltage Protection (OVP)
OVP is provided externally to the IRS2093. OVP shuts down the amplifier if the bus voltage
between GND and -B exceeds 39V. The threshold is determined by a Zener diode Z3. OVP
protects the board from harmful excessive supply voltages, such as due to bus pumping at very
low frequency-continuous output in stereo mode.
Under-Voltage Protection (UVP)
UVP is provided externally to the IRS2093. UVP prevents unwanted audible noise output from
unstable PWM operation during power up and down. UVP shuts down the amplifier if the bus
voltage between GND and -B falls below a voltage set by Zener diode Z4.
www.irf.com Page 22 of 34
IRAUDAMP8 REV 1.0
Offset Null (DC Offset) Adjustment
The IRAUDAMP8 requires no output-offset adjustment. DC offsets are tested to be less than ±20
mV.
Over-Temperature Protection (OTP)
A Preset Thermostat IC, IC6 in Fig 17, is placed in close proximity to the heatsink which has 8
DirectFETs under it; and monitors heatsink temperature. If the heatsink temperature rises above
100 C, the OTP shuts down all 4 channels by pulling down the CSD pins of the IRS2093. OTP
recovers once the temperature has cooled down.
Click and POP Noise Reduction
Thanks to the click and pop elimination function built into the IRS2093, the IRAUDAMP8 does not
require any additional components for this function.
Power Supply Requirements
For convenience, the IRAUDAMP8 has all the necessary housekeeping power supplies onboard
and only requires a pair of symmetric power supplies. Or you can use it with the IRAUDPS1
reference design which is a 12 volt systems Audio Power Supply for automotive applications
designed to provide voltage rails (+B and –B) for Class D audio power amplifiers .
House Keeping Power Supply
The internally-generated housekeeping power supplies include ±5V for analog signal processing,
and +12V supply (V
driver section of the IRS2093 uses VCC to drive gates of the DirectFETs. V
(negative power supply). D2, R18 and C10 form a bootstrap floating supply for the HO gate driver.
Bus Pumping
When the IRAUDAMP8 is running in stereo mode, the bus pumping effect takes place with low
frequency, high output. Since the energy flowing in the Class D switching stage is bi-directional,
there is a period where the Class D amplifier feeds energy back to the power supply. The majority
of the energy flowing back to the supply is from the energy stored in the inductor in the output LPF.
) referred to the negative supply rail -B for DirectFET gate drive. The gate
CC
is referenced to –B
CC
www.irf.com Page 23 of 34
IRAUDAMP8 REV 1.0
Usually, the power supply has no way to absorb the energy coming back from the load.
Consequently the bus voltage is pumped up, creating bus voltage fluctuations.
Following conditions make bus pumping worse:
1. Lower output frequencies (bus-pumping duration is longer per half cycle)
2. Higher power output voltage and/or lower load impedance (more energy transfers between
supplies)
3. Smaller bus capacitance (the same energy will cause a larger voltage increase)
The OVP protects IRAUDAMP8 from failure in case of excessive bus pumping. One of the easiest
counter measures of bus pumping is to drive both of the channels in a stereo configuration out-ofphase so that one channel consumes the energy flow from the other and does not return it to the
power supply. Bus voltage detection monitors only +B supply, assuming the bus pumping on the
supplies is symmetric in +B and -B supplies.
Blue: VS of CH3;Cyan: VS of CH2;Magenta: Voltage of +B;Green:Current of C13A
Fig 20
Auto-phase sync clock’s BUS Pumping when idling
www.irf.com Page 24 of 34
IRAUDAMP8 REV 1.0
Load Impedance
Each channel is optimized for a 4 Ω speaker load in half bridge.
Input Signal and Gain Setting
A proper input signal is an analog signal ranging from 20Hz to 20kHz with up to 3 V
with a source impedance of no more than 600 Ω. Input signal with frequencies from 30kHz to
60kHz may cause LC resonance in the output LPF, causing a large reactive current flowing
through the switching stage, especially with greater than 8 Ω load impedances, and the LC
resonance can activate OCP.
The IRAUDAMP8 has an RC network called a Zobel network (R21 and C14) to damp the
resonance and prevent peaking frequency response with light loading impedance. (Fig 21)
amplitude
RMS
Fig 21 Output Low Pass Filter and Zobel Network
Gain Setting
The ratio of resistors R4A~D/R1A~D in Fig 22 sets voltage gain. The IRAUDAMP8 has no on board volume
control. To change the voltage gain, change the input resistor term R1A~D. Changing R4A~D affects PWM
control loop design and may result poor audio performance.
www.irf.com Page 25 of 34
IRAUDAMP8 REV 1.0
www.irf.com Page 26 of 34
IRAUDAMP8 REV 1.0
R20B
22R
C4A
1nF,50V
C2A 2.2nF,50V
R2A 120R
R2B 120R
C3C
2.2nF,50V
C4C1nF,50V
C2D
2.2nF,50V
R7 10R
C6 4.7uF,10V
C7
4.7uF,10V
C2C
2.2nF,50V
R6 10R
R20A
22R
R9A
22R
R9B
22R
R9C
22R
R9D
22R
R20D
22R
R20C
22R
R21B
10R,1W
R21A
10R,1W
C13B
0.47uF, 400V
C13A
0.47uF, 400V
C13D
0.47uF, 400V
C13C
0.47uF, 400V
C14B
0.1uF, 63V
C14A
0.1uF, 63V
CH3 OUTPUT
CH4 OUTPUT
CH2 OUTPUT
CH1 OUTPUT
R15C
10K
R16C
3.9K
R17C
10K
R15D
10K
R16D
3.9K
R17D 10K
D1D 1N4148
D1C
1N4148
D2C
1N4148
R18C
4.7R
R14B
4.7R
C9B
10uF,16V
R16A
3.9K
D1A
1N4148
R15A
10K
R17A
10K
D2B
1N4148
R18B
4.7R
R17B
10K
D1B
1N4148
R16B
3.9K
R15B 10K
R14A
4.7R
C9A
10uF,16V
R13 1K
R12 NC
R11 8.2K R10 2.2K
R4B
100K 1%
R4A
100K 1%
R2C
120R
R3C 4.7K
R1C 22K
R2D
120R
R1D 22K
R4C
100K 1%
R4D
100K 1%
C4D 1nF,50V
C3D
2.2nF,50V
R3A 4.7K
R1B 22K
R3B 4.7K
R1A 22K
C1A 100pF, 50V
R3D 4.7K
C3A 2.2nF,50V
C2B
2.2nF,50V
C3B 2.2nF,50V
C4B
1nF,50V
D2A
1N4148
R18A
4.7R
D2D
1N4148
R18D
4.7R
R21D
10R,1W
R21C
10R,1W
C14D
0.1uF, 63V
C14C
0.1uF, 63V
NC3NC2NC
1
CSD
48
GND
41
IN4
40
COMP4
39
IN3
38
VAA
43
NC
5
VS4
27
CSH4
30
NC
31
COMP2
45
LO2
16
VCC2
17
CSH3
23
VS3
26
VB2
8
HO4
28
VCC
33
COMP1
47
LO3
22
VREF
36
OCSET
35
LO1
15
LO4
21
VB3
24
HO3
25
COM2
20
NC
18
NC
6
COM
32
HO29VS2
10
NC
4
VS111HO1
12
VB1
13
CSH1
14
VB4
29
DT
34
IN2
44
IN1
46
CSH2
7
NC
19
COMP3
37
VSS
42
-B
0
IC1
MLQP48_4CH
C19A
0.1uF,100V
R19A
1R
R19D
1R
L1
22uH
L2
22uH
C19B
0.1uF,100V
R19B
1R
C19C
0.1uF,100V
R19C
1R
R22
10R
D3
1N4148
R22D
10K
R22C 10K
R22B 10K
Q1A
IRF6665
Q2A
IRF6665
Q1B
IRF6665
Q2B
IRF6665
Q2D
IRF6665
Q1C
IRF6665
Q2C
IRF6665
Q1D
IRF6665
C1B 100pF, 50V
C1C 100pF, 50V
C1D 100pF, 50V
GND
GND
GND
GND
CSD
GND
GND
GND
GND
D4
1N4148
C5A 10uF, 16V
C5B 10uF, 16V
C5C 10uF, 16V
C5D 10uF, 16V
R24B 2.2K
R24A 2.2K
R24D 2.2K
R24C 2.2K
R3
22k
C1
0.1uF,50V
VR1
10K
C40
N/A
C41
N/A
HT1OS
5
VT
3
GND
2
VCC
4
IC6
LM26CIM5- XHA
R51
22k
D51
4.7V
R52
15k
C10C
22uF, 16V
C10B
22uF, 16V
C10A
22uF, 16V
C10D
22uF, 16V
C8
10uF, 16V
VCC1OUT
5
SET
3
GND
2
DIT
4
IC2
LTC1799
R43
510R,1W
R44
510R,1W
C17B
1000uF,35V
C17A
1000uF,35V
C17C
0.1uF,50V
C17D
0.1uF,50V
R23B
100k
R23A
100k
1A
1
1B
2
2Y
3
GND42A
5
2B
6
1Y
7
VCC
8
IC8
TC7W00FFCT-ND
L5 220uH
C32
2.2uF, 50V
C37
22uF, 16V
C33
0.1uF, 50V
C34
0.01uF, 25V
C35
2200pF,50V
C36
0.01uF, 50V
R39
100k
R40
100k
R42
3.3k
R32
1k
R41
120k
D7
R31
5.1k
DS1
Q1
FX491
Q2
MMBT5401
R38
10R
R37
47k
Z1
24V
Z2
15V
R36
5.1k
SW
1
BST
2
RCL
3
RTN
4
VIN
8
VCC
7
RON/SD
6
FB
5
IC9
LM5007
Q5
MMBT5551
R59
22k
Q3
MMBT5551
Q4
MMBT5551
R54
10k
R55
47k
R53
10k
R57
47k
R50
47k
R58
47k
Z3
39V
Z4
18V
OVPUVP
+B
GND
-B
R46
33k
1
2
3
4
5
6
7
8
CN1
CH1
GND
CH2
GND
GND
CH3
GND
CH4
CH4 INPUT
CH3 INPUT
CH2 INPUT
CH1 INPUT
1
2
3
4
P2
1
2
3
4
P3
1
2
3P1+B
GND
-B
CH2 OUTPUT
CH1 OUTPUT
GND
GND
CH3 OUTPUT
CH4 OUTPUT
GND
GND
-5v
+5v
VCC
C12A 220pF
VSS
VAA
-B
R22A
10K
C19D
0.1uF,100V
SD
R56
47k
CH2
CH1
R60
15k
C12B 220pF
C12C 220pF
C12D 220pF
Q8 ZX5T853
Q9
ZX5T 953
R45
33k
Z5
5.6V
Z6
5.6V
R4 0R0 or N/A
R1
0R0 or N/A
GND
GND
C61
0.01uF, 50V
R61
10k
R62
10k
For EMI
C62
0.01uF, 50V
R12A
47K
R12B
47K
R12C
47K
R12D
47K
Fig 22 IRAUDAMP8 Schematic
Schematic
IRAUDAMP8 Fabrication Materials
Table 1 IRAUDAMP8 Electrical Bill of Materials
Quantity Value Description Designator Part Number Vender
All dimensions are in millimeters
Tolerances are ±0.1mm
Material:ALUMINUM
14
1082727
4.5
Fig 23 Heat Spreader
.
Screw
H343-ND
Stand Off 4
1893K-ND
Screw
H343-ND
Stand Off 3
Lock washer
1893K-ND
Lock washers
H729-ND
Lock washer
Lock washer
Screws
H343-ND
Thermal Pad
Screw
H343-ND
Lock washer
Screw
Screw
Screw
Stand Off 1
1893K-ND
Fig 24 Hardware Assemblies
Screw
H343-ND
Lock washer
Lock washer
Stand Off 2
1893K-ND
www.irf.com Page 30 of 34
IRAUDAMP8 REV 1.0
IRAUDAMP8 PCB Specifications
PCB:
1. Two Layers SMT PCB with through holes
2. 1/16 thickness
3. 2/0 OZ Cu
4. FR4 material
5. 10 mil lines and spaces
6. Solder Mask to be Green enamel EMP110 DBG (CARAPACE) or Enthone Endplate
DSR-3241or equivalent.
7. Silk Screen to be white epoxy non conductive per IPC–RB 276 Standard.
8. All exposed copper must finished with TIN-LEAD Sn 60 or 63 for 100u inches thick.
9. Tolerance of PCB size shall be 0.010 –0.000 inches
10. Tolerance of all Holes is -.000 + 0.003”
11. PCB acceptance criteria as defined for class II PCB’S standards.
Gerber Files Apertures Description:
All Gerber files stored in the attached CD-ROM were generated from Protel Altium Designer
Altium Designer 6. Each file name extension means the following:
1. .gtl Top copper, top side
2. .gbl Bottom copper, bottom side
3. .gto Top silk screen
4. .gbo Bottom silk screen
5. .gts Top Solder Mask
6. .gbs Bottom Solder Mask
7. .gko Keep Out,
8. .gm1 Mechanical1
9. .gd1 Drill Drawing
10. .gg1 Drill locations
11. .txt CNC data
12. .apr Apertures data
Additional files for assembly that may not be related with Gerber files: