IRDC3899-P1V2
SupIRBuck
TM
USER GUIDE FOR IR3899 EVALUATION BOARD
DESCRIPTION
The IR3899 is a synchronous buck
converter, providing a compact, high
performance and flexible solution in a small
4mm X 5 mm Power QFN package.
Key features offered by the IR3899 include
internal Digital Soft Start/Soft Stop, precision
0.5Vreference voltage, Power Good,
thermal protection, programmable switching
frequency, Enable input, input under-voltage
lockout for proper start-up, enhanced line/
load regulation with feed forward, external
frequency synchronization with smooth
clocking, internal LDO and pre-bias startup.
1.2Vout
Output over-current protection function is
implemented by sensing the voltage developed
across the on-resistance of the synchronous
rectifier MOSFET for optimum cost and
performance and the current limit is thermally
compensated.
This user guide contains the schematic and bill
of materials for the IR3899 evaluation board.
The guide describes operation and use of the
evaluation board itself. Detailed application
information for IR3899 is available in the
IR3899 data sheet.
BOARD FEATURES
• V
= +12V (+ 13.2V Max)
in
• V
= +1.2V @ 0- 9A
out
• F
=400KHz
s
• L= 1.0uH
• C
= 4x10uF (ceramic 1206) + 1X330uF (electrolytic)
in
• C
=6x47uF (ceramic 0805)
out
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IRDC3899-P1V2
CONNECTIONS and OPERATING INSTRUCTIONS
A well regulated +12V input supply should be connected to VIN+ and VIN-. A maximum of 9A load should be
connected to VOUT+ and VOUT-. The inputs and output connections of the board are listed in Table I.
IR3899 has only one input supply and internal LDO generates Vcc from Vin. If operation with external Vcc
is required, then R15 can be removed and external Vcc can be applied between Vcc+ and Vcc- pins. Vin pin
and Vcc/LDOout pins should be shorted together for external Vcc operation.
The output can track voltage at the Vp pin. For this purpose, Vref pin is to be connected to ground (use zero
ohm resistor for R21). The value of R14 and R20 can be selected to provide the desired tracking ratio
between output voltage and the tracking input.
Table I. Connections
Connection Signal Name
VIN+ Vin (+12V)
VIN- Ground of Vin
Vout+ Vout(+1.2V)
Vout- Ground for Vout
Vcc+ Vcc/ LDO_out Pin
Vcc- Ground for Vcc input
Enable Enable
P_Good Power Good Signal
AGnd Analog ground
LAYOUT
The PCB is a 4-layer board (2.23”x2”) using FR4 material. All layers use 2 Oz. copper. The PCB
thickness is 0.062”. The IR3899 and other major power components are mounted on the top side of the
board.
Power supply decoupling capacitors, the bootstrap capacitor and feedback components are located
close to IR3899. The feedback resistors are connected to the output at the point of regulation and are
located close to the SupIRBuck IC. To improve efficiency, the circuit board is designed to minimize the
length of the on-board power ground current path.
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IRDC3899-P1V2
Connection Diagram
Enable
VDDQ
Vref
Sync
S-Ctrl
AGnd
Vin Gnd Gnd Vout
PGood
Vsns
Vcc+
Vcc-
Top View
Fig. 1: Connection Diagram of IR3899/98/97 Evaluation Boards
9/18/2012
Bottom View
3
IRDC3899-P1V2
Single point connection
between AGnd and PGnd
Fig. 2: Board Layout-Top Layer
Fig. 3: Board Layout-Bottom Layer
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4
IRDC3899-P1V2
Fig. 4: Board Layout-Mid Layer 1
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Fig. 5: Board Layout-Mid Layer 2
5
IRDC3899-P1V2
Vout-
1
VDDQ
1
Vin
VREF
1
+
C36
N/S
C14
0.1uF
+ C35
N/S
PGND
1
L1
1.0uH
R12
4.02K
R28
N/S
C24
0.1uF
Vsns
1
VCC
C26
4.7nF
R29
N/S
R19
7.5K
R14
0 ohm
Vout
Vcc+
1
C2
10uF
C5
10uF
R9
60.4K
R1
5.23K
R10
0 ohm
C3
10uF
R3
4.02K
R4
100 ohm
R2
5.62K
C4
10uF
C15
47uF
R6
20 ohm
SYNC
1
C16
47uF
Agnd
1
C17
47uF
R7
N/A
C18
47uF
C19
47uF
C20
47uF
R13
0 ohm
C25
N/S
C23
2.2uF
S_Ctrl
1
C12
1nF
A
1
B
1
R18
49.9K
+
C1
330uF/25V
R50
0 ohm
C27
N/S
VCC
C8
2200pF
VCC
Input ceramic: 1206
U1
IR3899
Enable
15
Boot
14
Vsns
8
SW
12
PGood
7
COMP
3
S_Ctrl
6
PGnd
11
Vp
16
FB1Gnd
4
Vcc/LDO_OUT
10
PVin
13
Rt_Sy nc
5
Vin
9
VREF
2
GND
17
N38703
R15
0 ohm
C32
1.0uF
C28
N/S
Vin+
1
C29
N/S
Vin-
1
C30
N/S
Vout+ (1.2V)
1
Vout-
1
R21
N/S
C7
0.1uF
R17
49.9KPGood
1
C11
82pF
C6
N/A
C37
N/S
C10
N/A
R11
5.62K
Enable
1
Vin+
1
Vin-
1
Vout+
1
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Fig. 6: Schematic of the IR3899 evaluation board
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Bill of Materials
IRDC3899-P1V2
Item Qty Part Reference Value Description
1 1 C1 330uF
2 4 C2 C3 C4 C5 10uF
3 3 C7 C14 C24 0.1uF 0603, 25V, X7R, 10% Murata GRM188R71E104KA01B
4 1 C12 1nF 0603, 50V, 5% Murata GRM1885C1H102JA01D
5 1 C8 2200pF 0603,50V,X7R Murata GRM188R71H222KA01B
6 1 C11 82pF
7 6
8 1 C23 2.2uF
9 1 C26 4.7nF
10 1 C32 1.0uF
11 1 L1 1.0uH SMD 6.36x6.56x3mm, 5.62mΩ Coilcraft XAL6030-102ME
12 1 R1 5.23K
13 2 R2 R11 5.62K
C15 C16 C17 C18 C19
C20 47uF
SMD Electrolytic F size 25V 20% Panasonic
1206, 16V, X5R, 20%
0603, 50V, NP0, 5% Murata GRM1885C1H820JA01D
0805, 6.3V, X5R, 20%
0603, 16V, X5R, 20%
0603, 25V, X7R, 10%
0603, 25V, X5R, 10%
Thick Film, 0603,1/10W,1%
Thick Film, 0603,1/10W,1%
Manufacture
r Part Number
EEV-FK1E331P
TDK C3216X5R1C106M
TDK C2012X5R0J476M
TDK C1608X5R1C225M
Murata GRM188R71E472KA01J
Murata GRM188R61E105KA12D
Panasonic ERJ-3EKF5231V
Panasonic ERJ-3EKF5621V
14 2 R3 R12 4.02K
15 1 R4 100
16 1 R6 20
17 1 R9 60.4K
18 5 R10 R13 R14 R15 R50 0
19 2 R17 R18 49.9K
20 1 R19 7.5K
21 1 U1 IR3899 PQFN 4x5mm IR IR3899MPBF
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Thick Film, 0603,1/10W,1%
Thick Film, 0603,1/10W,1%
Thick Film, 0603,1/10W,1%
Thick Film, 0603,1/10W,1%
Thick Film, 0603,1/10W
Thick Film, 0603,1/10W,1%
Thick Film, 0603,1/10W,1%
Panasonic ERJ-3EKF4021V
Panasonic ERJ-3EKF1000V
Panasonic ERJ-3EKF20R0V
Panasonic ERJ-3EKF6042V
Panasonic ERJ-3GEY0R00V
Panasonic ERJ-3EKF4992V
Panasonic ERJ-3EKF7501V
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TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no airflow
IRDC3899-P1V2
Fig. 7: Start up at 9A Load
Ch1:Vin, Ch2:Vo, Ch3:P
Good Ch4
:Enable
Fig. 9: Start up with 1V Pre Bias , 0A Load,
Ch2:V
o
Fig. 8: Start up at 9A Load,
Ch1:Vin, Ch2:Vo, Ch3:P
good , Ch4
:Vcc
Fig. 10: Output Voltage Ripple, 9A load
Ch1: V
out ,
Fig. 11: Inductor node at 9A load
Ch2:LX
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Fig. 12: Short circuit (Hiccup) Recovery
Ch2:V
, Ch4:Iout
out
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TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no air flow
IRDC3899-P1V2
9/18/2012
Fig. 13: Transient Response, 0A to 3A step
Ch1:V
out
Ch4-Iout
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TYPICAL OPERATING WAVEFORMS
Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no air flow
IRDC3899-P1V2
Fig. 14: Bode Plot at 9A load shows a bandwidth of 78.13KHz and phase margin of 55.5 degrees
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TYPICAL OPERATING WAVEFORMS
74
76
78
80
82
84
86
88
90
0.9 1.8 2.7 3.6 4.5 5.4 6.3 7.2 8.1 9
Efficiency [%]
Io [A]
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 1 2 3 4 5 6 7 8 9
Power Loss [W]
Io [A]
Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, no air flow
IRDC3899-P1V2
9/18/2012
Fig.16: Power loss versus load current
Fig.15: Efficiency versus load current
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THERMAL IMAGES
Vin=12.0V, Vo=1.2V, Io=0-9A, Room Temperature, No Air flow
IRDC3899-P1V2
Fig. 17: Thermal Image of the board at 9A load
9/18/2012
Test point 1 is IR3899
Test point 2 is inductor
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IRDC3899-P1V2
PCB METAL AND COMPONENT PLACEMENT
Evaluations have shown that the best overall performance is achieved using the substrate/PCB layout
as shown in following figures. PQFN devices should be placed to an accuracy of 0.050mm on both X
and Y axes. Self-centering behavior is highly dependent on solders and processes, and experiments
should be run to confirm the limits of self-centering on specific processes. For further information, please
refer to “SupIRBuck™ Multi-Chip Module (MCM) Power Quad Flat No-Lead (PQFN) Board Mounting
Application Note.” (AN1132)
Figure 18: PCB Metal Pad Spacing (all dimensions in mm)
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IRDC3899-P1V2
SOLDER RESIST
IR recommends that the larger Power or Land Area pads are Solder Mask Defined (SMD.)
This allows the underlying Copper traces to be as large as possible, which helps in terms of current
carrying capability and device cooling capability. When using SMD pads, the underlying copper
traces should be at least 0.05mm larger (on each edge) than the Solder Mask window,
in order to accommodate any layer to layer misalignment. (i.e. 0.1mm in X & Y.)
However, for the smaller Signal type leads around the edge of the device, IR recommends that
these are Non Solder Mask Defined or Copper Defined. When using NSMD pads,
the Solder Resist Window should be larger than the Copper Pad by at least 0.025mm on
each edge, (i.e. 0.05mm in X&Y,) in order to accommodate any layer to
layer misalignment. Ensure that the solder resist in-between the smaller signal lead areas are at
least 0.15mm wide, due to the high x/y aspect ratio of the solder mask strip.
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Figure 19: Solder resist
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IRDC3899-P1V2
STENCIL DESIGN
Stencils for PQFN can be used with thicknesses of 0.100-0.250mm (0.004-0.010"). Stencils thinner than
0.100mm are unsuitable because they deposit insufficient solder paste to make good solder joints with the
ground pad; high reductions sometimes create similar problems. Stencils in the range of 0.125mm-0.200mm
(0.005-0.008"), with suitable reductions, give the best results. Evaluations have shown that the best overall
performance is achieved using the stencil design shown in following figure. This design is for
a stencil thickness of 0.127mm (0.005").The reduction should be adjusted for stencils of other thicknesses.
Figure 20: Stencil Pad Spacing (all dimensions in mm)
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PACKAGE INFORMATION
IRDC3899-P1V2
Figure 21: Package Dimensions
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
This product has been designed and qualified for the Industrial market
9/18/2012
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice.06/11
16
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