Infineon XMC4000 Series Device Manual
XMC4000
Microcontroller Series
for Industrial Applications
Device Guide
V1.0 2013-04
Hibernate
Hibernate Mode Basics
Hibernate Mode Implementations
Control of External Voltage Regulator
Getting Started
Application Hints
Edition 2013-04
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2013 Infineon Technologies AG
All Rights Reserved.
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Hibernate
Revision History
Page or Item
Subjects (major changes since previous revision)
V1.0, 2013.04
Release
XMC4000 Family
Revision History
Trademarks of Infineon Technologies AG
AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™,
CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™,
IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™,
SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by
AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum.
COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.).
EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay
Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique
Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL
ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim
Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of
NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA
MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™
Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of
Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited.
TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc.
TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™,
PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated.
VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.
Last Trademarks Update 2011-02-24
Hibernate
XMC4000 Family
Table of Contents
Table of Contents
1 Hibernate Mode Basics ...................................................................................................................... 6
1.1 Externally Controlled Hibernate Use Cases ......................................................................................... 7
1.2 Internally Controlled Hibernate Use Cases .......................................................................................... 8
2 Hibernate Mode Implementations ................................................................................................... 11
2.1 Externally Controlled Hibernate Mode Concept ................................................................................. 11
2.2 Internally Controlled Hibernate Mode Concept .................................................................................. 13
3 Control of External Voltage Regulator ........................................................................................... 16
3.1 Active high enable via pull-up ............................................................................................................ 17
3.2 Active high enable driven from a voltage divider ............................................................................... 18
3.3 Active low enable driven with push-pull I/O ...................................................................................... 19
3.4 Active low enable and with pull-up to high ......................................................................................... 20
3.5 Active low enable driven from a voltage divider ................................................................................. 20
3.6 Active low enable driven from a voltage divider and V
4 Getting Started ................................................................................................................................. 24
4.1 Initialize Hibernate Domain ................................................................................................................ 25
4.2 Store Context Data in Retention Memory .......................................................................................... 26
4.3 Select Wake-up Triggers .................................................................................................................... 27
4.4 Configure Hibernate Control I/O ......................................................................................................... 28
4.5 Request External Hibernate Mode ..................................................................................................... 29
4.6 Request Internal Hibernate Mode ...................................................................................................... 29
4.7 Hibernate Mode Entered .................................................................................................................... 30
4.8 Wake-up Trigger Detected ................................................................................................................. 30
4.9 Power-up and Boot-up ....................................................................................................................... 31
4.10 Processing of Wake-up Cause Info.................................................................................................... 31
4.11 Clear Reset Status ............................................................................................................................. 32
4.12 Restore Context Data from Retention Memory .................................................................................. 32
4.13 Execute Application Code .................................................................................................................. 32
.................................................................. 21
BAT
5 Application Hints .............................................................................................................................. 35
5.1 Which Hibernate Mode to Choose ..................................................................................................... 35
5.2 Hibernate Domain Clock .................................................................................................................... 35
5.3 Digital I/O Voltage Levels ................................................................................................................... 36
5.4 Analog I/O Voltage Levels .................................................................................................................. 36
5.5 Retention Memory .............................................................................................................................. 36
5.6 Emergency Recovery from Hibernate Mode ...................................................................................... 37
Device Guide 4 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Basics
Hibernate Mode Basics
Device Guide 5 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Basics
1 Hibernate Mode Basics
Hibernate Mode is one of the system power states of the XMC4000 device. The XMC4000 devices
implements Power Management control that aims at reduction of power consumption. The available
Power Modes (also referred to as Power States) of the system, depicted in Figure 1., offer different
features they may be utilized in an application specific manner, with the focus on different aspects,
like current consumption, transition time between states, system topology, etc.
Figure 1 System Power States
The XMC family implements the following Power Modes:
Active Mode - the normal operation state.
− Entered automatically after system reset release
Sleep Mode - clock of the CPU and selected peripherals is stopped.
− Entered via WFI or WFE instruction of the CPU (for details please refer to Cortex-M4
documentation)
− Wake-up on any valid interrupt/exception
Deep Sleep Mode – similar to Sleep Mode, with an ability to power down additional peripherals
− Entered via WFI or WFE instruction of the CPU (for details please refer to Cortex-M4
documentation)
− Wake-up on any valid interrupt/exception
Hibernate Mode – Power Supply to the chip or to the core (on some family XMC4000 family
members) is switched off and only Hibernate Domain remain powered on
The Hibernate Mode is the power mode of the lowest power consumption, offering Real Time Clock
keeping and preservation of a context specific data in a retention memory (for details on power
consumption and timing figures please refer to Data Sheet). Transitions into and from the power
states are controlled with user software and valid wake-up events respectively. The wake-up trigger
events may be generated by different sources, like external signals or RTC events, configured by the
user prior to entering a power saving state.
There are two implementations of the Hibernate Mode Control.
Externally Controlled Hibernate Mode (ECHM) with an IO actively controlling External Voltage
Regulator
Device Guide 6 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Basics
Internally Controlled Hibernate Mode (ICHM) with an internal signal actively controlling Embedded
Voltage Regulator (EVR)
1.1 Externally Controlled Hibernate Use Cases
Generic application scenarios of Externally Controlled Hibernate Mode are illustrated in Figure 2.
These use case scenarios enable the XMC4000 to act as a system Power Control Master. All system
components supplied with VDDP are powered off and no current is drawn in the VDDP power
domain. Upon a wake-up trigger complete VDDP power domain of the system on PCB will be brought
into operation.
Figure 2 Examples of Externally Controlled Hibernate Mode use case
The external hibernate control is performed via the Hibernate Control Signal that will switch off the
Voltage Regulator providing VDDP voltage to all components of the board. VBAT will still be supplied
from an auxiliary source like e.g. a coin battery, or, a capacitor while in the Externally Controlled
Device Guide 7 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Basics
Hibernate Mode. A wake-up trigger will come from an external source and/or from the internal RTC
module.
1.2 Internally Controlled Hibernate Use Cases
Generic application scenarios of Internally Controlled Hibernate Mode are illustrated in Figure 3.
These use case scenarios enable the XMC4000 to act as a system Power Control Slave. All system
components in the VDDP power remain powered on while Core Domain of the XMC4000 device is
powered off and I/Os are reset to input operation mode. Upon a wake-up trigger Core Domain of the
XMC4000 will be powered-up and brought into operation.
Figure 3 Examples of Internally Controlled Hibernate Mode use case
The internal hibernate control is performed via an internal circuit inside of the XMC4000 that will
switch off the Embedded Voltage Regulator providing VDDC voltage to the Core Domain of the chip.
While in Internally Controlled Hibernate Mode VBAT may still be supplied directly from the VDDP
source while main supply is available, and/or from an auxiliary source like e.g. a coin battery, or, a
Device Guide 8 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Basics
capacitor when the mains supply if off. A wake-up trigger will come from an external source and/or
from the internal RTC module and will enable Core Domain voltage generation (if VDDP is still
available).
Note: The Internally Controlled Hibernate Mode is not supported on XMC4500 device.
Device Guide 9 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Basics
Hibernate Mode
Implementations
Device Guide 10 V1.0, 2013-04
Hibernate
Table 1 Hibernate Wake-up Triggers
Trigger Source
I/O Signals
Description
RTC event
n/a
RTC Alarm or RTC Periodic Event.
Watchdog of RTC external
crystal oscillator
n/a
The RTC external crystal oscillator (OSC_ULP) watchdog
is capable of generating a wakeup trigger if the RTC clock
generated with external crystal, or, a direct external clock
stops unexpectedly
Digital Input Signal
HIB_IO_0
HIB_IO_1
Exclusive selection of one of the digital inputs. Depending
of an application a rising and/or falling edge of the signal
may be selected as a wake-up trigger. For external
hibernate mode it is possible to combine Hibernate Control
and Wake-up function in the same digital IO. For availability
of the IOs please refer to the Data Sheet.
Analog Input Signal
HIB_IO_0
HIB_IO_1
Voltage threshold level crossing detection performed in the
Low Power Comparator (LPAC) module. Depending of an
application a rising and/or falling voltage event may be
selected as a wake-up trigger. The level crossing detection
can be performed continuously, periodically, or, may be
triggered with an external digital signal. Multiple analog
channels may be used for the wake-up trigger detection.
For availability of the LPAC module please refer to the Data
Sheet.
VBAT Supply Level Detection
VBAT
VBAT voltage detection can be performed with LPAC
module. Depending of an application a rising and/or falling
voltage event may be selected as a wake-up trigger. The
VBAT input level can be performed continuously,
periodically, or, triggered with an external digital signal. For
availability of the LPAC module please refer to the Data
Sheet.
XMC4000 Family
Hibernate Mode Implementations
2 Hibernate Mode Implementations
The two Hibernate Mode implementations, ECHM and ICHM, described in this section differ in the
way the core voltage generation control mechanism. However, the wake-up trigger detection
mechanism is the same for both Hibernate Mode implementations. The wakeup source can be digital
or analog, internal (RTC event) or external (input signal on an I/O). For more details please refer to
Table 1.
Various combinations of wake-up triggers are possible and a wide range of possible applications is
considered. The optimal selection of the Hibernate Mode and wake-up triggers application specific
requirements and availability of resources need to be taken in consideration.
Some system topologies may combine capabilities of both implementation of the Hibernate Mode and
can be applied interchangeably when required. However, only one of the Hibernate Modes can be
applied at the time.
2.1 Externally Controlled Hibernate Mode Concept
The system configuration assumes that the XMC4000 device acts as the power management master
of the system on PCB and is capable to switch off/on the external Voltage Regulator. The Hibernate
Mode is entered by switching off the power supply VDDP of the device with the HIB_IO_0 pin. The
HIB_IO_0 pin remains in control of the External Voltage Regulator after entering Hibernate Mode
since entire Hibernate Domain remains supplied with the VBAT voltage from an auxiliary supply
Device Guide 11 V1.0, 2013-04
Hibernate
XMC4000 Family
Hibernate Mode Implementations
voltage, e.g. a coin battery or a capacitor. A more detailed example scenario superset depicted in
Figure 1 shows the components of the complete system that enable use of the Hibernate Mode.
Figure 4 Externally Controlled Hibernate Mode Scenario
The Hibernate Control Unit (HCU) implements a circuit capable of controlling an External Voltage
Regulator via an I/O and detecting occurrence of an event matching user programmed wake-up
condition.
Entering Hibernate Mode is performed with a software request to a control register in the HCU module
which results in toggling an I/O connected to the External Voltage regulator.
Figure 5 Externally Controlled Hibernate Mode Power Sequencing
Device Guide 12 V1.0, 2013-04
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