Infineon TLE986 Evalboard Series User Manual

User Manual Please read the Important Notice and Warnings at the end of this document Rev. 1.0

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TLE986x EvalBoard User Manual

About this document

Scope and purpose

This user manual is intented to help users using the TLE986x Evalboard. This Evalboard is designed to evaluate
hardware and software functionalities of the TLE986x device family.

This manual provides additional information about the board’s layout, jumper settings, interface and debug
options. It introduces the evaluation platform as well as how to write software and download it to the TLE986x.

Intended audience

This document is for everyone who works with the TLE986x Evalboard.

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About this document

Abbreviations and definitions

Table 1 Abbreviations

Abbreviation

Definition

BLDC

Brushless direct current

BSL

Bootstrap loader

GH 1, 2

Gate high-side MOSFET for phases 1, 2

GL 1, 2

Gate low-side MOSFET for phase 1, 2

GPIO

General purpose input / output

ISP

In-system programmer

LIN

Local interconnect network

MON

Monitor

n.c.

Not connected

n/u

Not used

OP1

Negative operational amplifier input

OP2

Positive operational amplifier input

RST

Reset

SL

Source low-side MOSFETs

SWD

Arm® serial wire debug

TMS

Test mode select

UART

Universal asynchronous receiver transmitter

VAREF

Reference voltage

VBAT

Battery voltage supply

VCOM

Virtual COM-port

VCP

Voltage charge pump

VDDC

Core supply

VDDEXT

External voltage supply output

VDDP

I/O port supply

VDH

Voltage drain high-side MOSFET

VS

Battery supply input

VSD

Battery supply input for MOSFET driver

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Table of contents

Table of contents

About this document ....................................................................................................................... 1

Table of contents ............................................................................................................................ 3

1 Concept ................................................................................................................................ 4

2 Interconnects ........................................................................................................................ 5

3 Test points and LEDs ............................................................................................................... 7

4 Jumper settings ..................................................................................................................... 8

5 Communication interfaces ..................................................................................................... 10

5.1 LIN (via banana jack and uIO BSL) ........................................................................................................ 10

5.2 UART ...................................................................................................................................................... 10

5.3 Debugging .............................................................................................................................................. 10

6 Software toolchain ................................................................................................................ 11

6.1 Keil µVision 5 ......................................................................................................................................... 11

6.2 Infineon ConfigWizard ........................................................................................................................... 11

6.3 TLE986x SDK .......................................................................................................................................... 11

6.4 Debug connection setup ....................................................................................................................... 11

7 Technical data ...................................................................................................................... 13

8 Optional additional placements .............................................................................................. 14

9 Schematics and layout ........................................................................................................... 15

9.1 Schematic .............................................................................................................................................. 15

9.2 Layout .................................................................................................................................................... 18

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Concept

1 Concept

Figure 1 Board concept

This board is designed to provide a simple, easy-to-use tool for getting familiar with Infineon’s Embedded
Power IC TLE986x devices. A socket provides the possibility to test and evaluate all ICs of the TLE986x family.
Every pin of the IC is connectable via rows of pin headers. The board is protected against reverse polarity of
input voltage supply.

Two MOSFET half bridges are assembled on the board to drive a DC motor. The board is ready to be connected
to a car supply or similar and offers a SWD port to connect an external debugger.

The evaluation board can be operated by standard laboratory equipment as power supply and LIN
communication are working via banana jacks.

There is a battery LED that indicates that the board is connected to supply in the correct way. Otherwise
reverse polarity protection secures the board from damage by cross connection.

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Interconnects

2 Interconnects

Figure 2 Interconnects

Banana jacks for ground, supply and LIN

There are jacks in different colors for ground, supply (max. 28 V) and LIN communication via banana jack. The
following jacks are available: GND (marked purple), VBAT (marked red), motor phase 1 & 2 (marked red) and LIN
(marked green).

Banana jacks for motor connection (marked red)

The two jacks Phase1 and Phase2 provide access to the two half bridges and are intended to connect a motor.

uIO Stick connector (marked green)

This uIO bootstrap loader is a 16-pin header (2 x 8) with 2.54 mm pitch.

It is intended to connect additional hardware for bootstrap loading. This interface can be used to program the
TLE986x via LIN (see www.infineon.com/uio or www.hitex.com/uio).

GND

Phase 2

Phase 1

SWD

UART-Serial

VBAT

LIN

uIO

­Stick

VBAT

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Interconnects

Figure 3 Pin configuration uIO BSL

Pin header for SWD (marked blue)

There is a 10 pin header (2 x 5) with 1.27 mm pitch on the evaluation board. This interface is meant to be used
for debugging.

Figure 4 Pin configuration SWD interface

5 V 1 2

3 4

5 6

7 8

GND

GND

n.c.

SWDIO (TMS)

SWCLK (P0.0)

n.c.

n.c.

9 10DBPRE RESET

LIN

RESET

GND

VS

TXD1

RXD1

VDD5

GPIO3

1

2

3

4

5

6

7

8

9

11

10

13

14

15

16

GPIO2

GPIO1

SCS

SCLK

MISO

MOSI

AD0

GPIO0

12