TLE985x-Errata-100-Infineon
TLE985xQX(W) Family
Overview
This document lists the errata of the TLE985xQX(W) family.
It is strongly recommended that the device behavior and possible proposed workarounds are considered for
the application.
Referenced documents
Table 1 Reference documents
Document type Document reference Issue date
Data Sheet See Table 2
User Manual Infineon-TLE985xQX-UserManual-v01_00-EN.pdf 2019-12-10
Aected products
Table 2 List of aected products
Device Reference datasheet Issue date
TLE9850QX Infineon-TLE9850QX-DataSheet-v01_00-EN.pdf 2019-07-26
TLE9851QXW Infineon-TLE9851QXW-DataSheet-v01_01-EN.pdf 2020-03-23
TLE9852QX Infineon-TLE9852QX-DataSheet-v01_00-EN.pdf 2019-07-26
TLE9853QX Infineon-TLE9853QX-DataSheet-v01_00-EN.pdf 2019-07-26
TLE9854QX Infineon-TLE9854QX-DataSheet-v01_00-EN.pdf 2019-07-26
TLE9854QXW Infineon-TLE9854QXW-DataSheet-v01_01-EN.pdf 2020-03-23
TLE9855QX Infineon-TLE9855QX-DS-DataSheet-v01_00-EN.pdf 2019-07-26
Errata sheet Please read the Important Notice and Warnings at the end of this document 1.0
www.infineon.com 2020-07-24
TLE985x-Errata-100-Infineon
TLE985xQX(W) Family
Table of contents
Table of contents
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1 Product errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 PLL loss of lock (0000052337-4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.1 Workaround . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1.1.1 Bypass of PLL and fixed system frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1.1.2 Optional: Use of recovery routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1.2 Design improvement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Application hint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 ADC1 (HV-Channel) sampling switch activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.1 Workaround . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Errata sheet 2 1.0
2020-07-24
TLE985x-Errata-100-Infineon
TLE985xQX(W) Family
Product errata
1 Product errata
This chapter lists the errata of the referenced products and documentation.
1.1 PLL loss of lock (0000052337-4)
Behavior
The TLE985x provides a Phase-Locked-Loop (PLL) to generate the system frequency. Under certain conditions it
may happen that the PLL issues a loss of lock. The probability for an erroneous PLL loss of lock to occur
increases with higher temperature and longer operation times.
Eects
In case of a PLL loss of lock, the system frequency will be switched to free running clock divided by K2, this
might have the following eects to the application:
• System timing do not match anymore, e.g. LIN communication might not work properly, PWM period might
be aected.
• WDT1 reset may occur.
• Digital filter times might not match anymore.
1.1.1 Workaround
1.1.1.1 Bypass of PLL and fixed system frequency
As the source of the loss of lock detection is within the lock detection unit, a possible workaround is to bypass
the PLL and use the internal oscillator (marked blue in Figure 1) as system frequency source only. This will lead
to a fixed system frequency of 40 MHz.
Figure 1 Clock generation unit block diagram
Errata sheet 3 1.0
2020-07-24