Infineon TLE9261-3BQX Datasheet

Datasheet 1 Rev. 1.1

www.infineon.com 2019-09-27

TLE9261-3BQX System Basis Chip

Mid-Range+ System Basis Chip Family

Features

• Two integrated Low-Drop Voltage Regulators: Main regulator (5 V or 3.3 V up to 250 mA) and auxiliary regulator (5 V up to 100 mA) with off-board usage protection

• Voltage regulator (5 V, 3.3 V or 1.8 V) with external PNP transistor configurable for off-board usage or for load sharing

• 1 high-speed CAN transceiver supporting FD communication up to 5 Mbit/s featuring CAN Partial Networking & CAN FD tolerant mode according to ISO 11898-2:2016 & SAE J2284

•4high-side outputs 7Ω typ., 2 HV GPIOs, 3 HV wake inputs

• Integrated fail-safe and supervision functions, e.g. fail-safe, watchdog, interrupt- and reset outputs

• 16-bit SPI for configuration and diagnostics

Potential applications

• Body Control Modules (BMC), Passive keyless entry and start modules, Gateway applications

• Heating, ventilation and air conditioning (HVAC)

• Seat, roof, tailgate, trailer, door and other closure modules

• Light control modules

• Gear shifters and selectors

Product validation

Qualified for automotive applications. Product validation according to AEC-Q100/101.

Description

Body System IC with Integrated Voltage Regulators, Power Management Functions, HS-CAN Transceiver supporting CAN FD featuring Partial Networking (incl. FD Tolerant Mode). Featuring Multiple High-Side Switches and High-Voltage Wake Inputs.

Type Package Marking

TLE9261-3BQX PG-VQFN-48-31 TLE9261-3BQX

TLE9261-3BQX

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.1 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.2 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3 Hints for Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 Hints for Alternate Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.2 Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4.3 Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.4 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 System Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5.1 Block Description of State Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.1.1 Device Configuration and SBC Init Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.1.1 Device Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

5.1.1.2 SBC Init Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.1.2 SBC Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

5.1.3 SBC Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

5.1.4 SBC Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.1.5 SBC Restart Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

5.1.6 SBC Fail-Safe Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

5.1.7 SBC Development Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.2 Wake Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.2.1 Cyclic Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.2.1.1 Configuration and Operation of Cyclic Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.2.1.2 Cyclic Sense in Low Power Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.2.2 Cyclic Wake . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

5.2.3 Internal Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.3 Supervision Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.4 Partial Networking on CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

5.4.1 CAN Partial Networking - Selective Wake Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

5.4.2 SBC Partial Networking Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

5.4.2.1 Activation of SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

5.4.2.2 Wake-up Pattern (WUP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

5.4.2.3 Wake-up Frame (WUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

5.4.2.4 CAN Protocol Error Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

5.4.3 Diagnoses Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Datasheet 2 Rev. 1.1

2019-09-27

TLE9261-3BQX

5.4.3.1 PWRON/RESET-FLAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.2 BUSERR-Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.3 TXD Dominant Time-out flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.4 WUP Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.5 WUF Flag (WUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.6 SYSERR Flag (SYSERR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.7 Configuration Error . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5.4.3.8 CAN Bus Timeout-Flag (CANTO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

5.4.3.9 CAN Bus Silence-Flag (CANSIL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

5.4.3.10 SYNC-FLAG (SYNC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

5.4.3.11 SWK_SET FLAG (SWK_SET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

5.4.4 SBC Modes for Selective Wake (SWK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

5.4.4.1 SBC Normal Mode with SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

5.4.4.2 SBC Stop Mode with SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

5.4.4.3 SBC Sleep Mode with SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

5.4.4.4 SBC Restart Mode with SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

5.4.4.5 SBC Fail-Safe Mode with SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

5.4.5 Wake-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

5.4.6 Configuration for SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

5.4.7 CAN Flexible Data Rate (CAN FD) Tolerant Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

5.4.8 Clock and Data Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

5.4.8.1 Configuring the Clock Data Recovery for SWK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

5.4.8.2 Setup of Clock and Data Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

5.4.9 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

6 Voltage Regulator 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

6.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

6.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

6.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

7 Voltage Regulator 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

7.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

7.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

7.2.1 Short to Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

7.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

8 External Voltage Regulator 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

8.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

8.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

8.2.1 External Voltage Regulator as Independent Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

8.2.2 External Voltage Regulator in Load Sharing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

8.3 External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

8.4 Calculation of R

8.5 Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

8.6 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

9 High-Side Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

9.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

9.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

9.2.1 Over- and Undervoltage Switch Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

SHUNT

Datasheet 3 Rev. 1.1

2019-09-27

TLE9261-3BQX

9.2.2 Overcurrent Detection and Switch Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

9.2.3 Open Load Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

9.2.4 HSx Operation in Different SBC Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

9.2.5 PWM and Timer Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

9.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

10 High Speed CAN Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

10.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

10.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

10.2.1 CAN OFF Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

10.2.2 CAN Normal Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

10.2.3 CAN Receive Only Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

10.2.4 CAN Wake Capable Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

10.2.5 TXD Time-out Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

10.2.6 Bus Dominant Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

10.2.7 Undervoltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

10.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

11 Wake and Voltage Monitoring Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

11.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

11.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

11.2.1 Wake Input Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

11.2.2 Alternate Measurement Function with WK1 and WK2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

11.2.2.1 Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

11.2.2.2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

11.3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

12 Interrupt Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

12.1 Block and Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

12.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

13 Fail Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

13.1 Block and Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

13.1.1 General Purpose I/O Functionality of FO2 and FO3 as Alternate Function . . . . . . . . . . . . . . . . . . . 109

13.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

14 Supervision Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

14.1 Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

14.1.1 Reset Output Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

14.1.2 Soft Reset Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

14.2 Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

14.2.1 Time-Out Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

14.2.2 Window Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

14.2.3 Watchdog Setting Check Sum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

14.2.4 Watchdog during SBC Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

14.2.5 Watchdog Start in SBC Stop Mode due to Bus Wake . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

14.3 VS Power On Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

14.4 Undervoltage VS and VSHS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

14.5 Overvoltage VSHS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

14.6 VCC1 Over-/ Undervoltage and Undervoltage Prewarning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

14.6.1 VCC1 Undervoltage and Undervoltage Prewarning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

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14.6.2 VCC1 Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

14.7 VCC1 Short Circuit and VCC3 Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

14.8 VCC2 Undervoltage and VCAN Undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

14.9 Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

14.9.1 Individual Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

14.9.2 Temperature Prewarning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

14.9.3 SBC Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

14.10 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

15 Serial Peripheral Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

15.1 SPI Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

15.2 Failure Signalization in the SPI Data Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

15.3 SPI Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

15.4 SPI Bit Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

15.5 SPI Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

15.5.1 General Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

15.5.2 Selective Wake Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

15.5.3 Selective Wake Trimming and Calibration Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168

15.6 SPI Status Information Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

15.6.1 General Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174

15.6.2 Selective Wake Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184

15.6.3 Family and Product Information Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187

15.7 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188

16 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190

16.1 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190

16.2 ESD Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195

16.3 Thermal Behavior of Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196

17 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 198

18 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

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TLE9261-3BQX

Overview

1 Overview

Scalable System Basis Chip Family

• Product family with various products for complete scalable application coverage.

• Dedicated Data Sheets are available for the different product variants

• Complete compatibility (hardware and software) across the family

• TLE9263 with 2 LIN transceivers, 3 voltage regulators

• TLE9262 with 1 LIN transceiver, 3 voltage regulators

• TLE9261 without LIN transceivers, 3 voltage regulators

• Product variants for 5V (TLE926xQX) and 3.3V (TLE926xQXV33) output voltage for main voltage regulator

• CAN Partial Networking variants for 5V (TLE926x-3QX) and 3.3V (TLE926x-3QXV33) output voltage

Device Description

The TLE9261-3BQX is a monolithic integrated circuit in an exposed pad VQFN-48 (7mm x 7mm) power package with Lead Tip Inspection (LTI) feature to support Automatic Optical Inspection (AOI). The device is designed for various CAN automotive applications as main supply for the microcontroller and as interface for a CAN bus network including the CAN Partial Networking feature.

To support these applications, the System Basis Chip (SBC) provides the main functions, such as a 5V lowdropout voltage regulator (LDO) for e.g. a microcontroller supply, another 5V low-dropout voltage regulator with off-board protection for e.g. sensor supply, another 5V/3.3V regulator to drive an external PNP transistor, which can be used as an independent supply for off-board usage or in load sharing configuration with the main regulator VCC1, a HS-CAN transceiver supporting CAN FD and CAN Partial Networking (incl. FD tolerant mode) for data transmission, high-side switches with embedded protective functions and a 16-bit Serial Peripheral Interface (SPI) to control and monitor the device. Also implemented are a configurable timeout / window watchdog circuit with a reset feature, three Fail Outputs and an undervoltage reset feature.

The device offers low-power modes in order to minimize current consumption on applications that are connected permanently to the battery. A wake-up from the low-power mode is possible via a message on the buses, via the bi-level sensitive monitoring/wake-up inputs as well as via cyclic wake.

The device is designed to withstand the severe conditions of automotive applications.

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TLE9261-3BQX

Overview

Product Features

• Very low quiescent current consumption in Stop- and Sleep Mode

• Periodic Cyclic Wake in SBC Normal- and Stop Mode

• Periodic Cyclic Sense in SBC Normal-, Stop- and Sleep Mode

• Low-Drop Voltage Regulator 5V, 250mA

• Low-Drop Voltage Regulator 5V, 100mA, protected features for off-board usage

• Low-Drop Voltage Regulator, driving an external PNP transistor - 5V in load sharing configuration or 5V/3.3V in stand-alone configuration, protected features for off-board usage. Current limitation by shunt resistor (up to 350mA with 470mΩ external shunt resistor) in stand-alone configuration

• High-Speed CAN Transceiver:

– fully compliant to HS-CAN standard ISO 11898-2:2016

– fully compliant to CAN Partial Networking including CAN FD tolerant feature (acc. ISO 11898-2:2016)

– supporting CAN FD communication up to 5 Mbps

• Fully compliant to “Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications” Revision 1.3, 2012-05-04

•Four High-Side Outputs 7Ω typ.

• Dedicated supply pin for High-Side Outputs

• Two General Purpose High-Voltage In- and Outputs (GPIOs) configurable as add. Fail Outputs, Wake Inputs, Low-Side switches or High-Side switches

• Three universal High-Voltage Wake Inputs for voltage level monitoring

• Alternate High-Voltage Measurement Function, e.g. for battery voltage sensing

• Configurable wake-up sources

• Reset Output

• Configurable timeout and window watchdog

• Up to three Fail Outputs (depending on configuration)

• Overtemperature and short circuit protection feature

• Wide supply input voltage and temperature range

• Software compatible to all SBC families TLE926x and TLE927x

• Green Product (RoHS compliant) & AEC Qualified

• PG-VQFN-48 leadless exposed-pad power package with Lead Tip Inspection (LTI) feature to support Automatic Optical Inspection (AOI)

Datasheet 7 Rev. 1.1

2019-09-27

CC1

SPI

Interrupt

Control

SBC

STATE

MACHINE

SDI

SDO

CLK

CSN

VCC1

CAN cell

Window W atchdog

TXDCAN

RXDCAN

VCAN

CANH

CANL

WK1

RESET

GENERATOR

INT

GND

WAKE

Fail Safe

FO3/TEST

FO2

FO1

CC2

VCC2

High Side

HS2

HS3 HS4

HS1

WK2

WK3

CC3

VCC3REF

VCC3SH

VCC3B

VSHS VS

Selective Wake

Logic

Alter nati ve funct ion for FO 2/3: GPIO1 /2

Alter native function for WK 1/2: Voltage measur ement

TLE9261-3BQX

Block Diagram

2 Block Diagram

Figure 1 Block Diagram with CAN Partial Networking

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TLE9261

PG-VQFN-48

TLE9261 .vsd

1 GND

2 n.c.

3 VCC3REF

4 VCC3B

5 VCC3SH

6 n.c.

7 n.c.

8 HS1

9 HS2

10 HS3

11 HS4

12 n. c.

FO3/TEST 48

FO2 47

n.c. 46

n.c. 45

N.U. 44

GND 43

N.U. 42

n.c. 41

CANH 40

CANL 39

GND 38

VCAN 37

13 VSHS

14 VS

15 VS

16 n.c.

17 VCC1

18 VCC2

19 n.c.

20 GND

21 FO1

22 WK1

23 WK2

24 WK3

25 N. U.

26 N. U.

27 CLK

28 SDI

29 SDO

30 CSN

31 INT

32 RO

33 N. U.

34 N. U.

35 TXDCAN

36 RXDCAN

TLE9261-3BQX

Pin Configuration

3 Pin Configuration

3.1 Pin Assignment

Figure 2 Pin Configuration

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Pin Configuration

3.2 Pin Definitions and Functions

Pin Symbol Function

1GND Ground

2n.c. not connected; internally not bonded.

3VCC3REF VCC3REF; Collector connection for external PNP, reference input

4VCC3B VCC3B; Base connection for external PNP

5VCC3SH VCC3SH; Emitter connection for external PNP, shunt connection

6n.c. not connected; internally not bonded.

7n.c. not connected; internally not bonded.

8HS1 High Side Output 1; typ. 7Ω

9HS2 High Side Output 2; typ. 7Ω

10 HS3 High Side Output 3; typ. 7Ω

11 HS4 High Side Output 4; typ. 7Ω

12 n.c not connected; internally not bonded.

13 VSHS Supply Voltage HS and GPIO1/2 in HS configuration; Supply voltage for High-

Side Switches modules and respective UV-/OV supervision; Connected to battery voltage with reverse protection diode and filter against EMC;

connect to VS if separate supply is not needed

14 VS Supply Voltage; Supply voltage for chip internal supply and voltage regulators;

Connected to Battery Voltage with external reverse protection Diode and Filter against EMC

15 VS Supply Voltage; Supply voltage for chip internal supply and voltage regulators;

Connected to Battery Voltage with external reverse protection Diode and Filter against EMC

16 n.c. not connected; internally not bonded.

17 VCC1 Voltage Regulator Output 1

18 VCC2 Voltage Regulator Output 2

19 n.c. not connected; internally not bonded.

20 GND GND

21 FO1 Fail Output 1

22 WK1 Wake Input 1; Alternative function: HV-measurement function input pin

(only in combination with WK2, see Chapter 11.2.2)

23 WK2 Wake Input 2; Alternative function: HV-measurement function output pin

(only in combination with WK1, see Chapter 11.2.2)

24 WK3 Wake Input 3

25 N.U. Not Used; Used for internal testing purpose. Do not connect, leave open

26 N.U. Not Used; Used for internal testing purpose. Do not connect, leave open

27 CLK SPI Clock Input

28 SDI

29 SDO SPI Data Output; out of SBC (=MISO)

Datasheet 10 Rev. 1.1

SPI Data Input; into SBC (=MOSI)

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Pin Configuration

Pin Symbol Function

30 CSN SPI Chip Select Not Input

31 INT Interrupt Output; used as wake-up flag for microcontroller in SBC Stop or Normal

Mode and for indicating failures. Active low. During start-up used to set the SBC configuration. External pull-up sets config 1/3, no external pull-up sets config 2/4.

32 RO Reset Output

33 N.U. Not Used; Used for internal testing purpose. Do not connect, leave open

34 N.U. Not Used; Used for internal testing purpose. Do not connect, leave open

35 TXDCAN Transmit CAN; alternate function: calibration of high-precision oscillator

36 RXDCAN Receive CAN

37 VCAN Supply Input; for internal HS-CAN cell

38 GND GND

39 CANL CAN Low Bus Pin

40 CANH CAN High Bus Pin

41 n.c. not connected; internally not bonded.

42 N.U. Not Used; Used for internal testing purpose. Do not connect, leave open

43 GND Ground

44 N.U. Not Used; Used for internal testing purpose. Do not connect, leave open

45 n.c. not connected; internally not bonded.

46 n.c. not connected; internally not bonded.

47 FO2 Fail Output 2 - Side Indicator; Side indicators 1.25Hz 50% duty cycle output;

Open drain. Active LOW. Alternative Function: GPIO1; configurable pin as WK, or LS, or HS supplied by VSHS (default is FO2, see also Chapter 13.1.1)

48 FO3/TEST Fail Output 3 - Pulsed Light Output; Break/rear light 100Hz 20% duty cycle

output; Open drain. Active LOW TEST; Connect to GND to activate SBC Development Mode; Integrated pull-up resistor. Connect to VS with pull-up resistor or leave open for normal operation. Alternative Function: GPIO2; configurable pin as WK, or LS, or HS supplied by VSHS (default is FO3, see also Chapter 13.1.1)

Coolin g Tab

1) The exposed die pad at the bottom of the package allows better power dissipation of heat from the SBC via the PCB.

No te: all V S Pins mus t be con necte d to battery potential or insert a reverse polarity diodes where required;

Datasheet 11 Rev. 1.1

GND Cooling Tab - Exposed Die Pad; For cooling purposes only, do not use as an

electrical ground.

The exposed die pad is not connected to any active part of the IC an can be left floating or it can be connected to GND (recommended) for the best EMC performance.

all GND pins as well as the Cooling Tab must be connected to one common GND potential; note that the tie bars at each package corner are connected to the cooling tab (see also Chapter 17)

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Pin Configuration

3.3 Hints for Unused Pins

It must be ensured that the correct configurations are also selected, i.e. in case functions are not used that they are disabled via SPI:

• WK1/2/3: connect to GND and disable WK inputs via SPI

• HSx: leave open

• CANH/L, RXDCAN, TXDCAN: leave all pins open

• RO / FOx: leave open

• INT: leave open

• TEST: connect to GND during power-up to activate SBC Development Mode; connect to VS or leave open for normal user mode operation

• VCC2: leave open and keep disabled

•VCC3: See

• VCAN: connect to VCC1

• n.c.: not connected; internally not bonded; connect to GND

• N.U.: Not Used; Used for internal testing purposes only. Do not connect, leave open, i.e. not connected to any potential on the board. In case N.U. pins are connected on the board an open bridge has to be foreseen to avoid external disturbances. The bridge can be shorted by a 0 Ω resistance if signal is needed.

Chapter 8.5

3.4 Hints for Alternate Pin Functions

In case of alternate pin functions, selectable via SPI, it must be ensured that the correct configurations are also selected via SPI, in case it is not done automatically. Please consult the respective chapter. In addition, following topics shall be considered:

• WK1..2: The pins can be either used as HV wake / voltage monitoring inputs or for a voltage measurement function (via bit detection nor cyclic sense functionality, i.e. WK1 and WK2 must be disabled in the register the level information is to be ignored in the register

• FO2..3: The pins can also be configured as GPIOs in the GPIO_CTRL register. In this case, the pins shall not be used for any fail output functionality. The default function after Power on Reset (POR) is FOx.

WK_MEAS). In the second case, the WK1..2 pins shall not be used / assigned for any wake

WK_CTRL_2 and

WK_LVL_STAT.

Datasheet 12 Rev. 1.1

2019-09-27

TLE9261-3BQX

General Product Characteristics

4 General Product Characteristics

4.1 Absolute Maximum Ratings

Table 1 Absolute Maximum Ratings

Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin

(unless otherwise specified)

Parameter Symbol Values Unit Note or

Min. Typ. Max.

Test Condition

Voltages

Supply Voltage (VS, VSHS) VS

x, max

-0.3 – 28 V – P_4.1.1

-0.3 – 40 V Load Dump, max. 400 ms

Voltage Regulator 1 V

Voltage Regulator 2 V

CC1, max

CC2, max

-0.3 – 5.5 V – P_4.1.3

-0.3 – 28 V V

= 40V for

CC2

Load Dump, max. 400 ms;

Voltage Regulator 3 (VCC3REF)

Voltage Regulator 3 (VCC3B) V

CC3REF,max

CC3B,max

-0.3 – 28 V V

-0.3 – VS

+ 10

V V

= 40V for

CC3REF

Load Dump, max. 400 ms;

= 40V for

CC3B

Load Dump, max. 400 ms;

Number

P_4.1.2

P_4.1.4

P_4.1.5

P_4.1.25

Voltage Regulator 3 (VCC3SH)

Wake Inputs WK1..3 V

Fail Pin FO1 V

Fail Pins FO2, FO3/TEST V

CANH, CANL V

Maximum Differential CAN Bus Voltage

Logic Input Pins (CSN, CLK, SDI, TXDCAN)

Logic Output Pins (SDO, RO, INT, RXDCAN)

VCAN Input Voltage V

High Side 1...4 V

Currents

Wake input WK1 I

Wake input WK2 I

CC3SH,max

WK, max

FO1, max

FO2_3, max

BUS, max

CAN_Diff, max

I, max

O, max

VCAN, max

HS, max

WK1,max

WK2,max

- 0.30

– V

+ 0.30

V – P_4.1.26

-0.3 – 40 V – P_4.1.6

-0.3 – 40 V – P_4.1.7

-0.3 – V

V – P_4.1.23

+ 0.3

-27 – 40 V – P_4.1.8

-5 – 10 V – P_4.1.27

-0.3 – V

CC1

V – P_4.1.9

+ 0.3

-0.3 – V

CC1

V – P_4.1.10

+ 0.3

-0.3 – 5.5 V – P_4.1.11

-0.3 – V

SHS

V – P_4.1.12

+ 0.3

0 – 500 µA

-500 – 0 µA

P_4.1.13

P_4.1.14

Datasheet 13 Rev. 1.1

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TLE9261-3BQX

General Product Characteristics

Table 1 Absolute Maximum Ratings1) (cont’d)

= -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin

(unless otherwise specified)

Parameter Symbol Values Unit Note or

Min. Typ. Max.

Test Condition

Number

Temperatures

Junction Temperature T

Storage Temperature T

stg

-40 – 150 °C – P_4.1.15

-55 – 150 °C – P_4.1.16

ESD Susceptibility

ESD Resistivity V

ESD Resistivity to GND, HSx V

ESD Resistivity to GND,

ESD,11

ESD,12

ESD,13

-2 – 2 kV HBM

-8 – 8 kV HBM

4)3)

P_4.1.17

P_4.1.18

P_4.1.19

CANH, CANL

ESD Resistivity to GND V

ESD Resistivity Pin 1,

ESD,21

ESD,22

-500 – 500 V CDM

-750 – 750 V CDM

P_4.1.20

P_4.1.21 12,13,24,25,36,37,48 (corner pins) to GND

1) Not subject to production test, specified by design.

2) Applies only if WK1 and WK2 are configured as alternative HV-measurement function

3) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS-001 (1.5 kΩ, 100 pF)

4) For ESD “GUN” Resistivity 6KV (according to IEC61000-4-2 “gun test” (150pF, 330Ω)), will be shown in Application

Information and test report will be provided from IBEE

5) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101 or ESDA STM5.3.1

Notes

1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation.

Datasheet 14 Rev. 1.1

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TLE9261-3BQX

General Product Characteristics

4.2 Functional Range

Table 2 Functional Range

Parameter Symbol Values Unit Note or

Test Condition

see

POR

Supply Voltage V

S,func

Min. Typ. Max.

POR

–28V1) V

Number

P_4.2.1

Chapter 14.10

CAN Supply Voltage V

SPI frequency f

CAN,func

SPI

4.75 – 5.25 V – P_4.2.3

– – 4 MHz see

P_4.2.4

Chapter 15.7 for

SPI,max

Junction Temperature T

1) Including Power-On Reset, Over- and Undervoltage Protection

-40 – 150 °C – P_4.2.5

Note: Within the functional range the IC operates as described in the circuit description. The electrical

characteristics are specified within the conditions given in the related electrical characteristics table.

Device Behavior Outside of Specified Functional Range:

• 28V < V

< 40V: Device will still be functional including the state machine; the specified electrical

S,func

characteristics might not be ensured anymore. The regulators VCC1/2/3 are working properly, however, a thermal shutdown might occur due to high power dissipation. HSx switches might be turned OFF depending on VSHS_OV configurations. The specified SPI communication speed is ensured; the absolute maximum ratings are not violated, however the device is not intended for continuous operation of VS >28V. The device operation at high junction temperatures for long periods might reduce the operating life time;

• V

< 4.75V: The undervoltage bit VCAN_UV will be set in the SPI register BUS_STAT_1 and the transmitter

CAN

will be disabled as long as the UV condition is present;

• 5.25V < V

< 5.50V: CAN transceiver still functional. However, the communication might fail due to out-of-

CAN

spec operation;

•V

< VS < 5.5V: Device will still be functional; the specified electrical characteristics might not be ensured

POR,f

anymore.

– The voltage regulators will enter the low-drop operation mode

(applies for VCC3 only if bit VCC3_VS_ UV_OFF is set),

– A VCC1_UV reset could be triggered depending on the Vrtx settings,

– HSx switch behavior will depend on the respective configuration:

- HS_UV_SD_EN = ‘0’ (default): HSx will be turned OFF for VSHS < VSHS_UV and will stay OFF;

- HS_UV_SD_EN = ‘1’ : HSx st ays on a s lo ng as po ssible . An unw ant ed over curren t shut d own may occ ur. OC shut down bit set and the respective HSx switch will stay OFF;

– FOx outputs will remain ON if they were enabled before VS > 5.5V,

– The specified SPI communication speed is ensured.

Datasheet 15 Rev. 1.1

2019-09-27

TLE9261-3BQX

General Product Characteristics

4.3 Thermal Resistance

Table 3 Thermal Resistance

Parameter Symbol Values Unit Note or

Junction to Soldering Point R

Junction to Ambient R

1) Not subject to production test, specified by design.

2) According to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board for 1.5W. Board: 76.2x114.3x1.5mm3 with

2 inner copper layers (35µm thick), with thermal via array under the exposed pad contacting the first inner copper layer and 300mm2 cooling area on the bottom layer (70µm).

thJSP

thJA

Number

Min. Typ. Max.

–6–K/WExposed PadP_4.3.1

–33–K/W

Test Condition

P_4.3.2

Datasheet 16 Rev. 1.1

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TLE9261-3BQX

General Product Characteristics

4.4 Current Consumption

Table 4 Current Consumption

Current consumption values are specified at Tj = 25°C, VS = 13.5V, all outputs open (unless otherwise specified)

Parameter Symbol Values Unit Note or

Min. Typ. Max.

Test Condition

SBC Normal Mode

Normal Mode current consumption

Normal

–3.56.5mAVS = 5.5 V to 28 V;

= -40 °C to +150 °C;

VCC2, CAN, VCC3, HSx = OFF

SBC Stop Mode

Stop Mode current consumption

Stop_1,25

–4460µA1)VCC2/3, HSx = OFF;

, WKx not wake

CAN capable; Watchdog = OFF; no load on VCC1;

I_PEAK_TH = ‘0’

Stop Mode current consumption

Stop_1,85

–5070µA

1)3)

Tj = 85°C;

VCC2/3, HSx = OFF;

CAN

, WKx not wake capable; Watchdog = OFF; no load on VCC1;

I_PEAK_TH = ‘0’

Number

P_4.4.1

P_4.4.2

P_4.4.3

Stop Mode current consumption (high active peak threshold)

SBC Sleep Mode

Sleep Mode current consumption

Stop_2,25

Stop_2,85

Sleep,25

Sleep,85

–6490µA1)VCC2/3, HSx = OFF;

CAN

, WKx not wake capable; Watchdog = OFF; no load on VCC1;

I_PEAK_TH = ‘1’

– 70 100 µA

1)3)

Tj = 85°C;

VCC2/3, HSx = OFF;

CAN

, WKx not wake capable; Watchdog = OFF; no load on VCC1;

I_PEAK_TH = ‘1’

– 15 25 µA VCC2/3, HSx = OFF;

, WKx not wake

CAN capable

–2535µA3)Tj = 85°C;

VCC2/3, HSx = OFF;

, WKx not wake

CAN capable

P_4.4.35

P_4.4.36

P_4.4.5

P_4.4.6

Datasheet 17 Rev. 1.1

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TLE9261-3BQX

General Product Characteristics

Table 4 Current Consumption (cont’d)

Current consumption values are specified at Tj = 25°C, VS = 13.5V, all outputs open (unless otherwise specified)

Parameter Symbol Values Unit Note or

Min. Typ. Max.

Test Condition

Feature Incremental Current Consumption

Current consumption for CAN module, recessive state

CAN,rec

–23mASBC Normal/Stop

Mode; CAN Normal Mode; VCC1 connected to VCAN; VTXDCAN = VCC1; no RL on CAN

Current consumption for CAN module, dominant state

CAN,dom

–34.5mA3)SBC Normal/Stop

Mode; CAN Normal Mode; VCC1 connected to VCAN; VTXDCAN = GND; no RL on CAN

Current consumption for CAN module, Receive Only Mode

CAN,RcvOnly

–0.91.2mA

3)4)

SBC Normal/Stop Mode; CAN Receive Only Mode; VCC1 connected to VCAN; VTXDCAN = VCC1; no RL on CAN

Current consumption during CAN Partial Networking frame detect mode (RX_WK_ SEL = ‘1’)

CAN,SWK,25

– 560 690 µA

Tj = 25°C;

SBC Stop Mode; VCC2, HSx = OFF; WKx not wake capable; CAN SWK wake capable, SWK Receiver enabled, WUF detect; no RL on CAN

Current consumption during CAN Partial Networking frame detect mode (RX_WK_ SEL = ‘1’)

CAN,SWK,85

– 600 720 µA

Tj = 85°C;

SBC Stop Mode; VCC2, HSx = OFF; WKx not wake capable; CAN SWK wake capable, SWK Receiver enabled, WUF detect; no RL on CAN

Current consumption for WK1..3 wake capability (all wake inputs)

Wake,WKx,25

–0.22µA

5)6)7)

SBC Sleep Mode; WK1..3 wake capable (all WKx enabled); CAN = OFF

Number

P_4.4.7

P_4.4.8

P_4.4.9

P_4.4.4

P_4.4.29

P_4.4.13

Datasheet 18 Rev. 1.1

2019-09-27

TLE9261-3BQX

General Product Characteristics

Table 4 Current Consumption (cont’d)

Current consumption values are specified at Tj = 25°C, VS = 13.5V, all outputs open (unless otherwise specified)

Parameter Symbol Values Unit Note or

Test Condition

3)5)6)7)

SBC Sleep Mode; T WK1..3 wake capable;

Current consumption for WK1..3 wake capability (all wake inputs)

Wake,WKx,85

Min. Typ. Max.

–0.53µA

(all WKx enabled); CAN = OFF

Current consumption for CAN wake capability (tsilence expired)

Wake,CAN,25

Wake,CAN,85

–4.56µA

–5.57µA

2)5)

SBC Sleep Mode; CAN wake capable; WK1..3

2)3)5)

SBC Sleep Mode;

= 85°C;

CAN wake capable; WK1..3

VCC2 Normal Mode current consumption

Normal,VCC2

–2.53.5mAVS = 5.5 V to 28 V;

= -40 °C to +150 °C;

VCC2 = ON (no load)

Current consumption for VCC2 in SBC Sleep Mode

Sleep,VCC2,25

Sleep,VCC2,85

–2535µA

–3040µA

1)5)

SBC Sleep Mode; VCC2 = ON (no load); CAN, WK1..3 = OFF

1)3)5)

SBC Sleep Mode;

= 85°C; VCC2 = ON

(no load); CAN, WK1..3 = OFF

Current consumption for VCC3 in SBC Sleep Mode in stand-alone configuration

Sleep,VCC3,25

–4060µA

1)5)

SBC Sleep Mode; VCC3 = ON (no load, stand-along config.); CAN, WK1..3 = OFF

Current consumption for VCC3 in SBC Sleep Mode in stand-alone configuration

Sleep,VCC3,85

–5070µA

1)3)5)

SBC Sleep Mode;

= 85°C; VCC3 = ON

(no load, stand-along config.); CAN, WK1..3 = OFF

Current consumption for HSx in SBC Stop Mode

Stop,HSx,25

– 550 675 µA

5)8)

SBC Stop Mode; Cyclic Sense & HSx= ON (no load); CAN, WK1..3 = OFF

= 85°C;

Number

P_4.4.14

P_4.4.17

P_4.4.18

P_4.4.32

P_4.4.19

P_4.4.20

P_4.4.21

P_4.4.22

P_4.4.33

Datasheet 19 Rev. 1.1

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TLE9261-3BQX

General Product Characteristics

Table 4 Current Consumption (cont’d)

Current consumption values are specified at Tj = 25°C, VS = 13.5V, all outputs open (unless otherwise specified)

Parameter Symbol Values Unit Note or

Test Condition

3)5)8)

SBC Stop Mode;

= 85°C;

Current consumption for HSx in SBC Stop Mode

Stop,HSx,85

Min. Typ. Max.

– 575 700 µA

Number

P_4.4.34

Cyclic Sense & HSx = ON (no load); CAN, WK1..3 = OFF

Current consumption for cyclic sense function

Stop,CS25

Stop,CS85

–2028µA

–2435µA

5)9)10)

SBC Stop Mode;

WD = OFF

3)5)9)10)

SBC Stop Mode;

= 85°C;

P_4.4.23

P_4.4.27

WD = OFF

Current consumption for watchdog active in Stop

Stop,WD25

–2028µA3)SBC Stop Mode;

Watchdog running

P_4.4.30

Mode

Current consumption for watchdog active in Stop Mode

Current consumption for active fail outputs (FO1..3)

Stop,WD85

Stop,FOx

–2435µA3)SBC Stop Mode;

= 85°C;

Watchdog running

–1.02.0mA3)all SBC Modes;

= 25°C; FOx = ON (no

P_4.4.31

P_4.4.24

load);

1) If the load current on VCC1 will exceed the configured VCC1 active peak threshold I the current consumption will increase by typ. 2.9mA to ensure optimum dynamic load behavior. Same applies to VCC2. For VCC3 the current consumption will increase by typ. 1.4mA. See also Chapter 6, Chapter 7, Chapter 8.

2) CAN not configured in selective wake mode.

3) Not subject to production test, specified by design.

4) Current consumption adder also applies for during WUF detection (frame detect mode) when CAN Partial Networking is activated.

5) Current consumption adders of features defined for SBC Sleep Mode also apply for SBC Stop Mode and vice versa (unless otherwise specified).

6) No pull-up or pull-down configuration selected.

7) The specified WKx current consumption adder for wake capability applies regardless how many WK inputs are activated.

8) A typ. 75µA / max 125µA (T In SBC Normal Mode every HSx switch consumes the typ. 75µA / max 125µA (T because the biasing is already enabled.

9) HS1 used for cyclic sense, Timer 2, 20ms period, 0.1ms on-time, no load on HS1.

= 85°C) adder applies for every additionally activated HSx switch in SBC Stop Mode;

VCC1,Ipeak1,r

= 85°C) without the initial adder

or I

VCC1,Ipeak2,r

In general the current consumption adder for cyclic sense in SBC Stop Mode can be calculated with below equation: IStop,CS = 18µA + (550µA *tON/TPer)

10) Also applies to Cyclic Wake

Note: There is no additional current consumption contribution due to PWM generators.

Datasheet 20 Rev. 1.1

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TLE9261-3BQX

System Features

5 System Features

This chapter describes the system features and behavior of the TLE9261-3BQX:

• State machine

• SBC mode control

• Device configuration

• State of supply and peripherals

• System functions such as cyclic sense or cyclic wake

• Supervision and diagnosis functions

The System Basis Chip (SBC) offers six operating modes:

• SBC Init Mode: Power-up of the device and after a soft reset,

• SBC Normal Mode: The main operating mode of the device,

• SBC Stop Mode: The first-level power saving mode with the main voltage regulator VCC1 enabled,

• SBC Sleep Mode: The second-level power saving mode with VCC1 disabled,

• SBC Restart Mode: An intermediate mode after a wake event from SBC Sleep or Fail-Safe Mode or after a failure (e.g. WD failure, VCC1 undervoltage reset) to bring the microcontroller into a defined state via a reset. Once the failure condition is not present anymore the device will automatically change to SBC Normal Mode after a delay time (

• SBC Fail-Safe Mode: A safe-state mode after critical failures (e.g. WD failure, VCC1 undervoltage reset) to bring the system into a safe state and to ensure a proper restart of the system. VCC1 is disabled. It is a permanent state until either a wake event (via CAN or WKx) occurs or the overtemperature condition is not present anymore.

RD1

A special mode, called SBC Development Mode, is available during software development or debugging of the system. All above mentioned operating modes can be accessed in this mode. However, the watchdog counter is stopped and does not need to be triggered. This mode can be accessed by setting the TEST pin to GND during SBC Init Mode.

The device can be configured via hardware (external component) to determine the device behavior after a watchdog trigger failure. See Chapter 5.1.1 for further information.

The System Basis Chip is controlled via a 16-bit SPI interface. A detailed description can be found in

Chapter 15.The configuration as well as the diagnosis is handled via the SPI. The SPI mapping of the TLE9261-

3BQX is compatible to other devices of the TLE926x and TLE927x families.

Datasheet 21 Rev. 1.1

2019-09-27

SBC Init M ode *

(Long open window )

VCC1ONVCC2

OFF

VCC3

OFF

FOx

inact.

CAN

(3)

OFF

Wake up event

SPI cmd SPI cmd

SPI cmd

Any SPI

command

WD trigger

First battery connection

VCC1

Unde rvoltag e

Automatic

1s t Wa tch dog Fai lure Co nfig 2, 2nd Watchdog Failure, Config 4

VCC1 Short to GND

SBC Soft Reset

 Reset is released  WD starts with long open window

(1)

Afte r Fail-Saf e Mode entr y, the devi ce will sta y for at least typ. 1 s in this m ode (with RO low) af ter a TSD2 ev ent and min. ty p. 100ms a fter other Fail-Safe E vents. Only then the d evice can l eave the mod e via a wak e-up event . Wake eve nts are sto red during thi s time.

(2)

acco rding to VC C3 configura tion.

(3)

For SBC Develop ment Mode CAN/VCC2 are ON in SBC Init Mode and st ay ON when g oing from there to SBC N ormal Mode.

(4)

See chapt er CAN for detailed beha vior in SBC Restart Mode.

(5)

CAN t ransceiver c an be S WK capable, depending o n confi guration.

(6)

See C hapter 5.1. 5 and 13.1 for detail ed FOx behav ior.

(7)

Must be set to CA N wake cap able / CAN OFF mode bef ore enteri ng SBC Sleep Mode.

Confi g.

HSx OFF

SBC Normal Mode

VCC1ONVCC2

config.

VCC3 config.

FOx

act/inact

CAN

(3)

config.

HSx

config.

SBC Sleep Mode

VCC1

OFF

VCC2

fixed

FOx fixed

CAN

(5)(7)

Wake

capable /off

OFF.

HSx

fixed

SBC Stop Mode

VCC1ONVCC2

fixed

VCC3

fixed

FOx

fixed

CAN

(5)

fixed

HSx

fixed

SBC Re start Mode

(RO pin is asserted)

VCC1

ON/

ramping

VCC2

OFF

FOx

(6)

active /

fixed

CAN

(4)

woken /

OFF

HSx OFF

SBC Fail-Safe Mod e

(1)

VCC1

OFF

VCC2

OFF

VCC3

OFF

FOx

(6)

active

CAN

Wake

capable

OFF

HSx OFF

Config.: settings can be changed in this SBC mode;

Fixed: settings stay as defined in SBC Normal Mode

TSD2 event,

VCC3

(2)

fixed/

ramping

VCC3

(2)

Fixed /

OFF

* The SBC Development

Mode is a super set of state

machine where the WD timer

is stopped and CAN behavior

differs in SBC Init Mode.

Otherwise, there are no differences in behavior.

Cyc. Wake

OFF

Cyc. Sense

OFF

Cyc. Wake

config.

Cyc. Sense

config.

Cyc. Wake

fixed

Cyc. Sense

fixed

Cyc. Wake

OFF

Cyc. Sense

fixed

Cyc. Wake

OFF

Cyc. Sense

OFF

Cyc. Wake

OFF

Cyc. Sense

OFF

CAN, WKx wa ke-up event

Relea se of o ver tem perat ure

TSD2 after t

TSD2

VCC1 over voltage

Config 2/4 (if VCC_OV_RST set)

VCC1 over voltage

Config 1/3 (if VCC_OV_RST set)

Watchdog Failure:

Config 1/3 & 1st WD failure

in Config4

After 4x consecutive VCC1

under voltage eve nts

(if VS > VS_UV)

TLE9261-3BQX

System Features

5.1 Block Description of State Machine

The different SBC Modes are selected via SPI by setting the respective SBC MODE bits in the register

M_S_CTRL. The SBC MODE bits are cleared when going through SBC Restart Mode and thus always show the

current SBC mode.

Figure 3 State Diagram showing the SBC Operating Modes including CAN Partial Networking

Datasheet 22 Rev. 1.1

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TLE9261-3BQX

System Features

5.1.1 Device Configuration and SBC Init Mode

The SBC starts up in SBC Init Mode after crossing the power-on reset V and the watchdog will start with a long open window (t During this power-on phase following configurations are stored in the device:

• The device behavior regarding a watchdog trigger failure and a VCC1 overvoltage condition is determined by the external circuitry on the INT pin (see below)

• The selection of the normal device operation or the SBC Development Mode (watchdog disabled for debugging purposes) will be set depending on the voltage level of the FO3/TEST pin (see also

threshold (see also Chapter 14.3)

POR,r

Chapter 5.1.7).

5.1.1.1 Device Configuration

The configuration selection is intended to select the SBC behavior regarding a watchdog trigger failure. Depending on the requirements of the application, the VCC1 output shall be switched OFF and the device shall go to SBC Fail-Safe Mode in case of a watchdog failure (1 or 2 fails). To set this configuration (Config 2/4), the INT pin does not need an external pull-up resistor. In case VCC1 should not be switched OFF (Config 1/3), the INT pin needs to have an external pull-up resistor connected to VCC1 (see application diagram in

Chapter 16.1). Figure 5 shows the timing diagram of the hardware configuration selection. The hardware configuration is

defined during SBC Init Mode. The INT pin is internally pulled LOW with a weak pull-down resistor during the reset delay time t pin is monitored during this time (with a continuos filter time of t the voltage level at INT) is stored at the rising edge of RO.

, i.e.after VCC1 crosses the reset threshold VRT1 and before the RO pin goes HIGH. The INT

RD1

) and the configuration (depending on

CFG_F

Note: If the POR bit is not cleared then the internal pull-down resistor will be reactivated every time RO is

pulled LOW the configuration will be updated at the rising edge of RO. Therefore it is recommended to clear the POR bit right after initialization. In case there is no stable signal at INT, then the default value ‘0’ will taken as the config select value = SBC Fail-Safe Mode.

Datasheet 23 Rev. 1.1

2019-09-27

VCC1

POR,r

RD1

RT1,r

CFG_F

Configuration selection monitoring period

Continuous Filtering with

TLE9261-3BQX

System Features

Figure 4 Hardware Configuration Selection Timing Diagram

There are four different device configurations (Table 5) available defining the watchdog failure and the VCC1 overvoltage behavior. The configurations can be selected via the external connection on the INT pin and the SPI bit CFG in the HW_CTRL register (see also Chapter 15.4):

• CFGP = ‘1’: Config 1 and Config 3:

– A watchdog trigger failure leads to SBC Restart Mode and depending on CFG the Fail Outputs (FOx) are

activated after the 1st (Config 1) or 2nd (Config 3) watchdog trigger failure;

– A VCC1 overvoltage detection will lead to SBC Restart Mode if VCC1_OV_RST is set.

VCC1_ OV will be set and the Fail Outputs are activated;

• CFGP = ‘0’: Config 2 and Config 4:

– A watchdog trigger failure leads to SBC Fail-Safe Mode and depending on CFG the Fail Outputs (FOx)

are activated after the 1st (Config 2) or 2nd (Config 4) watchdog trigger failure. The first watchdog trigger failure in Config 4 will lead to SBC Restart Mode;

– A VCC1 overvoltage detection will lead to SBC Fail-Safe Mode if VCC1_OV_RST is set.

VCC1_ OV will be set and the Fail Outputs are activated;

The respective device configuration can be identified by reading the SPI bit CFG in the HW_CTRL register and the CFGP bit in the WK_LVL_STAT register.

Table 5 shows the configurations and the device behavior in case of a watchdog trigger failure:

Table 5 Watchdog Trigger Failure Configuration

Config INT Pin (CFGP)SPI Bit CFG Event FOx Activation SBC Mode Entry

1 External pull-up 1 1 x Watchdog Failure after 1st WD Failure SBC Restart Mode

2 No ext. pull-up 1 1 x Watchdog Failure after 1st WD Failure SBC Fail-Safe Mode

3 External pull-up 0 2 x Watchdog Failure after 2nd WD Failure SBC Restart Mode

4 No ext. pull-up 0 2 x Watchdog Failure after 2nd WD Failure SBC Fail-Safe Mode

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System Features

Table 6 shows the configurations and the device behavior in case of a VCC1 overvoltage detection when VCC1_OV_RST is set:

Table 6 Device Behavior in Case of VCC1 Overvoltage Detection

Config INT Pin (CFGP) CFG Bit VCC1_O

V_RST

1-4 any value x 0 1 x VCC1 OV 1 no FOx activation unchanged

1 External pull-

2No ext. pull-up1 1 1 x VCC1 OV 1after 1st VCC1 OV SBC Fail-Safe Mode

3 External pull-

4No ext. pull-up0 1 1 x VCC1 OV 1after 1st VCC1 OV SBC Fail-Safe Mode

The respective configuration will be stored for all conditions and can only be changed by powering down the device (VS < V

POR,f

1 1 1 x VCC1 OV 1 after 1st VCC1 OV SBC Restart Mode

0 1 1 x VCC1 OV 1 after 1st VCC1 OV SBC Restart Mode

Event VCC1_

FOx Activation SBC Mode Entry

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System Features

5.1.1.2 SBC Init Mode

In SBC Init Mode, the device waits for the microcontroller to finish its startup and initialization sequence. In the SBC Init Mode any valid SPI command will bring the SBC to SBC Normal Mode. During the long open window the watchdog has to be triggered. Thereby the watchdog will be automatically configured.

A missing watchdog trigger during the long open window will cause a watchdog failure and the device will enter SBC Restart Mode.

Wake events are ignored during SBC Init Mode and will therefore be lost.

Note: Any SPI command will bring the SBC to SBC Normal Mode even if it is a illegal SPI command (see

Chapter 15.2).

Note: For a safe start-up, it is recommended to use the first SPI command to trigger and to configure the

watchdog (see Chapter 14.2).

Note: At power up no VCC1_UV will be issued nor will FOx be triggered as long as VCC1 is below the V

threshold and if VS is below the VCC1 short circuit detection threshold V low as long as VCC1 is below the selected V

threshold.

RT,x

. The RO pin will be kept

S,UV

RT,x

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System Features

5.1.2 SBC Normal Mode

The SBC Normal Mode is the standard operating mode for the SBC. All configurations have to be done in SBC Normal Mode before entering a low-power mode (see also Chapter 5.1.6 for the device configuration defining the Fail-Safe Mode behavior). A wake-up event on CAN and WKx will create an interrupt on pin INT - however, no change of the SBC mode will occur. The configuration options are listed below:

• VCC1 is active

• VCC2 can be switched ON or OFF (default = OFF)

• VCC3 is configurable (OFF coming from SBC Init Mode; as previously programmed coming from SBC Restart Mode)

• CAN is configurable (OFF coming from SBC Init Mode; OFF or wake capable coming from SBC Restart Mode, see also Chapter 5.1.5)

• HS Outputs can be switched ON or OFF (default = OFF) or can be controlled by PWM; HS Outputs are OFF coming from SBC Restart Mode

• Wake pins show the input level and can be selected to be wake capable (interrupt)

• Cyclic sense can be configured with HS1...4 and Timer1 or Timer 2

• Cyclic wake can be configured with Timer1 or Timer2

• Watchdog is configurable

• All FOx outputs are OFF by default. Coming from SBC Restart Mode FOx can be active (due to a failure event, e.g. watchdog trigger failure, VCC1 short circuit, etc.) or inactive (no failure occurred)

In SBC Normal Mode, there is the possibility of testing the FO outputs, i.e. to verify if setting the FO pin to low will create the intended behavior within the system. The FO output can be enabled and then disabled again by the microcontroller by setting the FO_ON SPI bit. This feature is only intended for testing purposes.

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System Features

5.1.3 SBC Stop Mode

The SBC Stop Mode is the first level technique to reduce the overall current consumption by setting the voltage regulators VCC1, VCC2 and VCC3 into a low-power mode. In this mode VCC1 is still active and supplying the microcontroller, which can enter a power down mode. The VCC2 supply, CAN mode as well as the HSx outputs can be configured to stay enable d. All kind o f se ttings hav e to be d one before en tering SBC Sto p Mo de. In SBC Stop Mode any kind of SPI WRITE commands are ignored and the SPI_FAIL bit is set, except for changing to SBC Normal Mode, triggering a SBC Soft Reset, refreshing the watchdog as well as for reading and clearing the SPI status registers. A wake-up event on CAN and WKx will create an interrupt on pin INT however, no change of the SBC mode will occur. The configuration options are listed below:

• VCC1 is ON

• VCC2 is fixed as configured in SBC Normal Mode

• VCC3 is fixed as configured in SBC Normal Mode

• CAN mode is fixed as configured in SBC Normal Mode

• WK pins are fixed as configured in SBC Normal Mode

• HS Outputs are fixed as configured in SBC Normal Mode

• Cyclic sense is fixed as configured in SBC Normal Mode

• Cyclic wake is fixed as configured in SBC Normal Mode

• Watchdog is fixed as configured in SBC Normal Mode

• SBC Soft Reset can be triggered

• FOx outputs are fixed, i.e. the state from SBC Normal Mode is maintained

An interrupt is triggered on the pin INT when SBC Stop Mode is entered and not all wake source signalization flags from WK_STAT_1 and WK_STAT_2 were cleared.

Note: If switches are enabled during SBC Stop Mode, e.g. HSx on with or without PWM, then the SBC current

consumption will increase (see Chapter 4.4).

Note: It is not possible to switch directly from SBC Stop Mode to SBC Sleep Mode. Doing so will also set the

SPI_FAIL flag and will bring the SBC into Restart Mode.

Note: When WK1 and WK2 are configured for the alternate measurement function (WK_MEAS = 1) then the

wake inputs cannot be selected as wake input sources.

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System Features

5.1.4 SBC Sleep Mode

The SBC Sleep Mode is the second level technique to reduce the overall current consumption to a minimum needed to react on wake-up events or for the SBC to perform autonomous actions (e.g. cyclic sense). In this mode, VCC1 is OFF and not supplying the microcontroller anymore.The VCC2 supply as well as the HSx outputs can be configured to stay enabled. The settings have to be done before entering SBC Sleep Mode. A wake-up event on CAN or WKx will bring the device via SBC Restart Mode into SBC Normal Mode again and signal the wake source. The configuration options are listed below:

• VCC1 is OFF

• VCC2 is fixed as configured in SBC Normal Mode

• VCC3 is fixed or OFF as configured in SBC Normal Mode

• CAN mod e changes automati cally from ON or Receive Only Mode t o wake capab le mode or can be selected to be OFF

• CAN must be set to CAN wake capable / CAN off mode before entering SBC Sleep Mode

• WK pins are fixed as configured in SBC Normal Mode

• HS Outputs are fixed as configured in SBC Normal Mode

• Cyclic sense is fixed as configured in SBC Normal Mode

• Cyclic wake is not available

• Watchdog is OFF

• FOx outputs are fixed, i.e. the state from SBC Normal Mode is maintained

• As VCC1 is OFF during SBC Sleep Mode, no SPI communication is possible;

• The Sleep Mode entry is signalled in the SPI register DEV_STAT with the bit DEV_STAT

It is not possible to switch all wake sources off in SBC Sleep Mode. Doing so will set the SPI_FAIL flag and will bring the SBC into SBC Restart Mode.

In order to enter SBC Sleep Mode successfully, all wake source signalization flags from WK_STAT_1 and

WK_STAT_2 need to be cleared. A failure to do so will result in an immediate wake-up from SBC Sleep Mode

by going via SBC Restart to Normal Mode.

All settings must be done before entering SBC Sleep Mode.

Note: If switches are enabled during SBC Sleep mode, e.g. HSx on with or without PWM, then the SBC

current consumption will increase (see Chapter 4.4).

Note: Cyclic Sense function will not work properly anymore in case of an overcurrent, overtemperature,

under- or overvoltage (in case function is selected) event because the respective HS switch will be disabled.

Note: When WK1 and WK2 are configured for the alternate measurement function (WK_MEAS = 1) then the

wake inputs cannot be selected as wake input sources.

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System Features

5.1.5 SBC Restart Mode

There are multiple reasons to enter the SBC Restart Mode. The purpose of the SBC Restart Mode is to reset the microcontroller:

• in case of undervoltage on VCC1 in SBC Normal and in SBC Stop Mode,

• in case of overvoltage on VCC1 if the bit

• due to 1st incorrect Watchdog triggering (only if Config1, Config3 or Config 4 is selected, otherwise SBC FailSafe Mode is immediately entered),

• In case of a wake event from SBC Sleep or SBC Fail-Safe Mode or a release of overtemperature shutdown (TSD2) out of SBC Fail-Safe Mode this transition is used to ramp up VCC1 after a wake in a defined way.

From SBC Restart Mode, the SBC goes automatically to SBC Normal Mode, i.e the mode is left automatically by the SBC without any microcontroller influence. The SBC MODE bits are cleared. As shown in Figure 46 the Reset Output (RO) is pulled low when entering Restart Mode and is released at the transition to Normal Mode after the reset delay time (t moment of the rising edge of RO and the watchdog period setting in the register WD_CTRL will be changed to the respective default value ‘100’.

). The watchdog timer will start with a long open window starting from the

RD1

VCC1_OV_RST is set and if CFGP = ‘1’,

Leaving the SBC Restart Mode will not result in changing / deactivating the Fail outputs.

The behavior of the blocks is listed below:

• All FOx outputs are activated in case of a 1st watchdog trigger failure (if Config1 or Config2 is selected) or in case of VCC1 overvoltage detection (if

• VCC1 is ON or ramping up

• VCC2 will be disabled if it was activated before

• VCC3 is fixed or ramping as configured in SBC Normal Mode

• CAN is “woken” due to a wake event or OFF depending on previous SBC and transceiver mode (see also

Chapter 10). It is wake capable when it was in CAN Normal-, Receive Only or wake capable mode before

SBC Restart Mode

• HS Outputs will be disabled if they were activated before

• RO is pulled low during SBC Restart Mode

• SPI communication is ignored by the SBC, i.e. it is not interpreted

• The Restart Mode entry is signalled in the SPI register DEV_STAT with the bits DEV_STAT

Table 7 Reasons for Restart - State of SPI Status Bits after Return to Normal Mode

Prev. SBC Mode Event DEV_STAT WD_FAIL VCC1_UV VCC1_OV VCC1_SC

Normal 1x Watchdog Failure 01 01 x x x

Normal 2x Watchdog Failure 01 10 x x x

VCC1_OV_RST is set)

Normal VCC1 undervoltage reset 01 xx 1 x x

Normal VCC1 overvoltage reset 01 xx x 1 x

Stop 1x Watchdog Failure 01 01 x x x

Stop 2x Watchdog Failure 01 10 x x x

Stop VCC1 undervoltage reset 01 xx 1 x x

Stop VCC1 overvoltage reset 01 xx x 1 x

Sleep Wake-up event 10 xx x x x

Fail-Safe Wake-up event 01 see “Reasons for Fail Safe, Table 8”

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