现货库存、技术资料、百科信息、热点资讯，精彩尽在鼎好!
Data Sheet TLE6282G
Dual Half Bridge Driver IC
Features
•
Compatible to very low ohmic normal
level input N-Channel MOSFETs
•
Separate input for each MOSFET
•
PWM frequency up to 50 kHz
•
Operates down to 7.5V
supply voltage
•
Low EMC sensitivity and emission
•
Adjustable dead time with shoot through protection
•
Deactivation of dead time and shoot through protection possible
•
Short circuit protection for each Mosfet
•
Driver undervoltage shut down
•
Reverse polarity protection for the driver IC
•
Disable function
•
Input with TTL characteristics
•
1 bit diagnosis
•
Integrated bootstrap diodes
Product Summary
Turn on current I
Turn off current I
Supply voltage range V
Gxx(on)
Gxx(off)
Vs
850 mA
580 mA
7.5 … 60 V
Gate Voltage VGS 10 V
Temperature range T
J
-40...+150 °C
P-DSO 20
Application
•
Dedicated for DC-brush high current motor bridges in PWM control mode and adapted for use in injector and
valve applications for 12, 24 and 42V powernet applications. Useable as four fold lowside driver for unipolar 4
phase motor drives.
•
The two half bridges can operate independently. The two half bridges can even operate at different supply
voltages.
General Description
Dual half bridge driver IC for MOSFET power stages with multiple protection functions.
Block Diagram
Charge Pump
Undervoltage HSx
OR
Undervoltage LSx
Short Circuit Detection
Level
Shift
Floating HS Driver 1
+
limitation HS1
V
GS
+
Short circuit
detect.
+
Undervoltage
Floating HS Driver 2
+
limitation HS2
V
GS
+
Short circuit
detect.
+
Undervoltage
Floating LS Driver 1
+
limitation LS1
V
GS
+
Short circuit
detect.
+
Undervoltage
Floating LS Driver 2
+
limitation LS2
V
GS
+
Short circuit
detect.
+
Undervoltage
V
S
GND
IH1
IL1
IH2
IL2
DT/DIS
ERR
Linear
Regulator
INH
HS1
Input control
Dead time
Undervoltage
Short circuit Detect.
LS1
HS2
LS2
BH1
BH2
DH1
GH1
SCD
SH1
DH2
GH2
SCD
SH2
DL1
GL1
SCD
DL2
GL2
SCD
1 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Application Block Diagram – Injector / Valve Drive
Watchdog
I
R
10 Ω
C
S
47µF
C
S
1µF
VS=12V
R
47 kΩ
Reset
Q
C
Q
22µF
Q
TLE
4278G
D
C
D
47nF
WD R V
µC
CC
R
47 kΩ
VS
ER1
Q
DT/
DIS
IH1
IL1
IH2
IL2
BH1
DH1
GH1
SH1
BH2
DH2
GH2
SH2
DL1
GL1
DL2
GL2
C
B
220nF
Load 1
C
B
220nF
Load 2
GND
This application diagram shows the principle schematics of a typical injector / valve drive. Other
configurations are possible as well. Freewheeling diodes are not considered. The 10 m resistor
is not needed by the Driver IC, but may be needed for load current measurement. The voltage
devider networks, e.g. R = 10 k, across the two Low Side MOSFETs are an example as well;
they allow to increas the current limit threshold for Short Circuit protection SCD for the Low Side
MOSFETs. As they pull down the Sources of the High Side MOSFETs (while the Low Side MOSFETs are off), they allow to pre-charge the C
capacitors during start-up (before the Driver IC
Bx
gets enabled). The SCD current limit threshold can be increased for the High Side MOSFETs as
well by using voltage devider networks across the High Side MOSFETs. SCD can also be disabled (High Side and / or Low Side MOSFETs).
2 Rev 2.2 2006-03-07
Data Sheet TLE6282G
DT/DIS
ERR
IH1
IL1
IH2
VS
DL2
DL1
Symbol Function
Pin
1 DT/DIS a) Set adjustable dead time by external resistor
2 ERR Error flag for driver shut down
3 IH1 Control input for high side switch 1
4 IL1 Control input for low side switch 1
5 IH2 Control input for high side switch 2
6 IL2 Control input for low side switch 1
7 GND Ground
8 VS Voltage supply
9 DL2 Sense contact for short circuit detection low side 2
10 DL1 Sense contact for short circuit detection low side 1
11 GL1 Output to gate low side switch 1
12 SH1 Connection to source high side switch 1
13 GH1 Output to gate high side switch 1
14 BH1 Bootstrap supply high side switch 1
15 DH1 Sense contacts for short circuit detection high side 1
16 DH2 Sense contacts for short circuit detection high side 2
17 BH2 Bootstrap supply high side switch 2
18 GH2 Output to gate high side switch 2
19 SH2 Connection to source high side switch 2
20 GL2 Output to gate low side switch 2
1
1
2
2
3
3
4
4
5
5
TLE6282G
6
6
7
7
8
8
9
9
10
10
b) Deactivate deadtime and shoot through protection
c) Reset ERR register
d) Disable output stages
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
by connecting to 0V
GL2
SH2
GH2
BH2
DH2
DH1 IL2
BH1 GND
GH1
SH1
GL1
3 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Maximum Ratings at Tj=-40…+150°C unless specified otherwise
Parameter Symbol Limits Values Unit
Supply voltage 1 VS -4 60 V
Operating temperature range
Storage temperature range
Max. voltage range at Ixx; DT/DIS -1 6V
Max. voltage range at ERR -0.3 6 V
Max. voltage range at BHx VBHx -0.3 90 V
Max. voltage range at DHx2 VDHx -4 75 V
Max. voltage range at GHx3 VGHx -7 86 V
Max. voltage range at SHx
3
VSHx -7 75 V
Max. voltage range at DLx VDLx -7 75 V
Max. voltage range at GLx VGLx -2 12 V
Max. voltage difference BHx - SHx VBHx-VSHx -0.3 17 V
Max. voltage difference GHx – SHx; GLx VGxx-VSxx -0.3 11 V
Power dissipation (DC) @ TA=125°C / min.footprint P
Power dissipation (DC) @ TA=85°C / min.footprint P
Electrostatic discharge voltage (Human Body Model)
according to MIL STD 883D, method 3015.7 and
EOS/ESD assn. standard S5.1 – 1993
Jedec Level 3
Thermal resistance junction - ambient (minimal footprint with thermal vias)
Thermal resistance junction - ambient (6 cm2) R
Functional range
Tj
T
stg
0.33 W
tot
0.85 W
tot
4
V
ESD
R
75 K/W
thJA
75 K/W
thJA
-40
-55
150
150
2kV
°C
Parameter and Conditions Symbol Values Unit
at Tj = –40…+150 °C, unless otherwise specified
Supply voltage VS 7.5 60 V
Operating temperature range Tj -40 150 °C
Max. voltage range at Ixx, DT/DIS -0.3 5.5 V
Max. voltage range at ERR -0.3 5.5 V
Max. voltage range at BHx VBHx -0.3 90 V
Max. voltage range at DHx2 VDHx -4 75 V
Max. voltage range at GHx3 VGHx -7 86 V
Max. voltage range at SHx3 VSHx -7 75 V
1
With external resistor (≥10 Ω ) and capacitor
2
The min value -4V is increased to –( V
3
The min value -7V is reduced to –(V
4
All test involving Gxx pins V
ESD
=1 kV!
4 Rev 2.2 2006-03-07
- V
BHx
BHx-VSHx
) in case of bootstrap voltages <4V
SHx
-1V) in case of bootstrap voltages <8V
Data Sheet TLE6282G
Max. voltage range at DLx3 VDLx -7 75 V
Max. voltage range at GLx VGLx -2 12 V
Max. voltage difference BHx - SHx VBHx-VSHx -0.3 12 V
Max. voltage difference GHx – SHx; GLx VGxx-VSxx -0.3 11 V
PWM frequency FPWM 0 50 kHz
Minimum on time external lowside switch – static con-
dition @ 20 kHz; Q
= 200nC
Gate
Electrical Characteristics
Parameter and Conditions Symbol Values Unit
at Tj = –40…+150 °C, unless otherwise specified
and supply voltage range V
Static Characteristics
S = 7.5 ... 60V; f
= 20kHz
PWM
tp(min) 2µs
min typ max
Low level output voltage (VGSxx) @ I=10mA
High level output voltage (VGSxx) @ I=-10mA;
∆
VLL -- 60 150 mV
∆
VHL 8 10 11 V
Vs>12V
Supply current at VS (device disabled)
@ V
= VS =14V R
bat
=400kΩ
DT
Supply current at VS (device disabled)
@ V
Supply current at V
= VS =42V R
bat
=400kΩ
DT
@ V
S
= VS =14V 20kHz (Out-
bat
IVS(dis)14V -- 4 8 mA
IVS(dis)42V -- 4 8 mA
I
VS(open)14V
-- 7 15 mA
puts open)
Supply current at V
@ V
S
= VS =14V 50kHz (Out-
bat
I
VS(open)14V
-- 7 15 mA
puts open)
Supply current at V
@ V
S
= VS =42V 20kHz (Out-
bat
I
VS(open)42V
-- 7 15 mA
puts open)
Low level input voltage VIN(LL) -- -- 1.0 V
High level input voltage VIN(HL) 2.0 -- -- V
Input hysteresis
∆
VIN 100 170 mV
5 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Dynamic characteristics (pls. see test circuit and timing diagram)
Turn on current @ VGxx -VSxx = 0V; Tj=25°C
@ VGxx -VSxx = 4V; Tj=125°C
@ C
=22nF; R
Load
Load
=0
Turn off current @ VGxx -VSxx = 10V; Tj=25°C
@ VGxx -VSxx = 4V; Tj=125°C
@ C
=22nF; R
Load
Load
=0
Dead time (adjustable) @ RDT = 1 kΩ
@ RDT = 10 kΩ
@ RDT = 50 kΩ
@ RDT = 200 kΩ
@ C
Rise time @ C
Fall time @ C
=10nF ; R
Load
load
=10nF ; R
Load
=10nF ; R
Load
=1
=1 (20% to 80%) t
load
=1 (80% to 20%) tfall -- 150 440 ns
load
Disable propagation time
@ C
=10nF ; R
Load
load
=1
Reset time of diagnosis
@ C
=10nF ; R
Load
load
=1
Input propagation time
(low side turns on, 0% to 10%)
Input propagation time
(low side turns off, 100% to 90%)
Input propagation time
(high side turns on, 0% to 10%)
Input propagation time
(high side turns off, 100% to 90%)
Input propagation time difference
(all channels turn on)
Input propagation time difference
(all channels turn off)
Input propagation time difference
(one channel; low on – high off)
Input propagation time difference
(one channel; high on – low off)
Input propagation time difference
(all channels; low on – high off)
Input propagation time difference
(all channels; high on – low off)
IGxx(on) --
--
IGxx(off) --
--
tDT --
0.05
0.40
--
-- 100 300 ns
rise
tP(DIS) 3.4 5 7 µs
tP(CL) 1 2 3.1 µs
tP(ILN) -- 160 500 ns
tP(ILF) -- 100 500 ns
tP(IHN) -- 120 500 ns
tP(IHF) -- 120 500 ns
tP(Diff) 20 40 70 ns
tP(Diff) -- 20 50 ns
tP(Diff) -- 40 150 ns
tP(Diff) -- 20 150 ns
tP(Diff) -- 40 150 ns
tP(Diff) -- 20 150 ns
850
700
580
300
0
0.24
1.0
3.1
--
--
----mA
--
0.38
2.50
--
mA
µs
6 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Test Circuit and Timing Diagram
x2
I
HX
I
LX
GHx
SHx
R
C
load
load
= 1 Ohm
= 10 nF
V
GHX_C
IHx
+
ILx
50%
GLx
R
load
= 1 Ohm
V
GHX_C
C
= 10 nF V
load
GLX_C
V
GLX_C
Test Conditions :
Junction temperature Tj = -40 … 150oC
Supply voltage range Vs = 7.5 … 60V
PWM frequency f
= 20 kHz
PWM
Diagnosis and Protection Functions
Short circuit protection filter time t
Short circuit criteria (VDS of Mosfets)
SCP(off)
V
For Low Sides
For High Sides
Disable input level V
Disable input hysteresis ∆V
Deactivation level for dead time and shoot
V
through protection
Deactivation input hysteresis ∆V
Error level @ 1.6mA I
Under voltage lock out for highside output – boot-
V
ERR
V
strap voltage
Under voltage lock out for lowside output –
V
supply voltage
t
80%
20%
10%
t
90%
80%
20%
P(IHN)
P(ILF)
t
rise
t
fall
t
t
P(IHF)
fall
90%
t
t
P(ILN)
rise
6 9 12 µs
DS(SCP)
0.5
0.45
3.3 3.7 4.0 V
DIS
180 mV
DIS
0.6 0.85 1.1 V
DIS
170 mV
DIS
-- -- 1.0 V
ERR
BHx (uvlo)
Vs (uvlo)
3.7 4.6 V
4.8 5.9 V
0.75
0.75
1.0
1.05
t
t
10%
t
V
7 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Remarks:
Default status of input pins:
To assure a defined status of all input pins in case of disconnection, these pins are internally
secured by pull up / pull down current sources with approx. 20µA.
The following table shows the default status of each input pin.
Input pin Default status
ILx (active high) Low
IHx (active low) High
DT/DIS (active high) High
Definition:
In this datasheet a duty cycle of 98% means that the GLx pin is 2% of the PWM period in
high condition.
Functional description
Description of Dead Time Pin / Disable Pin / Reset
In the range between 1.5 and 3.5 V the dead time is varied from 100ns to 3.1µs typ. In the
range below 1.0V the dead time is disabled / shoot through is allowed. Both external Mosfets
of the same half bridge can be switched on simultaneously. This function allows the use of a
half bridge for valves and injectors. In the range above 4.0V the device is disabled.
If DIS is pulled up to 5V for 3.1 to 3.4µs only the ERR register is cleared (reset), no output
stage is shut down. A shut down of all external Mosfets occurs if DIS is pulled up for longer
than 7µs.
Condition of DT/DIS pin Function
0 - 1V Disable of dead time; Shoot through is allowed
1.5 - 3.5V Adjust dead time between 100ns and 3.1µs typ.
> 4V
Description of Diagnosis
The ERR pin is an open collector output and has to be pulled up with external pull up resistors to 5V. In normal conditions the ERR signal is high. In case of shutdown of any output
stage the ERR is pulled down. This shut down can be caused by undervoltage or short circuit.
Recommended Start-up procedure
The following procedure is recommended whenever the Driver IC is powered up:
• Disable the Driver IC via DT/DIS pin
• After the supply voltage has ramped up, wait for several ms to pre-charge the boot-
strap capacitors of the High Side MOSFETs CBx through the resistors R on the DLx
a) Reset of diagnosis register if DT/DIS voltage is higher than
4V for a time between 3.1µs and 3.4µs
b) Shut down of output stages if DT/DIS voltage is higher
than 4V for a time above 7µs (Active pull down of gate voltage)
8 Rev 2.2 2006-03-07
Data Sheet TLE6282G
pins (voltage devider network, pls. see Application block diagram on pg. 2)
t
3 x CBx x 2 x R, whereas R = 10 k
WAIT
• Enable the Driver IC via DT/DIS pin
• Start the operation by applying the desired pulse patterns. Do not apply any pulse pat-
terns to the IHx or ILx pins, before the CBx capacitors are charged up.
Alternatively, the Driver IC can be enabled via the DT/DIS pin right after ramping up the supply voltage VS. Now, the two Low Side MOSFETs are turned on via the ILx control inputs (to
pull down the Sources of the High Side MOSFETs and to charge up the bootstrap capacitors
CBx within several 10 µs). The regular operation can be started when the bootstrap capacitors are charged up.
Short Circuit protection
The current threshold limit to activate the Short Circuit protection function can be adjusted to
larger values, it can not be adjusted to lower values. This can be done by external resistors
to form voltage deviders across the “sense element” (pls. see Application block diagram on
pg. 2), consisting of the Drain-Source-Terminals, a fraction of the PCB trace and – in some
cases – current sense resistors (used by the µC not by the Driver IC).
The Short Circuit protection can be disabled for the High Side MOSFETs by shorting DH1
with SH1 and DH2 with SH2 on the PCB; in this case the DHx pins may not be connected to
the Drains of the associated MOSFETs. To disable Short Circuit protection for the Low Side
MOSFETs the DL1 and DL2 pin should be connected to the Driver IC´s Ground.
Shut down of the driver
A shut down can be caused by undervoltage or short circuit.
A short circuit will shut down only the affected Mosfet until a reset of the error register by a
disable of the driver occurs. A shut down due to short circuit will occur only when the Short
Circuit criteria V
t
SCP(off)
. Yet, the exposure to or above V
DS(SCP)
tive Short Circuit conditions shorter than t
MOSFET.
An undervoltage shut down shuts only the affected output down. The affected output will
auto restart after the undervoltage situation is over.
Operation at Vs<12V
If Vs<11.5V the gate voltage will not reach 10V. It will reach approx. Vs-1.5V, dependent on
duty cycle, total gate charge and switching frequency.
Operation at different voltages for Vs, DH1 and DH2
If DH1 and DH2 are used with a voltage higher than Vs, a duty cycle of 100% can not be
guaranteed. In this case the driver is acting like a normal driver IC based on the bootstrap
principle. This means that after a maximum “On” time of the highside switch of more than
1ms a refresh pulse to charge the bootstrap capacitor of about 1µs is needed to avoid undervoltage lock out of this output stage.
Operation at extreme duty cycle:
The integrated charge pump allows an operation at 100% duty cycle. The charge pump is
strong enough to replace leakage currents during “on”-phase of the highside switch. The
gate charge for fast switching of the highside switches is supplied by the bootstrap capacitors. This means, that the bootstrap capacitor needs a minimum charging time of about 1µs,
if the highside switch is operated in PWM mode (e.g. with 20kHz a maximum duty cycle of
96% can be reached). The exact value for the upper limit is given by the RC time formed by
is met for a duration equal to or longer than the Short Circuit filter time
DS(SCP)
is not counted or accumulated. Hence, repeti-
will not result in a shut down of the affected
scp(off)
9 Rev 2.2 2006-03-07
Data Sheet TLE6282G
the impedance of the internal bootstrap diode and the capacitor formed by the external Mosfet (C
Mosfet=QGate
MOSFET the driver IC has to drive. Usually the bootstrap capacitor is about 10-20 times bigger then C
Mosfet
General remark:
It is assured that after the removal of any fault condition, which did not damage the device,
the device will return to normal conditions without external trigger. Only short circuit condition
needs restart by reset.
Estimation of power loss within the Driver IC
The power loss within the Driver IC is strongly dependent on the use of the driver and the
external components. Nevertheless a rough estimation of the worst case power loss is possible.
Worst case calculation is:
P
= (Q
Loss
gate
With:
P
= Power loss within the Driver IC
Loss
f
= Switching freqency
PWM
Q
= Total gate charge of used MOSFETs at 10V VGS
gate
n = Number of switched MOSFETs
const = Constant considering some leakage current in the driver (about 1.2)
I
VS(open)
= Current consumption of driver without connected Mosfets during switching
VVS = Voltage at Vs
P
= Power dissipation in the external gate resistors
RGate
This value can be reduced dramatically by usage of external gate resistors.
/ VGS). The size of the bootstrap capacitor has to be adapted to the external
. External components at the Vs Pin have to be considered, too.
*n*const* f
PWM
+ I
VS(open)
/20kHz)* VVs - P
RGate
Estimated Power Loss P
for different supply voltages V
0,8
0,7
0,6
0,5
(W)
0,4
LOSS
0,3
P
0,2
0,1
0
0 102030405060
Conditions :
Junction temperature Tj = 25oC
Number of switched MOSFET n = 2
Power dissipation in the external gate resistors P
with in the Driv er IC
LOSS
at QG = 100nC @ VGS = 10V
Vs = 8V
Vs = 14V
Vs = 18V
PWM Frequency (kHz)
Estimated Power Loss P
s
0,8
0,7
0,6
0,5
(W)
0,4
LOSS
0,3
P
0,2
0,1
0
0 102030 405060
= 0,2*P
RGate
for different gate charges Q
at sup ply voltag e Vs = 14V
QG = 50nC
= 100nC
Q
G
Q
= 200nC
G
PWM Frequency (kHz)
Loss
within the Driver IC
LOSS
G
10 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Gate Drive characteristics
Logic
+
Level
Shift
+
V
GS
limit
V
IHx
+
Under
voltage
SCD
i
Gxx(on)
i
Gxx(off)
BHx
DHx
GHx
SHx
C
i
B
GHx
V
s
Load
V
IHx
i
Gxx(on)
i
Gxx(off)
850 mA Peak
580 mA Peak
TLE6282G
High Side Driver
- Turn On : V
- Turn Off : V
Test Conditions :
= 0V, Tj = 25oC
GS
= 10V, Tj = 25oC
GS
This figure represents the simplified internal
circuit of one high side gate drive. The drive
circuit of the low sides looks similar.
i
GHx
This figure illustrates typical voltage and
current waveforms of the high side gate drive;
the associated waveforms of the low side
drives look similar.
11 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Truth Table
Input Conditions Output
ILx IHx DT / DIS UV SC GLx GHx ERR
1
0
1
1
0
1 1
0
1
1
0
1 1
0
1
1
0
1
0 <3.5V 0 0 0 1
0 1.5-3.5V 0 0 A A
0 <1V 0 0 1 1
1 <3.5V 0 0 0 0
0 <3.5V 1 0 0 B
0 1.5-3.5V 1 0 D D
0 <1V 1 0 B B
1 <3.5V 1 0 0 0
0 <3.5V 0 1 0 E
0 1.5-3.5V 0 1 D D
0 <1V 0 1 E E
1 <3.5V 0 1 0 0
<3.5V 0 0 1 0
<3.5V 1 0 B 0
<3.5V 0 1 E 0
5V
5V
5V
5V
5V
C
C
C
C
C
F
F
F
F
F
X X
X
A) stays in the condition before the shoot throught command occurs (see also dead time
B) 0 when affected; 1 when not affected; self recovery
C) 0V when output does not correspond to input patterns; 5V when output corresponds to
D) stays in the condition before the shoot throught command occurs (see also dead time
E) 0 when affected– the outputs of the affected halfbridge are shut down and stay latched
F) 0V when output does not correspond to input patterns – the outputs of the affected half-
X) Condition has no influence
Remark: Please consider the influence of the dead time for your input duty cycle
X >4V X X 0 0
diagrams)
input patterns.
diagrams); 0 when affected
until reset; 1 when not affected
bridge are shut down and stay latched until reset; 5V when output corresponds to input
patterns.
X X X 0 0
5V
5V
12 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Package and Ordering Code
(all dimensions in mm)
Package Code
P-DSO 20
13 Rev 2.2 2006-03-07
Data Sheet TLE6282G
Published by
Infineon Technologies AG,
Bereich Kommunikation
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address
list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the human body, or to support and/or maintain and
sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
14 Rev 2.2 2006-03-07
Loading...