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Data Sheet, V 1.1, November 2005
TDK5100F
434 MHz ASK/FSK Transmitter in 10-pin
Package
Wireless Control
Components
Never stop thinking.
TDK5100F
Revision History:2005-11-14V 1.1
Previous Version:none
PageSubjects (major changes since last revision)
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The TDK 5100 F is a single chip ASK/F SK transmitter for ope ration in the frequ ency band
433-435 MHz. The IC offers a high level of integration and needs only a few external
components. The device conta ins a fully integr ated PLL synthes izer and a hig h efficiency
power amplifier to drive a loop antenna. A special circuit design and an unique power
amplifier design are use d to save curre nt consump tion and there fore to save ba ttery life.
Additional features are a power down mode and a divided clock output.
1.2Features
•fully integrated frequency synthesizer
•VCO without external components
•ASK and FSK modulation
•frequency range 433-435 MHz
•high efficiency power amplifier (typically 5 dBm)
•low supply current
•voltage supply range 2.1 ... 4 V
•temperature range −40 ... +125°C
•power down mode
•crystal oscillator 13.56 MHz
•FSK-switch
•divided clock output for µC
•low external component count
1.3Application
•Tire pressure monitoring systems
•Keyless entry systems
•Remote control systems
•Alarm syst ems
•Communication systems
Data Sheet6V 1.1, 2005-11-14
2Functional Description
2.1Pin Configurat ion
TDK5100F
Functional Description
CLKOUT
VS
GND
FSKOUT
COSC
1
2
3
4
5
TDK 5100F
10
9
8
7
6
PDWN
PAOUT
PAGND
FSKDTA
ASKDTA
Figure 1IC Pin Configuration
2.2Pin Definition and Functions
Table 1Pin Definition and Functions - Overview
Pin
No.
1CLKOUTClock Driver Output (847.5 kHz)
2VSVoltage Supply
3GNDGround
4FSKOUTFrequency Shift Keying Switch Output
5COSCCrystal Oscillator Input (13.56 MHz)
6ASKDTAAmplitude Shift Keying Data Input
7FSKDTAFrequency Shift Keying Data Input
8PAGNDPower Amplifier Ground
9PAOUTPower Amplifier Output (434 MHz)
10PDWNPower Down Mode Control
SymbolFunction
Data Sheet7V 1.1, 2005-11-14
TDK5100F
Functional Description
Table 2Pin Definition and Function
Pin
SymbolInterface SchematicFunction
1)
No.
1CLKOUTClock output to supply an external
V
S
1
device.
An external pull-up resisto r has to
be added in accordance to the
driving requirements of the
300 Ω
external device.
The clock frequenc y is 847.5 kHz .
2VSThis pin is the positive supply of
the transmitter electronics.
An RF bypass capaci tor should be
connected directly to this pin and
returned to GND (pin 3) as short
as possible.
3GNDGeneral ground connecti on.
4FSKOUTThis pin is connec ted to a switch to
V
S
V
S
GND (pin 3).
The switch is closed when the
signal at FSKDTA (pin 7) is in a
200 µA
logic low state.
4
The switch is open w hen the signal
at FSKDTA (pin 7) is in a l ogic high
120 kΩ200 kΩ
state.
FSKOUT can switch an ad dition al
capacitor to the reference crystal
network to pull the crystal
frequency by an amount resulting
in the desired FSK freque ncy s hift
of the transmitter output
frequency.
Data Sheet8V 1.1, 2005-11-14
TDK5100F
Functional Description
Pin
SymbolInterface SchematicFunction
No.
5COSCThis pin is connected to the
V
S
6 kΩ
100 µA
V
S
6ASKDTADigital amplitude modulation can
+1.2 V
V
S
60 k
6
90 k
Ω
Ω
50 pF30 µA
reference oscillator circuit.
The reference oscillat or is working
as a negative impedance
converter. It presents a negative
resistance in series to an
5
inductance at the COSC pin.
be imparted to the Power Amplifier
through this pin.
A logic high (ASKDTA > 1.5 V or
+1.1 V
open) enables the Power
Amplifier.
A logic low (ASKDTA < 0.5 V)
disables the Power Amplifier.
Data Sheet9V 1.1, 2005-11-14
TDK5100F
V
Functional Description
Pin
SymbolInterface SchematicFunction
No.
7FSKDTADigital frequency modulation can
+1.2 V
V
S
Ω
90 k
60 k
Ω
30 µA
7
be imparted to the Xtal Oscillator
by this pin. The VCO-frequency
varies in accordance to the
frequency of the reference
oscillator.
+1.1
A logic high (FSKDTA > 1.5V or
open) sets the FSK switch to a
high impedance state.
A logic low (FSKDTA < 0.5 V)
closes the FSK switch from
FSKOUT (pin 4) to GND (pin 3).
A capacitor can be s witched to the
reference crystal network this way.
The Xtal Oscillator frequency will
be shifted giving the desi gned FSK
frequency deviation.
Data Sheet10V 1.1, 2005-11-14
TDK5100F
)
Functional Description
Pin
SymbolInterface SchematicFunction
No.
8PAGNDGround connection of the power
amplifier.
9
The RF ground return path of the
power amplifier output PAOUT
(pin 9) has to be concentrated to
this pin.
9PAOUTRF output pin of the transmitter.
10PDWNDisable pin for the complete
V
S
40 µA ∗ (ASKDTA+FSKDTA
10
5 kΩ
150 kΩ
250 kΩ
"ON"
8
A DC path to the positive supply
VS has to be supplied by the
antenna matching network.
transmitter circuit.
A logic low (PDWN < 0.7 V) turns
off all transmitter functions.
A logic high (PDWN > 1.5 V) gi ves
access to all transmitter functions.
PDWN input will be pulled up by
40 µA internally by either setting
FSKDTA or ASKDTA to a logic
high-state.
1) Indicated voltages and currents apply for PLL Enable Mode and Transmit Mode.
In Power Down Mode, the values are zero or high-ohmic.
Data Sheet11V 1.1, 2005-11-14
2.3Functional Block Diagram
TDK5100F
Functional Description
Power
Power
ASK
FSK
VS
Supply
Down
Control
Data
Input
Data
Input
Power
9
Power
Output
Amplifier
Ground
Amplifier
8
On
AMP
Power
3
Power
Supply
LF
Ground
102
OR
6
7
PFD:64VCO:2
1
:16
Clock
Output
Osc
XTAL
4
FSK
Switch
5
Crystal
13.56 MHz
Figure 2Functional Block Diagram
Data Sheet12V 1.1, 2005-11-14
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