INFINEON TDA5220 User Manual

Preliminary Specification, V 1.1, October 2004

TDA 5220

ASK/FSK Single Conversion Receiver Version 1.1

Wireless Control Components

Never stop thinking.

Edition 2004-10-20 Published by In fineon Technologies AG,

St.-Martin-Strasse 53, 81669 München, Germany

Attention please!

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circuits, descriptions and charts stated herein.

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Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon T echnologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Preliminary Specification, V 1.1, October 2004

TDA 5220

ASK/FSK Single Conversion Receiver Version 1.1

Wireless Control Components

Never stop thinking.

TDA 5220 Revision History: 2004-10-20 V 1.1

Previous Version: none Page Subjects (major changes since last revision)

We Listen to Your Comments

Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to:

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TDA 5220

Table of Contents Page

1 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.3 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Pin Definition and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.4 Functional Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.4.1 Low Noise Amplifier (LNA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.4.2 Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.4.3 PLL Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.4.4 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.4.5 Limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.4.6 FSK Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.4.7 Data Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.4.8 Data Slicer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.4.9 Peak Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

2.4.10 Bandgap Reference Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.1 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2 Data Filter Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.3 Crystal Load Capacitance Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.4 Crystal Frequency Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.5 Data Slicer Threshold Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.6 ASK/FSK-Data Path Functional Description . . . . . . . . . . . . . . . . . . . . . . . 25

3.7 FSK Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.8 ASK Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3.9 Principle of the Precharge Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

4 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

4.1 Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

4.1.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

4.1.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

4.1.3 AC/DC Characteristic s at

4.1.4 AC/DC Characteristics at T

4.2 Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

4.3 Test Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

4.4 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

= 25°C . . . . . . . . . . . . . . . . . . . . . . . . . 33

AMB

= -40 to 105°C . . . . . . . . . . . . . . . . . . . . 40

AMB

Preliminary Specification 5 V 1.1, 2004-10-20

TDA 5220

Product Description

1 Product Description

1.1 Overview

The IC is a very low power consumption single chip FSK/ASK Superheterodyne Receiver (SHR) for the frequency bands 810 to 870 MHz and 400 to 440 MHz. The IC offers a high level of i nteg r ati on a nd n ee ds o nl y a f ew ex tern al c omponents. The device contains a low noi se am plifie r (LNA), a doub le bal anced mixe r, a ful ly int egra ted VCO, a PLL synthesiser, a crystal oscillator, a limiter with RSSI generator, a PLL FSK demodulator, a data filter, an advanced data comparator (slicer) with selection between two threshold modes an d a pea k de tec tor. Addit ion ally there is a power down featu re to save current and extend battery life, and two selectable alternatives of generating the data slicer threshold.

1.2 Features

• Low supply current (Is = 5.7/5.9 mA typ. in FSK mode, Is = 5.0/5.2 mA typ. in ASK mode for 434/868 MHz)

• Supply voltage range 5V ±10%

• Power down mode with very low supply current (50nA typ.)

• FSK and ASK demodulation capability

• Fully integrated VCO and PLL Synthesiser

• ASK sensitivity better than -106 dBm over specified temperature range (- 40 to +105°C)

• FSK sensitivity better than -100 dBm over specified temperature range (- 40 to +105°C)

• Selectable frequency ranges 810-870 MHz and 400-440 MHz

• Limiter with RSSI generation, operating at 10.7MHz

• 2nd order low pass data filter with external capacitors

• Data slicer with selection between two threshold modes (see Section 2.4.8)

1.3 Application

• Keyless Entry Systems

• Remote Control Systems

• Alarm Systems

• Low Bitrate Communication Systems

Preliminary Specification 6 V 1.1, 2004-10-20

TDA 5220

2 Functional Description

2.1 Pin Configurat ion

CRST1

TAGC

AGND

FSEL

DGND

VCC

LNI

LNO VCC

MIX

IFO

VDD

1 2 3 4 5 6 7 8 9 10 11 12 13 14

TDA 5220

28 27 26 25 24 23 22 21 20 19 18 17 16 15

Functional Description

CRST2 PDWN PDO DATA 3VOUT THRES FFB OPP SLN SLP LIMX LIM SSEL MSEL

Figure 1 Pin Configuration

Preliminary Specification 7 V 1.1, 2004-10-20

TDA 5220

Functional Description

2.2 Pin Definition and Functions

Table 1 Pin Defintion and Function Pin

No.

1 CRST1 External Crystal

2 VCC 5V Supply 3 LNI LNA Input

Symbol Equivalent I/O Schematic Function

Connector 1

4.15V

50uA

57uA

500uA

Preliminary Specification 8 V 1.1, 2004-10-20

TDA 5220

Symbol Equivalent I/O Schematic Function

Functional Description

No.

4 TAGC AGC Time Constant

4.3V

3uA

1.4uA

1.7V

Control

5 AGND Analogue Ground

Return

6 LNO LNA Output

7 VCC 5V Supply

Preliminary Specification 9 V 1.1, 2004-10-20

TDA 5220

Symbol Equivalent I/O Schematic Function

Functional Description

No.

MIX

2k 2k

400uA

Mixer Input

1.7V

Complementary Mixer Input

10 AGND Analogue Ground

Return

11 FSEL 868/434 MHz

Operating

1.2V

750

Frequency Selector

12 IFO 10.7 MHz IF Mixer

Output

300uA

2.2V

4.5k

13 DGND Digital Ground

Return

Preliminary Specification 10 V 1.1, 2004-10-20

TDA 5220

Symbol Equivalent I/O Schematic Function

Functional Description

No.

14 VDD 5V Supply (PLL

Counter Circuity)

15 MSEL ASK/FSK

Modulation Format Sector

1.2V

40k

16 SSEL Data Slicer

Reference Level Sector

1.2V

40k

Limiter Input

2.4V

LIM

LIMX

15k

330

15k

Complementary Limiter Input

75uA

Preliminary Specification 11 V 1.1, 2004-10-20

TDA 5220

Symbol Equivalent I/O Schematic Function

Functional Description

No.

19 SLP Data Slicer Positive

Input

15uA

100

80µA

20 SLN Data Slicer

Negative Input

5uA

10k

21 OPP OpAmp

Noninverting Input

5uA

200

22 FFB Data Filter

Feedback Pin

5uA

Preliminary Specification 12 V 1.1, 2004-10-20

100k

TDA 5220

Symbol Equivalent I/O Schematic Function

Functional Description

No.

23 THRES AGC Threshold

Input

5uA

10k

24 3VOUT 3V Reference

Output

20k

Ω

3.1V

25 DATA Data Output

500

40k

26 PDO Peak Detector

Output

446k

Preliminary Specification 13 V 1.1, 2004-10-20

TDA 5220

Symbol Equivalent I/O Schematic Function

Functional Description

No.

27 PDWN Power Down Input

220k

28 CRST2 External Crystal

Connector 2

4.15V

50uA

Preliminary Specification 14 V 1.1, 2004-10-20

TDA 5220

2.3 Functional Block Diagram

VCC

68912 1718

LNI

TAGC

VCC

DGND

LNA

2,7 5,10

VCC AGND

Figure 2 Block Diagram

Filter

MIXLNO

IFO SLN

LIM LIMX

LIMITER

TDA 5220

OTA

: 1

VCO : 64

: 2

Loop Filter

FSEL

DET

2.4 Functional Block Description

FSK

PLL Demod

MSEL

H=ASK

L=FSK

CRYSTAL

OSC

Crystal

ASK

FFB

FSK

28 27

Functional Description

OPP

SLP

22 21 19

SSEL

Logic

DATA

DATA-

SLICER

PEAK

PDO

DETECTOR

THRES

REF

AGC

Reference

Bandgap

Reference

PDWN

3VOUT

2.4.1 Low Noise Amplifier (LNA)

The LNA is an on-chip cascode amplifier with a voltage gain of 15 to 20dB. The gain figure is determined by the external matching networks situated ahead of LNA and between the LNA output LNO (Pin 6) and the Mixer Inputs MI and MIX (Pins 8 and 9). The noise figure of the LNA is approximately 3dB, the current consumption is 500µA. The gain can be reduce d by approxi mately 18 dB. The swit ching poi nt of this AGC ac tion can be determined externally b y applyi ng a thresh old volta ge at the THRES pin (Pin 23). This voltage is compared internally with the received signal (RSSI) level generated by the limiter circuitry. In case that the RSSI level is higher than the threshold voltage the LNA gain is reduced and vice versa. The threshold voltage can be generated by attaching a voltage divider between the 3VOUT pin (Pin 24) which provides a temperature stable 3V output generated from the internal bandgap voltage and the THRES pin as described in Section 3.1. The time constant of the AGC action can be determined by connecting a capacitor to the TAGC pin (Pin 4) and should be chosen along with the appropriate threshold voltage according to the intended operating case and interference scena rio to be expe cted du ring ope ration. The optim um ch oice of AGC time constant and the threshold voltage is described in Section 3.1.

Preliminary Specification 15 V 1.1, 2004-10-20

TDA 5220

Functional Description

2.4.2 Mixer

The Double Balanced Mixer down conve rts the i nput fre quenc y (RF) in th e range o f 40 0440MHz/810-870MHz to the interm ediate frequenc y (IF) at 10. 7MHz with a vo l-tage gain of approximately 21 dB by utilising either high- or lo w-side injection of the lo ca l os cil la t or signal. In case the mixer is interfaced only single-ended, the unused mixer input has to be tied to ground vi a a c ap aci tor. The mixer is followed by a low pass fil ter w it h a c orn er frequency of 20MHz in order to su ppress RF s ignals to appe ar at the IF output (IFO pin). The IF output is internal ly c on si sti ng o f an em itte r fol lower that has a source i mped anc e of approximately 330Ω to facilitate interfacing the pin directly to a standard 10.7MHz ceramic filter without additional matching circuitry.

2.4.3 PLL Synthesizer

The Phase Locked Loo p syn thesi zer co nsist s of a VCO, an asy nchro nous d ivide r chain, a phase detector with charge pump and a loop filter and is fully implemented on-chip. The VCO is including sp iral ind uctors and vara ctor di odes. T he tu ning ran ge of the VCO guarantee over production spread and the specified temperature range is 820 and 860MHz. The oscillator signal is fed both to the synthesiser divider chain and to the downconverting mixer. In case of operation in the 400 to 440MHz range the signal is divided by two before it is fed to the Mixer. Depending on whether high- or low-side injection of the local oscillator is used, the receiving frequency ranges are 810 to 840MHz and 840 to 870MHz or 400 to 420MHz and 420 to 440MHz - see also Section

3.4. To be able to switch between two different frequency channels a divider ratio of either 32 or 32.25 can be selected via the FSEL-Pin.

Table 2 FSEL-Pin Operating States FSEL RF

Open 400-440MHz GND 810-870MHz

2.4.4 Crystal Oscillator

The calculation of the value of the necessary crystal load capacitance is shown in Section 3.3, the crystal frequency calculation is explained in Section 3.4.

2.4.5 Limiter

The Limiter is an AC coupled multistage amplifier with a cumulative gain of approximately 80 dB that has a bandpass-characteristic centred around 10.7 MHz. It has a typical input impedance of 330 Ω to allow for easy interfacing to a 10.7 MHz ceramic IF filter. The limiter circuit also acts as a Receive Signal Strength Indicator (RSSI) generator which produces a DC voltage that is directly proportional to the input

Preliminary Specification 16 V 1.1, 2004-10-20

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