INFINEON TDA21211 User Manual

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Jens Eju

ry July 13, 2006 San Jose, CA

Data Sheet High-Performance DrMOS

6mm x 6mm x 0.8mm IQFN

TDA21211- Data Sheet August - 2009

Published by Infineon Technologies AG

http://www.infineon.com/DCDC

Power Management & Drive

Data Sheet

Never stop thinking

.

Page 1 of 20

TDA21211

6x6 QFN High-Performance DrMOS Features:

• Intel compliant DrMOS, Power MOSFET and

Driver in one package

• For Synchronous Buck - step down voltage

applications

• Maximum Average Current of 35A

• Wide input voltage range +5V to +30V

• Low power dissipation

• Extremely fast switching technology for

improved performance at high switching

frequencies (>1MHz)

• Remote Driver Disable function

Type Package Marking

6x6x0.8mm3

TDA21211

PG-IQFN-40-1

TDA21211

• Switching Modulation (SMOD#) of low side

MOS

• Includes active PMOS structure as integrated

bootstrap circuit for reduced part count

• Shoot through protection

• +5V High and Low Side Driving voltage

• Compatible to standard PWM controller ICs with

+3.3 and 5V logic

• Three-State PWM input functionality

• Small Package: IQFN40 (6 x 6 x 0.8 mm3)

• RoHS Compliant

Applications:

• Desktop and Server VR11.X and VR12 Vcore and non-Vcore buckconverters

• Network and Telecom processor VR

• Single Phase and MultiPhase POL

• CPU/GPU Regulation in Notebook, Graphics Cards, and Gaming

• Voltage Modules requiring high power density

• Memory (DDR2/3)

Data Sheet

Page 2 of 20

TDA21211

Pinout

VIN

VSWH

PGND

VIN

11

12

13 14

15

16

17

18

19 20

22 23 24 25 26 27

21

PGND

8910

VIN

NC

PGND

PHASE

7

VSWH

PGND

6

GH

PGND

CGND

PGND

BOOT

VDRV

CGND

28

PGND

SMOD#

VCIN

12345

PWM

40 39

DISB#

38

NC

37

CGND

36

GL

35

VSWH

34

VSWH

33

VSWH

32

VSWH

31

VSWH

29

30

VSWH

Note:

Signals marked with "#" at the end are active low signals.

Figure 1. Pinout, numbering and name of pins (Transparent Top View)

Pin Description

Pin Name Pin No. Description Remarks

CGND 5, 37,CGND Pad Control signal ground Should be connected to PGND externally SMOD# 1 Low side gate disable pin when SMOD# is “low” the GL is OFF VCIN 2 Logic supply voltage 5V bias voltage for the internal logic. VDRV 3 FET gate supply voltage High & Low Side gate drive 5V BOOT 4 Bootstrap voltage pin Connect to boot capacitor GH 6 High side gate signal PHASE 7 Switch node output Internally connected to VSWH pin NC 8, 38 No connect Can be connected to any potential VIN

VSWH

9 to 14, Vin Pad

15, 29 to 35,

Input Voltage connection to the drain of the HS FET

Switch node output high current output switch node

VSWH Pad

PGND

16 to 28

Power ground

GL 36 Low side gate signal DISB# 39 Disable Signal (active low) pull to GND to disable the IC

PWM 40 PWM drive logic input

pin for monitoring gate of HS FET

All of these pins must be connected to the power GND plane

through multiple, low inductance vias.

pin for monitoring gate of LS FET

the three-state PWM input is compatible with 3.3V and 5V

logic

Data Sheet

Page 3 of 20

TDA21211

General Description

The Infineon TDA21211 is a multichip module that incorporates Infineon’s premier MOSFET technology for a single high

side and a single low side MOSFET coupled with a robust, high performance, high switching frequency gate driver in a

single 40 pin QFN package. The optimized gate timing allows for significant light load efficiency improvements over

discrete solutions. State of the art MOSFET technology provides exceptional full load performance. Thus this device has

a clear advantage over exisiting approaches in the marketplace when both full load and light load efficiencies are

important.

The Driver+MOSFET IC TDA21211 (DrMOS) is pin to pin compatible and compliant with the Intel 6x6 DrMOS

specification. The device package height is only 0.8mm, and is an excellent choice for applications with critical height

limitations.

BLOCK DIAGRAM

GU

VCIN

PHASE

BOOT

GU

DISB#

PWM

SMOD#

VCIN

CGND

500k

33k

14k

CGND

VCIN

UVLO

Input

Input Logic

Logic

3-State

400k

600K

VDRV

HS

Logic

LS

Logic

Level

Shifter

Shoot Through

VDRV

IC DRIVER

HS Driver

Protection

LS Driver

500k

HS

HS MOS

MOS

LS

LS MOS

MOS

VIN

VSWH

PGND

Data Sheet

CGND

VDRV

Figure 2. Simplified block diagram

Page 4 of 20

GL

TDA21211

Electrical Specification Table

Absolute Maximum Ratings (Ta = 25°C)

Item Symbol Rating Units

Frequency f

SW

1.2 MHz

Average output current Iout 35 A

Input voltage VIN (DC) -0.3 to +30 V

Supply voltage VCIN (DC) -0.3 to +5.5 V

High and Low side driver voltage VDRV (DC) -0.3 to +5.5 V

Switch node voltage VSWH (DC) -1 to +30 V

BOOT voltage V

SMOD# voltage V

DISB# voltage

PWM voltage

1

BOOT-PHASE

SMOD#

VDISB -0.3 to +5.5 V

Vpwm -0.3 to +5.5 V

(DC) -1 to +5.5 V

(DC) -0.3 to +5.5 V

Operating junction temperature Tj-opr -40 to +150 °C

Storage temperature Tstg -55 to +150 °C

Note: All rated voltages are relative to voltages on the CGND and PGND pins unless otherwise specified.

1

Latch Up class II- Level B (Jedec 78). Please refer to Quality Report for details.

Thermal Characteristics

Parameter Symbol

Thermal resistance, junction-soldering point

Thermal resistance, junction-top of package

1

junction-soldering point is referred to the VSWH bottom exposed pad.

1

Values

Unit

Min. Typ. Max.

θ

JS

5

K/W

θ

Jtop

20

Data Sheet

Page 5 of 20

TDA21211

Recommended Operating Conditions and Electrical Characteristics (VCIN = 5V, Ta = 25°C)

Parameter Symbol Min Typ Max Units Test Conditions

Input Voltage VIN 5 25

Driving Voltage VDRV 5

Bias Supply Voltage VCIN 4.5 5 5.5

UVLO Rising V

UVLO Falling V

Driver Current

UVLO_R

UVLO_F

I

VDRV_300kHz

I

VDRV_PWML

I

VCIN_PWML

2.9 3.5 3.9

2.5 3.1 3.3

10 mA

25 µA

250 µA

IC Current (Control)

370 µA

270 µA

IC quiescent

I

VCIN_O

I

CIN+IDRV

Logic Inputs and Thresholds

V

VCIN rising

VCIN falling

DISB# = 5V, f

DISB# = 5V, PWM = 0V

DISB# = 5V, PWM = 0V SMOD# = Open DISB# = 5V, PWM = Open SMOD# = Open

DISB# = 0V

= 300kHz

SW

Input low

Input high

DISB#

Sink Current

Input low

Input high

Open Voltage

SMOD#

Sink Current

Input low

Input high

Input resistance

PWM

Open Voltage

Tri-state Shutdown Window

Dynamic Characteristic

Three State to GL/GH rising propagation delay

GL/GH Three State Shutdown Hold-Off time,

GH Turn-on propagation delay

V

DISB_L

V

DISB_H

I

DISB

V

SMOD#_L

V

SMOD#_H

V

SMOD#_O

I

SMOD#

V

PWM_L

V

PWM_H

R

IN-PWM

V

PWM_O

V

PWM_S

T_pts

T_tsshd

T_pdhu

0.7 1.1 1.3 V V

1.9 2.1 2.4

2 µA V

0.7 1.1 1.3 V

1.9 2.1 2.4 V

V

3.0

-8 µA V

0.7 V V

2.4

6.5 9.5 12.5 kΩ V

1.5 V V

1.2 1.9

15

240

15

DISB

V

DISB

SMOD#

PWM

V

PWM

PWM_O

falling

rising

= 1V

falling

rising

= 1V

falling

rising

= 1V

T_pdlu

T_pdhl

T_pdll

T_pdl_DISB

T_pdh_DISB

GH Turn-off propagation delay

GL Turn-on propagation delay

GL Turn-off propagation delay

DISB#Turn-off propogation delay falling

DISB#Turn-on propogation delay rising

1

Unless otherwise specified, VCIN=VDRV

Data Sheet

20

10

20

Page 6 of 20

ns

GH, GL unloaded.

TDA21211