INFINEON PMA7110 User Manual

Preliminary Data Sheet, V0.9, April 2008

PMA7110

RF Transmitter IC with embedded 8051 Microcontroller, LF 125kHz ASK Receiver and FSK/ASK 315/434/868/915 MHz Transmitter

Sense & Control

Edition 2008-04-28

Published by Infineon Technologies AG, Am Campeon 1-12 85579 Neubiberg, Germany

Attention please!

The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.

Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding

circuits, descriptions and charts stated herein.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or the Infineon Technologies Companies and our Infineon Technologies Representatives worldwide (www.infineon.com).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Preliminary Data Sheet, V0.9, April 2008

PMA7110

RF Transmitter IC with embedded 8051 Microcontroller, LF 125kHz ASK Receiver and FSK/ASK 315/434/868/915 MHz Transmitter

Sense & Control

PMA7110

Revision History:2008-04-28 V0.9

PMA7110

Page 129

Page 132 Update RF characterization for D9 ~ D17

Page 128, Page 141 Update flash code/data memory program temeprature and erase cycle: B4, O1,

update typical value of transmit current consumption

O2, O6 ~ O8.

We Listen to Your Comments

Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to:

sensors@infineon.com

Preliminary Data Sheet 4 V0.9, 2008-04-28

PMA7110

Preliminary Data Sheet 5 V0.9, 2008-04-28

PMA7110

1 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.1 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2.3 Operating Modes and States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.3.1 Operating mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.3.2 State Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

2.3.2.1 INIT State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

2.3.2.2 RUN State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

2.3.2.3 IDLE State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

2.3.2.4 POWER DOWN State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

2.3.2.5 THERMAL SHUTDOWN state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

2.3.2.6 State Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

2.3.2.7 Status of PMA7110 Blocks in Different States . . . . . . . . . . . . . . . . . . . . . . . 37

2.4 Fault protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

2.4.1 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

2.4.2 VMIN Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

2.4.3 FLASH Memory Checksum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

2.4.4 ADC Measurement Overflow & Underflow . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

2.4.5 TMAX Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

2.5 Functional Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

2.5.1 Sensor Interfaces and Data Acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

2.5.1.1 Sensor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

2.5.1.2 Two differential high sensitive interfaces to external Sensors . . . . . . . . . . . . 43

2.5.1.3 Interface to other signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

2.5.1.4 Reference voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

2.5.1.5 Temperature Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

2.5.1.6 Battery Voltage Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

2.5.2 Memory Organization and Special Function Registers (SFR) . . . . . . . . . . . . . . 47

2.5.2.1 ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

2.5.2.2 FLASH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

2.5.2.3 RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

2.5.2.4 Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

2.5.3 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

2.5.4 System Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

2.5.5 General Purpose Registers (GPR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

2.5.6 System Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

2.5.6.1 Wakeup Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

2.5.6.2 Interval Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Preliminary Data Sheet 6 V0.9, 2008-04-28

PMA7110

2.5.6.3 Interval Timer Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

2.5.7 Clock Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

2.5.7.1 2 kHz RC LP Oscillator (Low Power) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

2.5.7.2 12 MHz RC HF Oscillator (High Frequency) . . . . . . . . . . . . . . . . . . . . . . . . 71

2.5.7.3 Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

2.5.8 Interrupt Sources on the <Dev_NameShort1> . . . . . . . . . . . . . . . . . . . . . . . . . . 74

2.5.9 RF 315/434/868/915 MHz FSK/ASK Transmitter . . . . . . . . . . . . . . . . . . . . . . . 78

2.5.9.1 Phase Locked Loop PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

2.5.9.2 Power Amplifier PA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

2.5.9.3 ASK Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

2.5.9.4 Voltage Controlled Oscillator (VCO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

2.5.9.5 Manchester/BiPhase Encoder with bit Rate Generator . . . . . . . . . . . . . . . . . . 81

2.5.10 LF Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

2.5.11 16Bit CRC (Cyclic Redundancy Check) Generator/Checker . . . . . . . . . . . . . . . 86

2.5.12 Pseudo Random Number Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

2.5.13 Timer Unit (Timer 0, Timer 1, Timer 2, Timer 3) . . . . . . . . . . . . . . . . . . . . . . . 90

2.5.13.1 Basic Timer Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

2.5.13.2 General Operation Description Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . 93

2.5.13.3 Timer Modes for Timer 2 and Timer 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

2.5.14 General Purpose Input/Output (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

2.5.14.1 Peripheral Port Basic Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

2.5.14.2 Spike Suppression on Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

2.5.14.3 External Wakeup on PP1-PP4 and PP6-PP9 . . . . . . . . . . . . . . . . . . . . . . . . 109

2.5.14.4 Alternative Port Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

2.5.15 I2C- Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

2.5.15.1 Slave mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

2.5.15.2 General call sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

2.5.15.3 Master mode sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

2.5.16 Serial Peripheral Interface SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

2.5.17 PROGRAMMING mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

2.5.17.1 FLASH Write Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

2.5.17.2 FLASH Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

2.5.17.3 FLASH Check Erase Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120

2.5.17.4 FLASH Read Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

2.5.17.5 FLASH Set Lockbyte 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

2.5.17.6 FLASH Set Lockbyte 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

2.5.17.7 Read Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122

2.5.18 DEBUG mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

2.5.18.1 Debug Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

2.5.18.2 Debugging Facility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123

2.5.18.3 Debugger Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

3 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

Preliminary Data Sheet 7 V0.9, 2008-04-28

PMA7110

3.1 Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

3.1.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126

3.1.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

3.1.3 Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

3.2 Reference SFR Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

3.3 Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

4 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Preliminary Data Sheet 8 V0.9, 2008-04-28

PMA7110

Product Description

1 Product Description

1.1 Overview

The PMA7110 is a low power wireless FSK/ASK Transmitter with embedded microcontroller, which offers a single chip solution for various industrial, consumer and automotive applications in frequency bands 315/434/868/915 MHz. With its highly integrated mixed signal peripherals, PMA7110 requires only few external components. The operating voltage range is 1.9 - 3.6 V.

The PMA7110 contains

• 8051 based microcontroller

• Advanced power control system to minimize power consumption

• RF transmitter

•LF receiver

• Multifunctional interface for external Sensors and embedded temperature and battery voltage sensor

Measurement via embedded temperature and voltage sensor, reading signal from analog inputs (e.g. from external analog sensor) are performed under software control, so that the microcontroller can format and prepare this data for the RF transmission.

An intelligent power control system enables the build of ultra low power applications by using powersaving modes.

The integrated microcontroller is instruction set compatible to the standard 8051 processor. It is equipped with various peripherals (e.g. a hardware Manchester/BiPhase Encoder/Decoder and CRC Generator/Checker) enabling an easy implementation of customer-specific applications.

The low power consumption FSK/ASK Transmitter for 315/434/868/915 MHz frequency bands contains a fully integrated VCO, a PLL synthesizer, an ASK/ FSK modulator and an efficient power amplifier. Fine tuning of the center frequency can be done by an onchip capacitor bank.

To store the microcontroller application program code and its unique ID-Number, an onchip FLASH memory is integrated. Additional ROM storage is provided for the ROM library functions covering standard tasks required by various applications.

Preliminary Data Sheet 9 V0.9, 2008-04-28

PMA7110

Product Description

1.2 Features

• Supply voltage range from 1.9 V up to 3.6 V

• Operating temperature range -40 to +85 °C

• Low supply current

• Temperature sensor

• Battery voltage measurement

• Integrated RF- transmitter for ISM band 315/434/868/915 MHz

• Selectable transmit power 5/8/10 dBm into 50 Ohm load

• Transmit data rates up to 32kbit/s or 64kchips/s in manchester code

• FSK/ASK modulation capability

• Frequency deviation up to 100 kHz in FSK mode

• Fully integrated VCO and PLL synthesizer

• Crystal oscillator tuning on chip

• LF receiver with input signal amplitude of min. 0.25 mVpp

• LF receiver data rate from 2000 bit up to 4000 bit (Manchester/BiPhase coded)

• 8051 instruction set compatible microcontroller (cycle-optimized)

• 6 kbyte Flash Code and 2x128 bytes flash data memory (for user-application like EEPROM emulation)

• 12 kbyte ROM (for ROM library functions)

• 256 bytes RAM (128 bytes configurable to keep content in Power Down mode), 16 bytes XData memory (supplied in PowerDown)

C bus interface

•I

• SPI bus interface

• 10 free programmable bidirectional GPIO pins with on chip pull-up/down resistors

• 4 independent 16 bit timers

• 10bit ADC with 3 pair differential channels (e.g. as IO for external sensors)

• Wakeup from POWER DOWN state using the Interval Timer, the LF receiver or external wakeup sources connected via a GPIO

• Manchester/BiPhase encoder and decoder

• Hardware CRC generator

• Pseudo Random Number Generator

• Watchdog timer

• on chip debugging via I

C interface

Note:In PMA7110 the Thermal Shout down function is not used.

1.3 Applications

• Remote control systems for industrial and consumer applications

• Security- and Alarm-systems

• Home automation systems

• Automatic meter reading

• Active Tagging

Preliminary Data Sheet 10 V0.9, 2008-04-28

2 Functional Description

2.1 Pin Description

PMA7110

Functional Description

VDD (sens )

V1N (s ens)

VM1 (sens)

V1P (sens )

GNDB

GNDA

VBat

PGND

GND

PP2/W U1/ TXDATAOut

PP1/W U0/ I2C _SDA/OPM ode2

PP0/I 2C_SC L/OPMode1

PP3/SPI _CS/WU2

PP4/W U3/ SPI_MISO

PP5/SPI _MOSI

PP6/W U4/ SPI_Clk

xRes et

PP7/Ext_Int1/WU5

PMA7110

V2N (sens)

VM2 (s ens)

V2P (sens)

RD (sens)

GNDC

VDDA

VDDD

VReg

xLF

AMUX2

AMUX1

XGND

XTAL/SCLK

XTALCAP

TME

MSE

PP9/Ext_Int0/WU

PP8/WU6

Figure 1 Pin-out of PMA7110 in TSSOP38 package

Preliminary Data Sheet 11 V0.9, 2008-04-28

PMA7110

Functional Description

Table 1 Pin Description

Pin Name Type Description Comments

1 VDD(sens.) Supply Sensor positive supply same voltage as chip

2 V1N(sens.) Analog Channel1, negative sensor input output of wheatstone

3 VM1(sens.) Supply Sensor negative supply same voltage as chip

4 V1P(sens.) Analog Channel1, positive sensor input output of wheatstone

5 GNDB Supply Ground

6 GNDA Supply Ground

7 VBat Supply Battery supply voltage

8 PGND Supply RF transmitter ground

9 PA Analog RF transmitter output

10 GND Analog Ground

11 PP2/WU1/

TXDATAOut

12 PP1/WU0/

I2C_SDA/

OPMode2

13 PP0/

I2C_SCL/

OPMode1

14 PP3/SPI_CS/

WU2

15 PP4/WU3

/SPI_MISO

16 PP5/

SPI_MOSI

17 PP6/WU4

/SPI_Clk

Digital GPIO, External wakeup source,

Serial output of

Manchester/Biphase encoded data

Digital GPIO, External wakeup source, I2C

bus interface data, Select operation

mode

Digital GPIO, I2C bus interface clock,

Select operation mode

Digital GPIO, SPI bus interface chip select,

External wakeup source

Digital GPIO, SPI bus interface master in

slave out, External wakeup source

Digital GPIO, SPI bus interface master out

slave in

Digital GPIO, SPI bus interface clock,

External wakeup source

analog supply

bridge sensor

GND

bridge sensor

internal

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

Preliminary Data Sheet 12 V0.9, 2008-04-28

PMA7110

Functional Description

Table 1 Pin Description

Pin Name Type Description Comments

18 xReset Digital External reset low active

19 PP7/WU5

/Ext_Int1

20 PP8/WU6 Digital GPIO, External wakeup source internal

21 PP9/WU7

/Ext_Int1

22 MSE Digital Mode select enable high active, set to

23 TME Digital Test mode enable high active, set to

24 XTALCAP Analog Crystal oscillator load capacitance

25 XTAL/SCLK Analog Crystal oscillator input, External

26 XGND Supply Crystal oscillator ground

27 AMUX1 Analog additional differential ADC standard

28 AMUX2 Analog additional differential ADC standard

29 XLF Analog Differential LF receiver Input2

30 LF Analog Differential LF receiver Input1

31 VReg Supply Internal voltage regulator output connect to

32 VDDD Supply Digital supply

33 VDDA Supply Analog supply

34 GNDC Supply Ground

35 RD(sens.) Analog use only by having

Digital GPIO, External wakeup source internal

Digital GPIO, External wakeup source,

External Interrupt source

reference clock

input1 for external sensor

input2 for external sensor

pullup/pulldown

switchable

pullup/pulldown

switchable

internal

pullup/pulldown

switchable

GND in normal mode

connect to GND if not

decoupling capacitor

diagnostic resistor on

use

=100nF)

BCAP

sensor bridge,

otherwise none

connection

Preliminary Data Sheet 13 V0.9, 2008-04-28

PMA7110

Functional Description

Table 1 Pin Description

Pin Name Type Description Comments

36 V2P(sens.) Analog Channel2, positive sensor input output of wheatstone

37 VM2(sens.) Supply Sensor negative supply same voltage as chip

38 V2N(sens.) Analog Channel2, negative sensor input output of wheatstone

bridge sensor

GND

bridge sensor

Preliminary Data Sheet 14 V0.9, 2008-04-28

PMA7110

Functional Description

Table 2 Pin I/O equivalent schematics

PAD name Equivalent I/O Schematic Function

No.

1 VDD (Sens.) Sensor Positive

Volt ag e

Regulator

Supply

VBat

VReg

VDD (sens)

GND

Swit ch

GND

2 V1N (Sens.) Channel 1

Negative Signal

V1N

VDD A

500

Preliminary Data Sheet 15 V0.9, 2008-04-28

Functional Description

PAD name Equivalent I/O Schematic Function

No.

3 VM1 (Sens.) Channel 1

VDD A

VM1

GND

Negative Supply

4 V1P (Sens.) Channel 1

VDD A

Positive Signal

PMA7110

V1P

500

5 GNDB Ground

PGND

GNDB

XGND

Preliminary Data Sheet 16 V0.9, 2008-04-28

PMA7110

Functional Description

PAD name Equivalent I/O Schematic Function

No.

6 GNDA

PGND

GNDA

XGND

7 VBat Power supply

VBat

voltage regulators

Volta ge

Regulator

VReg

8PGND

double bond

PGND

GND

XGND

Power amplifier ground

Preliminary Data Sheet 17 V0.9, 2008-04-28

PMA7110

Functional Description

PAD name Equivalent I/O Schematic Function

No.

9 PA Power amplifier

10 GND

PROGRAM7V

PGND PGND

100

output stage

11 PP2/WU1

/TXDATAOut

PP2

VBat

Pullup Pulldow n Tristate

GND

250k

1.8 ... 3.6V

VBat

Data

Tristate

500

GND

AMUX3 TG

Combinatorial

VBat

GND

PPS2

PPO2

Core

DMUX1

Logic

PPD2

TXDATA

RfTXPEn

Core

AMUX3

analog signals

PPI2

GPIO port WU1 Serial output of Manchester/Biphase encoded data

PPO2

DMUX2

tmd1_xclkdiv

tmd1_wucde

tmd1_lfraw

tmd1_clk_cpu

tmd1_pll_fc

PPO2

Preliminary Data Sheet 18 V0.9, 2008-04-28

Functional Description

PAD name Equivalent I/O Schematic Function

No.

12 PP1/

WU0/I2C_SDA /OPMode2

VBat

Pullup Pulldown Trist ate

Combinatorial

GND

50k

PPS1

Logic

PMA7110

GPIO port WU0 I2C_SDA OPMode2

13 PP0/I2C_SCL

/OPMode1

PP1

PP0

VBat

Data

50k

500

VBat

GND

Data

Trist ate

Pullup Pulldow n Tri stat e

GND

Data

Tristate

PPO1

PPD1

I2CD

Logic

Combinatorial

I2CEn

PPI1

GPIO port I2C_SCL OPMode1

PPS0

Logic

Combinatorial

PPO0

PPD0

I2CClk

Logic

Combinatorial

I2CEn

PPI0

Preliminary Data Sheet 19 V0.9, 2008-04-28

Functional Description

PAD name Equivalent I/O Schematic Function

No.

14 PP3/SPI_CS

/WU2

PP3

VBat

Pullup Pulldown Trista te

GND

250k

VBat

Data

Trista te

500

GND

PPS3

Logic

PPO3

Comb i n at or i al

Core

DMUX2

PPO3

DMUX4

DMUX3

tmd2_wucdet

Logi c

Combinatorial

tmd2_lfraw tmd2_bitbounddet

tmd2_decerr PPO3

PPD3

PPI3

PMA7110

GPIO port WU2 SPI_CS

15 PP4/WU3

/SPI_MISO

VBat

PP4

Data

16 PP5/SPI_MOSI GPIO port

VBat

PP5

Data

VBat

Pullup Pulldown Trist ate

GND

50k

VBat

Trist ate

500

GND

VBat

Pullup Pulldown Tristat e

GND

50k

VBat

Tristate

500

GND

Data

Logic

Combinat ori al

Logic

Combinator i al

Logic

Combinat ori al

Logic

Combinator i al

PPS4

PPO4

PPD4

SPI_MISO

SPIEn

PPI4

PPS5

PPO5

PPD5

SPI_MOSI

SPIEn

PPI5

GPIO port WU3 SPI_MISO

SPI_MOSI

Preliminary Data Sheet 20 V0.9, 2008-04-28

Functional Description

PAD name Equivalent I/O Schematic Function

No.

17 PP6/WU4

/SPI_Clk

PP6

VBat

Pullup Pulldown Tristate

GND

50k

VBat

Data

Tristate

500

GND

PPS6

Logic

PPO6

Combinatorial

Core

DMUX3

PPO6

DMUX5

PPD6 SPI_Clk SPIEn

PPI6

tmd3_syncmat ch

PPO6

Logic

Combinatorial

GPIO port WU4 SPI_Clk

18 xReset Reset input

VBat

50k

xRese t

500

Rese

PMA7110

19 PP7/WU5

/Ext_Int1

PP7

VBat

Pullup Pulldown Tristate

GND

50k

VBat

Data

Tristate

500

GND

PPS7

Logic

PPO7

Comb i na to r i a l

Core

DMUX4

Logi c

Combinator ial

PPD7

PPI7

GPIO port WU5 Ext_Int1

PPO7

DMUX6

tmd4_chipvalid

PPO7

Preliminary Data Sheet 21 V0.9, 2008-04-28

Functional Description

PAD name Equivalent I/O Schematic Function

No.

20 PP8/WU6 GPIO port

PP8

VBat

Pullup Pulldown Tristate

GND

250k

VBat

Data

Tristate

500

GND

PPS8

Logic

PPO8

Comb i na t or i a l

Core

DMUX5

HiRC Clock

tmd6_tr_so

Logi c

Combinatorial

tmd5_flash_dig0

PPO8

PPD8

PPI8

WU6

PMA7110

21 PP9/WU7

/Ext_Int0

PP9

Data

250k

VBat

Pullup Pulldown Tristate

GND

VBat

Data

Tristate

500

GND

PPS9

Logic

PPO9

Combinatori al

Core

DMUX6

LoRC Clock

tmd5_chip

Logi c

Combinato ri a l

tmd6_flash_dig1

PPO9

PPD9

PPI9

GPIO port WU7 Ext_Int0

22 MSE Mode Select Enable

VBat

MSE

500

250k

MSE_i

Preliminary Data Sheet 22 V0.9, 2008-04-28

PMA7110

Functional Description

PAD name Equivalent I/O Schematic Function

No.

23 TME Test Mode Enable

VBat

TME

500

TME_i

250k

24 XTALCAP Crystal oscillator

XTALCAP

XGN D XGND

output

25 XTAL/SCLK Crystal oscillator

VDDD

input SCLK

XTAL

500

XGND

≈ 0.9Vdc

Bypass

Preliminary Data Sheet 23 V0.9, 2008-04-28

PMA7110

Functional Description

PAD name Equivalent I/O Schematic Function

No.

26 XGND Crystal oscillator

PGND

GND

XGND

27 AMUX1

Core

GND

AMUX1

VDDA

500

GND

28 AMUX2 Additional

Core

AMUX2

VDDA

500

ground

Additional differential ADC standard input1 for

external sensor Analog Testsignal

Port

differential ADC standard input2 for

external sensor,

Analog Testsignal Port

GND

29 xLF Low Frequency

xLF

GND

xLF_i

15k

Preliminary Data Sheet 24 V0.9, 2008-04-28

Input

PMA7110

Functional Description

PAD name Equivalent I/O Schematic Function

No.

30 LF Low Frequency

Voltage

Regulator

Input

supply

GND

15k

LF_i

31 VReg Regulated Power

VBat

VReg

GND

32 VDDD Digital Supply

1.6 ...2.5 V

VDDD

Digi tal

core

GND

33 VDDA Analog Supply

VDDA

Ana log

core

GND

Preliminary Data Sheet 25 V0.9, 2008-04-28

Functional Description

PAD name Equivalent I/O Schematic Function

No.

34 GNDC Ground

PGND

GNDC

XGND

35 RD (sens.) Connect to

VDDA

diagnostic resister on sensor bridge, otherwise no connection

500

100k

PMA7110

36 V2P (sens.) Channel 2

VDDA

V2P

500

Preliminary Data Sheet 26 V0.9, 2008-04-28

Positve Signal

Functional Description

PAD name Equivalent I/O Schematic Function

No.

37 VM2 (sens.) Channel 2

VD DA

VM2

Negative Supply

38 V2N (sens.) Channel 2

VDDA

Negative Signal

PMA7110

V2N

500

Preliminary Data Sheet 27 V0.9, 2008-04-28

2.2 Functional Block Diagram

PMA7110

Functional Description

256 B

RAM

Diff . hig h sens itiv e inp ut1

12MHz RC

HF Os cillat or

V1P

V1N

Diff. high sensitiv e input2

V2P

V2N

Diff. standard input

AMUX1 AMUX2

Vmin

and

TMAX

detec tor

Voltage R egulat ors

Low power V-reg

Vbat

Vreg

Input multiplexer

ADC

Low

dropout

V-reg

VDDA

VD DD

Reference

volt age &

offset DAC

ADC state

machine

Bandgap and

PTAT

PRNG

GN D

ADC

Brownout

detect or

Interval timer

Figure 2 PMA7110 Block Diagram

6 kB 6 kB

Flash Flash

Mic rocontroller wit h 8051 core

Interrupt controller

Sys tem c ontrolle r

Reset

Cloc k cont roller

Timer calibration

2kHz RC

Osci llator

12 kB ROM

Wake U p

Test Controller

Power Mgm

Specia l function

registers (SFR)

General Purpos e

Input/Output

(GPIO, I2C, SPI,

WU…)

RF transmitter

RF-PLL

Codes

modulat or

Manchester 101 Phase

LF rec eiver

Digi tal

Receiver

detec tor

CRC

generator

ASK

Carrier

Watch

dog

timer

...

Power

Amp

Crystal

Oscillator

FSK

modulat or

125kH z

Receiver

Timer

PP0 PP1 PP2

PP9

...

xReset

PGND

XTAL

XTALCAP

XGND

xLF

MSE TME

Preliminary Data Sheet 28 V0.9, 2008-04-28

Functional Description

2.3 Operating Modes and States

The PMA7110 can be operated in four different operating modes.

•NORMALmode

•PROGRAMMINGmode

• DEBUG mode

• (internal production TEST mode)

2.3.1 Operating mode selection

SYSTEM RESET **

POR, xReset

Software reset

Brown-o ut event

PMA7110

TME = 1

SCAN Test

Mode

MSE = 1 PP0=0 PP1=1 Lockbyte II not set

PROGRA MMING

Mode

MSE = 1 PP0=0 PP1=0

TEST M ode 0 * DEBUG Mode

SFR CFG0.3=0

Functional Test mode

TME = 0

Mode Select

MSE = 1 PP0=1 PP1=0 Lockbyte II not se t

NORMAL

L o

b y

t e

F G

*Note: If Lockbyte I and/or II is set, only a reduced

Test command set is ava ilable

e t

**Note: Whenever TME is set to high the current operation mode is left and SCAN Test mode is entered, regardle ss if there was a reset event or not!

MSE = 0

MSE = 1 PP0=1|1|0 PP1=1|0|1 Lockbyte II set

MSE = 1 PP0=1 PP1=1 Lockbyte II not set

Mode

Figure 3 Operating mode selection of the PMA7110 after Reset

The Mode Select is entered after the System Reset expires and SCAN Test mode is not selected. The levels on the the I/O pins PP0 and PP1 are latched by the System controller and read by the operating system to determine the mode of operation of the device according to Table 3 "Operating mode selection after Reset" on Page 30. Therefore also the status of MSE and Lockbyte II from the FLASH are checked. The

Preliminary Data Sheet 29 V0.9, 2008-04-28

PMA7110

Functional Description

MSE, PP0 and PP1 levels must not change after reset release during the whole t

MODE

period (see Figure 5 "Power On Reset - operating mode selection" on Page 32).

Table 3 Operating mode selection after Reset

TME MSE Lock

3.)

x x x x SCAN external Test

PP0 PP1 Operating

byte II

mode

Devicecontrol Hardware

restrictions

n.a.

machine

0 0 x x x NORMAL CPU executing

Flash write disabled

from 4000h

0 1 x 0 0 TEST TEST mode

None

handler

01not

0 1 set 0 1 NORMAL CPU executing

0 1 PROGRAMMING PROGRAM

set

None

mode handler

Flash write disabled

from 4000h

01not

0 1 set 1 0 NORMAL CPU executing

1 0 DEBUG DEBUG mode

set

Flash write disabled

handler

Flash write disabled

from 4000h

0 1 x 1 1 NORMAL CPU executing

Flash write disabled

from 4000h

1.) Flash protection is done by hardware. In these modes setting the SFR bits FCS.3 [PROG] and FCS.2 [ERASE] is not possible.

2.) Flash programming and erasing is only possible via ROM Library functions.

3.) Whenever TME is set to high the current mode is left immediately and SCAN Test Mode is entered, regardless if there is a reset or not.

2.)

Preliminary Data Sheet 30 V0.9, 2008-04-28

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