Infineon MOSFET User Manual
Application Note Please read the Important Notice and Warnings at the end of this document V 1.1
www.infineon.com page 1 of 54 2021-02-01
AN_1906_PL18_1908_180413
Scalable power inverter driving an electric
motor
Using the low voltage drives scalable power demonstration board
About this document
Scope and purpose
The low voltage drives scalable power demonstration board is a scalable platform for high power motor drive
applications. It has been developed to provide a flexible test environment for initial designs and technology
comparison. This document provides a detailed description of the platform modules, so the user will be able to
adapt the boards according to specific system requirements, and investigate and compare the capabilities of
power MOSFETs.
Intended audience
This document is intended for engineers using the "Low voltage drives scalable power demonstration board"
evaluation platform, or those evaluating the platforms suitability for use.
Table of contents
About this document ....................................................................................................................... 1
Table of contents ............................................................................................................................ 1
1 Introduction .......................................................................................................................... 3
2 Board overview ...................................................................................................................... 4
2.1 Power boards .......................................................................................................................................... 5
2.2 Master Mother Board and Mother Boards ............................................................................................ 10
2.2.1 Gate drivers option I – 2EDL23N06PJ .............................................................................................. 13
2.2.2 Gate drivers option II – 1EDN8550B ................................................................................................. 14
2.2.2.1 Functional principle of the 1EDN8550B (TDI) gate driver .......................................................... 15
2.2.2.2 Performance results with KIT_LGMB_BOM004 & KIT_LGMB_BOM504 ..................................... 16
2.3 Daughter boards .................................................................................................................................... 21
2.4 Functional principle of the 1EDN8550B (TDI) gate driver Capacitor boards ....................................... 22
2.5 Control board ........................................................................................................................................ 24
3 Three phase motor drive setup (B6) ......................................................................................... 25
3.1 Supply voltage ....................................................................................................................................... 26
3.2 Board interconnections in multiphase setups and power board paralleling ..................................... 26
3.2.1 Control signals – control board interface ........................................................................................ 27
3.2.2 Mother board bus ............................................................................................................................. 28
3.2.3 Daughter board bus ......................................................................................................................... 29
3.3 Using the V/f control for induction motor ............................................................................................ 29
3.3.1 Using the GUI .................................................................................................................................... 32
3.3.2 Driving an induction motor .............................................................................................................. 34
4 Performance of a B6 setup in a motor drive application ............................................................. 36
4.1 No paralleling ........................................................................................................................................ 37
4.1.1 Operating point 1 ............................................................................................................................. 38
4.1.2 Operating point 2 ............................................................................................................................. 40
4.2 Two per phase parallel connection ...................................................................................................... 42
Application Note 2 of 54 V 1.1
2021-02-01
Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Introduction
4.2.1 Operating point 3 ............................................................................................................................. 43
4.2.2 Operating point 4 ............................................................................................................................. 46
4.3 Four per phase parallel connection ...................................................................................................... 48
4.3.1 Operating point 5 ............................................................................................................................. 49
5 Summary ............................................................................................................................. 51
6 Reference ............................................................................................................................. 52
Revision history............................................................................................................................. 53
Application Note 3 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Introduction
1 Introduction
The low voltage drives scalable power demonstration board offers the possibility of building a three-phase
motor drive setup of various power capabilities due to its MOSFET paralleling flexibility. The setup shown in
Figure 1 is an example of a three-phase inverter (also known as a B6 topology) for motor drive. The detailed
procedure of building such a setup is described in the “Low voltage drives scalable power demonstration board
user manual” [1].
The example is implemented with four MOSFETs connected in parallel in place of each B6 switch. The platform
was designed to be able to adapt the amount of MOSFET paralleling to the system requirements, by simply
adding or removing the power half-bridge modules. All components typically used for trimming performance
are located on FR4-based modules, while the power modules are implemented in IMS PCB technology adapted
to improve heat transfer using additional heatsinks – air-cooled or water-cooled.
This application note describes the details of the individual modules, their interconnection, and a graphical
user interface (GUI) complementing the supporting firmware. The aim is to provide the user with sufficient
knowledge to be able to utilize the modules in a working setup, and adapt the circuits to their own
requirements.
The examples provide a performance overview of the three-phase setup.
Figure 1 Typical setup for three-phase motor drive
Application Note 4 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
2 Board overview
The modular platform consists of different boards (modules) that can be used to design a fully functional
assembly, where each board has a specific role in a given setup. The modularity offers a wide range of possible
topologies. The concept supports half-bridge, full-bridge or three-phase topologies.
The basic principle of board functionality is illustrated in the block diagram in Figure 2.
Figure 2 Modular design – basic principles
By role (or functionality) in the setup, the modules are divided into five categories:
Power board: MOSFET half-bridge configuration
Mother board and master mother board: gate driver board – connects to the first paralleled power board
Daughter board: interconnection between the gate driver and the paralleled power boards
Capacitor board: PCB accommodating up to 12 capacitors connected to the DC bus
Control board: drive card XMC4400 demonstration board
Figure 2 shows a single-power half-bridge (power board), driven by the gate drivers (master mother board)
controlled by the XMCTM drive card (control board). Any setup is controlled by a control board (e.g. XMCTM drive
card – XMC4400) connected to the master mother board via the X3 connector.
The setup can be expanded to a multiphase setup using additional mother boards connected at the mother
board bus(MB bus) via a ribbon cable.
Each phase can be expanded with several power boards connected in parallel.
Application Note 5 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 3 Single-phase assembly with paralleled power boards (exploded view)
Figure 3 shows an example of a single-phase (“U”) assembly with four power boards connected in parallel,
interconnected to the corresponding master mother board and three daughter boards.
2.1 Power boards
The power boards are the main building blocks of the three-phase assembly. They are IMS PCB-based halfbridge sub-assemblies, comprising a single high-side (HS) and a single low-side (LS) MOSFET with all the
necessary connectors for power and signal lines.
Figure 4 shows the different versions of the power boards available.
Application Note 6 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 4 Power board versions: TOLL, D
2
PAK-7, D2PAK
Each board implements a different MOSFET package while maintaining the same interconnection layout, so
that all the different power board versions are interchangeable.
The featured packages are:
TO-leadless (TOLL)
D
2
PAK-7 (PG-TO263-7)
D
2
PAK (PG-TO263-2)
All available versions with regard to specific MOSFET products are provided online.
Application Note 7 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 5 Power board schematic
The schematic shown in Figure 5 applies to all the power board versions. A number of test point connectors are
provided on the boards, since the platform is intended for test purposes.
The SMD connectors X3, X4 and X5 are provided for interconnection with high current capability. Either cable
lugs or copper bars can be used for the power connection to the connector via standard M5 screws.
Connectors X1 and X2 connect to the HS and LS MOSFETs respectively. All three MOSFET node (G, D, S)
connections are provided at the X1 and X2 connectors. The gate (G) and source (S) nodes connect to the gate
driver circuitry. Additionally, the HS drain (D) and the LS source (S) (i.e. the DC bus) are connected to a ceramic
capacitor located on the (master) mother boards or daughter boards via X1 and X2 connectors. The ceramic
capacitor provides the additional DC bus stability due to its proximity to the respective power board.
The test points (TP2, TP3, TP4, TP5) are small test hooks provided for connection of the oscilloscope probe clip.
The jumper (J1) provided at the HS drain (the VDD+ node) enables the user to utilize a Rogowski current probe
for HS MOSFET drain current measurements (ID), as demonstrated in Figure 6. The current I
VDD
flowing from the
DC power supply V
DD+
through the X3 power terminal is split between the MOSFET drain current ID, and IC
(current flowing to the capacitor through X1). Considering that the capacitor current IC is flowing through the J1
jumper, the user can choose between measuring ID (Rogowski coil enclosing X3 and J1) and I
VDD
(Rogowski coil
reaching around X3 and above J1).
Application Note 8 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 6 Rogowski probe for measuring HS I
D
or I
VDD
2.1.1 Power board PCB layout
The IMS boards are intended to be attached to a heatsink via six M2 screws. To prepare the threaded holes in
the heatsink consider the dimensions in Figure 7. The placement of the screw holes and the power connectors
are the same for all the power board versions of the modular platform.
When machining the copper bars for the power connections, 19 mm spacing between the screw holes is
recommended.
Figure 7 Power board layout and dimensions
Application Note 9 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
2.1.2 IMS board and heatsink
The power boards use the Ventec VT-4B3 IMS type. Table 1 lists some of the main properties.
Table 1 IMS board details
Description
Dimension
Substrate thickness
1.4 mm
Dielectric thickness
100 µm
Copper thickness
105 µm
Overall board thickness
1.6 mm
Dielectric specific thermal conductivity λ [W/m*K]
3 W/(m*K)
2.1.3 Board assembly and X-ray investigation of the power boards
The soldering method used for the IMS board assembly was vapor phase soldering. The temperature profile of
this process is similar to the standard reflow process, with the peak temperature of the process at 250°C
defined by the phase change temperature of the inert liquid being used. The reflow zone time interval was 3
minutes.
Figure 8 Temperature profile [2]
Further details and recommendations for assembly of Infineon packages are available online [2].
X-ray imaging was used to inspect the quality of the soldering process. The result is shown in Figure 9. A certain
number of voids are to be expected and can only be eliminated using a more advanced process of reflow
soldering in vacuum. However, the images show a fairly successful result with voids representing less than 10
percent of the soldered surface area.
Application Note 10 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 9 X-ray inspection – voids between lead-frame and PCB
2.2 Master mother board and mother boards
The master mother board and the mother board shown in Figure 10 provide the gate drivers for the HS and LS
MOSFETs for each of the half-bridges, as shown in Figure 11.
Figure 10 Master mother board and mother board
Application Note 11 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 11 Utilization of master mother board and mother boards in multiphase setups (e.g. U, V, W)
The difference between the two is in the connection to the XMCTM control board. The control board connects to
the master mother board, and the signals to the mother boards are propagated via the mother board bus.
Mother boards are only used alongside the master mother board when a two- or three-phase system is
implemented, as shown in Figure 11.
The master mother board also includes the onboard power supply sub-circuit that provides the 5 V supply line
powering the XMCTM control board. The 15 V supply for the gate drivers is propagated via the mother board bus
to the mother boards.
System supply
Note: The master mother board must be supplied from an external 15 V power source (at the X1
connector teminal).
The onboard IFX91041EJV50 generates the 5 V supply.
Application Note 12 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 12 15 V to 5 V converter (master mother board)
DC bus ceramic capacitors
The master mother board and the mother boards provide a ceramic capacitor C17(c) connected to the high
voltage DC bus through the X2 and X5 headers. The intention is to provide the low ESR capacitors as close as
possible to each of the power boards in order to stabilize the DC bus voltage.
Figure 13 DC bus capacitor
Current sensor connection
The X4 connector on the master mother board, enables the user of optionally connecting voltage nodes or
current sensors, to the microcontroller analog inputs. The subcircuit is shown in Figure 14
A Samtec FTSH-105-01-L-D-K header connector can be used in place of the X4 connector to interface the
external sensors. The voltage dividers need to be adjusted according to the sensor output voltage range, and
the filtering capacitors to the required frequency range. The pins on X4 are intended to connect to the external
nodes while the nodes leading to the XMCTM inputs through the X3 connector are:
I_U
I_V
I_W
V_DClink
Application Note 13 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
The connection of two-phase current sensors enables the current limit feature in the GUI (described in chapter
3.3). The feature uses the two-phase currents to calculate the current vector amplitude and compares it to the
current limit set in the GUI.
In order to enable the feature, the current sensors need to be connected to:
SENSE_PH_U (X4 - pin 2)
SENSE_PH_W (X4 - pin 4)
Figure 14 Current sensor connection
2.2.1 Gate drivers option I – 2EDL23N06PJ
KIT_LGMB_BOM003 & KIT_LGMB_BOM503
The 2EDL family gate drivers feature integrated HS and LS gate drivers, with an integrated bootstrap diode. The
gate driver output signals are propagated to the power board through header connectors X2 and X5. Mother
boards also include the gate resistors (RG1, RG2) for the two MOSFET gates connected at X2 and X5.
The default populated gate resistor (RG1 and RG2) values are 47 Ω. This value is suitable to be used with most
of the MOSFETs; however, it is not to be considered an optimum value. The intention of the platform is to
provide the option to easily change the RG values and adapt them to specific application requirements.
Application Note 14 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 15 Mother board implementation of 2EDL23N06PJ
In addition to the gate resistors, the board offers the possibility to connect additional capacitors between the
MOSFET terminals (G-S, G-D, D-S), as shown in Figure 16 for the HS and LS MOSFETs (refer to Figure 5 for power
board connections). This enables even greater influence on switching behavior optimization.
The components (C14, C15, C16, R11, C18, C19, C24, R25) are not populated by default. Only the PCB footprints
are available for the user to utilize according to project requirements.
Figure 16 Power board interface – MOSFET interconnection
2.2.2 Gate drivers option II – 1EDN8550B
KIT_LGMB_BOM004 & KIT_LGMB_BOM504
The pin-outs of the external connections are functionally the same in both options to accommodate
interchangeablity of the mother boards in the overall system. Other than some layout improvements, the
differences between the options are associated with the gate driver specifics.
Application Note 15 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Figure 17 Mother board implementation of 1EDN8550B
2.2.2.1 Functional principle of the 1EDN8550B (TDI) gate driver
The EiceDRIVER™ 1EDN8550B is a single-channel non-isolated gate driver with truly differential inputs (TDI) [3].
This concept for the input side of the gate driver makes it able to overcome the driving issues when a DC
ground-shift or an AC oscillation exists between the microcontroller and the driver IC ground potentials.
Common situations characterized by DC and AC ground-shifts are, for example, driving a HS switch in a halfbridge configuration, or driving in noisy environments with significant stray inductance on the ground path.
Some interesting use cases can be found in industrial, server and telecom SMPS as well as motor drive, wireless
charging applications, home appliances, power tools and solar micro-inverters. Figure 18 represents the
functional principle of the TDI gate driver and how it should be connected to the controller in order to
effectively prevent false triggering of the power switches.
IN+
IN-
Differential
Schmitt
Trigger
Av = 4.5
12 MHz
2nd order
Lowpass
Controller
PWM
SGND
0
R
in1
R
in2
2kW
2kW
1kW
1kW
15pF
15pF
1EDN8550
GND
Pulse
Extender
C
p2
C
p1
VS 5V
DV
Rin
DV
Rin
/ k
k = (R
in
[kW] + 3) / 3 = (51 + 3) / 3 = 18
51kW
51kW
Figure 18 Functional principle of the single-channel non-isolated gate driver with TDI
The controller PWM output signal, switching between controller supply voltage (VS) and zero, is applied on one
leg of a differential voltage divider, while the other is connected to the controller ground SGND. The divider
ratio has to be adapted to VS to allow a fixed Schmitt trigger threshold voltage. For VS = 5 V, R
in1
and R
in2
are
chosen to be 51 kΩ (see Table 1 [4]), resulting in a static divider ratio of k = 18 at the driver inputs. Taking into
account the resistor-capacitor (RC) filter in front of the internal voltage amplifier, the overall input path exhibits
the frequency behavior of a third-order low-pass filter with a corner frequency around 12 MHz. The suppression
of high frequencies is important for two reasons. Inductive common-mode (CM) ringing in fast-switching power
systems is typically in the 100 MHz and above range, and thus is effectively damped. The high-frequency
symmetry of the voltage divider is influenced by parasitic capacitances, particularly Cp1 and Cp2, the parallel
HO
LO
PHASE
HO
LO
1 2
D3
S100
HIN
LIN
HINGD
LINGD
0603
R2
1R/1%
0603
R4 33k/0.1%
0603
R8 33k/0.1%
HIN
LIN
When HIN and LIN max 3.3V then R1,R3,R4,R8=33k, 0603, 0.1% (PHASE voltage limited to 84V)
PGND
1206
Rp3
0R
+15V
RG3
4.7R
VDD
4
IN_P
3
IN_N
1
OUT_SNK_N
6
GND
2
OUT_SRC_N
5
U1
1EDN8550B
VDD
4
IN_P
3
IN_N
1
OUT_SNK_N
6
GND
2
OUT_SRC_N
5
U3
1EDN8550B
0R 1206
Rp2
22u/25V/X5R
1206
C12
4.7u/25V/X7R
1206
C9
Use 20x MOSFET input capacitance for Bootstrap capacitor
RG4
4.7R
0603
R1
33k/0.1%
0603
R3
33k/0.1%
Rp1
0R 1206
Application Note 16 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
capacitances of R
in1
and R
in2
. They are typically in the 50 to 100 fF range, independent of resistor size. Without
filtering, any asymmetry would translate high-frequency CM signals into differential signals. The filtered signal
is then applied to a differential Schmitt trigger with accurate trimmed threshold levels and converted to the
logic switch control signal. The subsequent pulse extender function guarantees that no pulses shorter than 25
ns are transmitted to the output, thereby further improving noise immunity. Due to the filtering requirements,
the input-to-output propagation delay is slightly increased to around 45 ns. By means of on-chip trimming,
however, the usually more relevant propagation delay variation can still be kept low at +10/-7 ns.
The static voltage range at the input pins is limited to -7 V/+6 V to guarantee accurate linear operation of the
input circuitry. Any imbalance in the signal path converts a CM signal to a differential signal. To utilize the full
CM range as calculated above, the high accuracy of the trimmed on-chip network must not be affected by the
external voltage divider resistors. This condition is easily fulfilled when choosing R
in1
and R
in2
with 0.1 percent
tolerance. However, the power rating and the size of the external resistor pair play an important role as
“bottleneck” to achieve high DC and AC ground-shift robustness. In this case, a 1206-size resistor has been
selected to ensure a proper creepage and clearance at the PCB level. Since the 51 kΩ/0.1 percent/1206 resistors
available in the market are typically rated 200 V, the static CMR of the driving configuration in Figure 18 is
limited to the range of -126 V/+108 V.
Benefits:
Immunity to interference
Decoupling of signal and power GND
2.2.2.2 Performance results with KIT_LGMB_BOM004 and KIT_LGMB_BOM504
The key components used in this setup to conduct the following gate driver tests are:
1. Driver IC (mother board) – 1EDN8550B (EiceDRIVER
TM
)
2. MOSFET (power board) – IPB017N10N5 (OptiMOS
TM
)
3. Controller (controller card) – XMC4400 (XMC
TM
)
High dv/dt immunity:
This section highlights the ripple noise between the signal ground and power ground and on high dv/dt of the
output node. The setup was designed to create the worst-case conditions for switching. As the objective is to
measure the ripple noise, the double pulse testing method is used instead of continuous switching. The
switching speed for turn-on and turn-off are swept by changing the value of external gate resistance (Rg) in
steps to reach the harsh conditions described above with high output dv/dt, high di/dt of ID and high groundshift ripples.
Application Note 17 of 54 V 1.1
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Scalable power inverter driving an electric motor
Using the low voltage drives scalable power demonstration board
Board overview
Inductive
Load
C_Bank
48V
DC
U W
C_Bank
TDI
HS
TDI
LS
TDI
HS
TDI
LS
V
DD
V
DD
V
DD
V
DD
Ground Shift (LParasitic)
Positive Rail
Negative Rail V
U_GND
V
W_GND
x 4 x 4
Figure 19 Ground-shift realization in HB/FB applications
The microcontroller ground is only connected to a single point in the circuit (in this case V
U_GND
). The voltage
difference between the signal ground (V
U_GND
→ SGND) and power ground (V
W_GND
→ PGND) is a result of induced
voltage in the L
parasitic
, as shown in Figure 19. The switching properties (output dv/dt, ID di/dt) are shown in Table
2. The noise produced in the system, measured as the oscillation of the ground-shift, varies with a high peak-topeak amplitude of 14.24 V and lasts for less than five cycles (less than 12 µs) of decreasing magnitude, and is
within the CMR of TDI driver IC.
Table 2 Switching speed measurements of test setup
Measurement parameter
Turn-off
Turn-on
Switch-node dv/dt
350 V/µs
4200 V/µs
Drain current diD/dt (A/µs)
800 A/µs
900 A/µs
Voltage PGND vs. SGND dv/dt (V/µs)
65 V/µs
33 V/µs
Voltage PGND vs. SGND amplitude (pk-pk)
14.24 V
14.24 V
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