PD- 95084A
IRLR/U2905PbF
l Logic-Level Gate Drive
l Ultra Low On-Resistance
l Surface Mount (IRLR2905)
l Straight Lead (IRLU2905)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
G
HEXFET® Power MOSFET
D
V
= 55V
DSS
R
S
= 0.027Ω
DS(on)
ID = 42A
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per
silicon area. This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for
D-Pak
TO-252AA
I-Pak
TO-251AA
through-hole mounting applications. Power dissipation levels up to 1.5 watts
are possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 42
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 30 A
I
DM
PD @TC = 25°C Power Dissipation 110 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 160
Linear Derating Factor 0.71 W/°C
Gate-to-Source Voltage ± 16 V
Single Pulse Avalanche Energy 210 mJ
Avalanche Current 25 A
Repetitive Avalanche Energy 11 mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θJA
R
θJA
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Junction-to-Case ––– 1.4
Case-to-Ambient (PCB mount)** ––– 50 °C/W
Junction-to-Ambient ––– 110
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12/7/04
IRLR/U2905PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.070 ––– V/°C Reference to 25°C, ID = 1mA
J
––– ––– 0.027 VGS = 10V, ID = 25A
Static Drain-to-Source On-Resistance
––– ––– 0.030 W VGS = 5.0V, ID = 25A
––– ––– 0.040 VGS = 4.0V, ID = 21A
Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
Forward Transconductance 21 ––– ––– S VDS = 25V, ID = 25A
Drain-to-Source Leakage Current
––– ––– 25
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
VDS = 55V, VGS = 0V
µA
VGS = 16V
nA
Total Gate Charge ––– ––– 48 ID = 25A
Gate-to-Source Charge ––– ––– 8.6 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– ––– 25 VGS = 5.0V, See Fig. 6 and 13
Turn-On Delay Time ––– 11 ––– VDD = 28V
Rise Time ––– 84 –––
Turn-Off Delay Time ––– 26 ––– RG = 3.4Ω, VGS = 5.0V
ns
ID = 25A
Fall Time ––– 15 ––– RD = 1.1Ω, See Fig. 10
Internal Drain Inductance 4.5
Internal Source Inductance ––– 7.5 –––
Between lead,
nH
6mm (0.25in.)
from package
and center of die contact
Input Capacitance ––– 1700 ––– VGS = 0V
Output Capacitance ––– 400 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz, See Fig. 5
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
42
160
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 25A, VGS = 0V
Reverse Recovery Time ––– 80 120 ns TJ = 25°C, IF = 25A
Reverse RecoveryCharge ––– 210 320 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
= 25V, starting TJ = 25°C, L =470µH
DD
RG = 25Ω, I
I
≤ 25A, di/dt ≤ 270A/µs, V
SD
= 25A. (See Figure 12)
AS
DD
≤ V
(BR)DSS
,
Caculated continuous current based on maximum allowable
junction temperature; Package limitation current = 20A.
This is applied for I-PAK, L
of D-PAK is measured between
S
lead and center of die contact.
Uses IRLZ44N data and test conditions.
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
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D
S
IRLR/U2905PbF
A
A
A
A
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
T = 25°C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
1000
J
1000
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
100
10
D
I , Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
T = 175°C
1
0.1 1 10 100
V , Drain-to-Source Voltage (V)
DS
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
I = 41A
D
2.5
T = 25°C
GS
J
T = 175°C
J
V = 25V
DS
20µs PULSE WIDTH
100
10
D
I , Drain-to-Source Current (A)
1
2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0
V , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
V = 10V
GS
Vs. Temperature
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IRLR/U2905PbF
A
A
A
A
2800
2400
2000
1600
1200
C, Capacitance (pF)
800
400
0
1 10 100
V = 0V, f = 1MHz
GS
C = C + C , C SHORTED
iss g s gd ds
C = C
rss gd
C = C + C
oss ds gd
C
iss
C
oss
C
rss
V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
15
I = 25A
D
12
9
6
3
GS
V , Gate-to-Source Voltage (V)
V = 44V
DS
V = 28V
DS
FOR TEST CIRCUIT
0
0 10203040506070
Q , Total Gate Charge (nC)
G
SEE FIGURE 13
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
T = 175°C
J
T = 25 °C
SD
I , Reverse Drain Current (A)
10
0.4 0.8 1.2 1.6 2.0 2.4
V , Source-to-Drain Voltage (V)
SD
J
V = 0V
Fig 7. Typical Source-Drain Diode
GS
100
10
D
I , Drain Current (A)
T = 25°C
C
T = 175°C
J
Single Pulse
1
1 10 100
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
10µs
100µs
1ms
10ms
Forward Voltage
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