INFINEON IRFP7430PBF Instructions

Applications
R
DS(on)
typ.
1.0m
Ω
StrongIRFET
IRFP7430PbF
TM
l Brushed Motor drive applications l BLDC Motor drive applications l Battery powered circuits
l Half-bridge and full-bridge topologies l Synchronous rectifier applications l Resonant mode power supplies l OR-ing and redundant power switches l DC/DC and AC/DC converters
l DC/AC Inverters
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
SOA
l Enhanced body diode dV/dt and dI/dt Capability l Lead-Free l RoHS Compliant, Halogen-Free*
Ordering Information
Base Part Number Package Type
D
G
V
max. 1.3mΩ I
S
GDS
Gate Drain Source
Standard Pack
Form Quantity
I
IRFP7430PbF
HEXFET® Power MOSFET
DSS
D
(Silicon Limited)
D
(Package Limited)
D
S
D
G
TO-247AC
Complete Part Number
40V
404A
195A
c
IRFP7430PbF TO-247 Tube 50 IRFP7430PbF
)
6.0
Ω
m (
e c n a
t s
i s e
4.0
R n O e
c
r u o S
­o
t
2.0
­n
i a
r D ,
) n o
( S D
0.0
R
4 6 8 10 12 14 16 18 20
V
Gate -to -Source Voltage (V)
GS,
TJ = 25°C
ID = 100A
TJ = 125°C
Fig 1. Typical On-Resistance vs. Gate Voltage
500
400
) A
( t n
300
e
r
r u
C n
i a
r
200
D ,
D
I
100
0
25 50 75 100 125 150 175
TC , Case Temperature (°C)
Limited By Package
Fig 2. Maximum Drain Current vs. Case Temperature
1
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
Δ
Ω
Absolute Maximum Ratings
θ
θ
θ
Symbol Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
@ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
I
D
I
@ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
D
I
DM
PD @TC = 25°C
Pulsed Drain Current
Maximum Power Dissipation
d
Linear Derating Factor
V
GS
T
J
T
STG
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
E
AS (Thermally limited)
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
d
Repetitive Avalanche Energy
e
l
d
Thermal Resistance
Symbol Parameter Typ. Max. Units
R
JC
R
CS
R
JA
Junction-to-Case
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
k
j
IRFP7430PbF
Max.
404
c
286
c
195
1524
366
2.4
± 20
-55 to + 175
300
x
10lbf
in (1.1Nxm)
722
1405
See Fig. 14, 15, 22a, 22b
–––
0.24 –––
––– 40
0.41
A
W
W/°C
V
°C
mJ
A
mJ
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units
V
(BR )DSS
V
R
DS(on)
/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.014 ––– V/°C
(BR)DSS
Drain-to-Source Breakdown Voltage 40 ––– ––– V
Static Drain-to-Source On-Resistance ––– 1.0 1.3
1.2 –––
V
I
GS( th)
DSS
Gate Threshold Voltage 2.2 ––– 3.9 V
Drain-to-Source Leakage Current ––– ––– 1.0 μA
––– ––– 150
I
GSS
Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
R
G
Internal Gate Resistance ––– 2.1 –––
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
RG = 50Ω, I
I
100A, di/dt 990A/μs, V
SD
, starting TJ = 25°C, L = 0.14mH
Jmax
= 100A, VGS =10V.
AS
DD
V
(BR)DSS
, TJ ≤ 175°C.
Pulse width 400μs; duty cycle 2%.C
eff. (TR) is a fixed capacitance that gives the same charging time
oss
as C
while V
oss
C
eff. (ER) is a fixed capacitance that gives the same energy as
oss
C
while V
oss
DS
is rising from 0 to 80% V
DS
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended
footprint and soldering techniques refer to application note #AN-994.
R
is measured at TJ approximately 90°C.
θ
Limited by T
, starting TJ = 25°C, L= 1mH, RG = 50Ω, I
Jmax
VGS =10V.
* Halogen -Free since April 30, 2014
VGS = 0V, ID = 250μA
Reference to 25°C, I
m
VGS = 10V, ID = 100A
Ω
m
Ω
= 6.0V, ID = 50A
V
GS
VDS = VGS, ID = 250μA
= 40V, VGS = 0V
V
DS
= 40V, VGS = 0V, TJ = 125°C
V
DS
V
= 20V
GS
V
= -20V
GS
is rising from 0 to 80% V
DSS
DSS
.
Conditions
.
= 1.0mA
D
g
g
= 53A,
AS
d
2
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
Dynamic @ TJ = 25°C (unless otherwise specified)
Ω
Symbol Parameter Min. Typ. Max. Units
gfs Forward Transconductance 150 ––– ––– S
Q
Q
Q
Q
t
d(on)
t
r
t
d(off)
t
f
C
C
C
C
C
g
gs
gd
sync
iss
oss
rss
oss
oss
eff. (ER)
eff. (TR)
Total Gate Charge ––– 300 460 nC
Gate-to-Source Charge ––– 77 –––
Gate-to-Drain ("Miller") Charge ––– 98 –––
Total Gate Charge Sync. (Qg - Qgd) ––– 202 –––
Turn-On Delay Time ––– 32 ––– ns
Rise Time ––– 105 –––
Turn-Off Delay Time ––– 160 –––
Fall Time ––– 100 –––
Input Capacitance ––– 14240 ––– pF
Output Capacitance ––– 2130 –––
Reverse Transfer Capacitance ––– 1460 –––
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
i
––– 2605 –––
h
––– 2920 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units
376
I
S
Continuous Source Current ––– –––
c
(Body Diode)
I
SM
V
SD
dv/dt
t
rr
Pulsed Source Current ––– ––– 1576 A
(Body Diode)
d
Diode Forward Voltage ––– 0.86 1.2 V
Peak Diode Recovery
f
––– 2.7 ––– V/ns
Reverse Recovery Time ––– 52 ––– ns TJ = 25°C VR = 34V,
––– 52 ––– T
Q
rr
Reverse Recovery Charge ––– 97 ––– nC TJ = 25°C
––– 97 ––– TJ = 125°C
I
RRM
Reverse Recovery Current ––– 2.3 ––– A TJ = 25°C
IRFP7430PbF
Conditions
V
= 10V, ID = 100A
DS
ID = 100A
V
=20V
DS
VGS = 10V
VDD = 20V
I
= 30A
D
= 2.7
R
G
V
GS
VGS = 0V
V
DS
ƒ = 1.0 MHz
V
GS
VGS = 0V, VDS = 0V to 32V
A
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 100A, VGS = 0V
TJ = 175°C, IS = 100A, VDS = 40V
= 125°C IF = 100A
J
g
= 10V
g
= 25V
= 0V, VDS = 0V to 32V
Conditions
di/dt = 100A/μs
i h
D
G
S
g
g
3
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
IRFP7430PbF
1000
TOP 15V
) A
( t n e
r
100
r u
C e
c
r u o S
­o
t
-
10
n
i a
r D
,
D
I
4.5V
BOTTOM 4.5V
60μs PULSE WIDTH
Tj = 25°C
1
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
1000
) A
( t
n e
r
100
r u
C e
c
r u o S
­o
t
­n
i a
r D
,
D
I
10
TJ = 175°C
TJ = 25°C
V
DS
= 25V
60μs PULSE WIDTH
1.0 2 3 4 5 6 7
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
VGS
10V
8.0V
7.0V
6.0V
5.5V
4.8V
1000
TOP 15V
) A
( t n e
r
r u
C e
c
r
100
u o S
­o
t
­n
i a
r D
,
D
I
4.5V
BOTTOM 4.5V
60μs PULSE WIDTH
VGS
10V
8.0V
7.0V
6.0V
5.5V
4.8V
Tj = 175°C
10
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
2.0
e c n a
t s
i s e
R n O e
c
r u o S
­o
t
­n
i a
r D
,
) n o
( S D
R
) d e z
i
l a
m
r o
N
(
1.8
1.6
1.4
1.2
1.0
0.8
ID = 100A
V
= 10V
GS
0.6
-60 -40 -20 0 20 40 60 80 100120140160180
TJ , Junction Temperature (°C)
Fig 6. Normalized On-Resistance vs. Temperature
100000
) F p
( e
c n a
t
i c a p a
C ,
C
4
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
+ Cgd, C
gs
gd
+ C
ds
ds
gd
iss
C
rss
C
oss
C
iss
10000
C
oss
C
rss
1000
1 10 100
VDS, Drain-to-Source Voltage (V)
SHORTED
14.0 ID= 100A
12.0
) V
( e
g
10.0
a
t
l o V
e
8.0
c
r u o S
-
6.0
o
t
­e
t a
4.0
G ,
S G
V
2.0
VDS= 32V
VDS= 20V
0.0 0 50 100 150 200 250 300 350 400
QG, Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source VoltageFig 7. Typical Capacitance vs. Drain-to-Source Voltage
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
IRFP7430PbF
1000
) A
( t n e
r
r u
C n
i a
r D e
s
r e v e
R ,
D S
I
TJ = 175°C
100
10
TJ = 25°C
1
V
GS
0.1
0.0 0.5 1.0 1.5 2.0 2.5
VSD, Source-to-Drain Voltage (V)
= 0V
Fig 9. Typical Source-Drain Diode
) V
(
47
e g a
t
l o
46
V n w
o
45
d k a e
r B
44
e c
r u o
43
S
­o
t
­n
i
42
a
r D
,
S
41
S D
) R
40
B
(
V
-60 -40 -20 0 20 40 60 80 100120140160180
Forward Voltage
Id = 1.0mA
TJ , Temperature ( °C )
Fig 11. Drain-to-Source Breakdown Voltage
)
6.0
Ω
m (
e c n a
t s
i s e
R
4.0
n O e
c
r u o S
­o
t
-
2.0
n
i a
r D ,
) n o
(
S D
0.0
R
0 200 400 600 800 1000 1200
VGS = 5.5V
VGS = 6.0V
V
= 7.0V
GS
VGS = 8.0V
VGS =10V
ID, Drain Current (A)
10000
) A
1000
( t n e
r
r u
C
100
e c
r u o S
­o
t
­n
i a
r D ,
D
I
Limited by package
10
1
Tc = 25°C Tj = 175°C Single Pulse
0.1
0.1 1 10 100
OPERATION IN THIS AREA LIMITED BY RDS(on)
1msec
VDS, Drain-toSource Voltage (V)
100μsec
10msec
DC
Fig 10. Maximum Safe Operating Area
2.5
VDS= 0V to 32V
2.0
)
1.5
J
μ
( y
g
r e n
1.0
E
0.5
0.0 0 5 10 15 20 25 30 35 40 45
V
Drain-to-Source Voltage (V)
DS,
Fig 12. Typical C
Stored Energy
OSS
Fig 13. Typical On-Resistance vs. Drain Current
5
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
IRFP7430PbF
1
W
/ C
° )
Z (
e s n o p s e
R l a
m
r e h T
C J h
t
0.001
0.1
0.01
D = 0.50
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE ( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 150°C and
) A
( t n e
r
r u
C e
h c n a
l a v A
100
10
Tstart =25°C (Single Pulse)
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
800
TOP Single Pulse
700
) J
m
600
( y
g
r e
500
n E
e h
400
c n a
l a
300
v A ,
R
200
A
E
BOTTOM 1.0% Duty Cycle ID = 100A
100
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T
2. Safe operation in Avalanche is allowed as long asT
. This is validated for every part type.
jmax
is not exceeded.
jmax
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
= Average power dissipation per single avalanche pulse.
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ΔT = Allowable rise in junction temperature, not to exceed T
(assumed as
jmax
25°C in Figure 14, 15). t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t Z
(D, tav) = Transient thermal resistance, see Figures 13)
thJC
P
D (ave)
·f
av
= 1/2 ( 1.3·BV·Iav) = DT/ Z
I
2DT/ [1.3·BV·Zth]
av =
E
= P
AS (AR)
D (ave)·tav
thJC
IRFP7430PbF
4.0
) V
(
3.5
e g a
t
l o
3.0
V d
l o h s e
2.5
r h
t e
t a
G ,
) h
t
( S G
V
ID = 250μA
ID = 1.0mA
2.0
ID = 1.0A
1.5
1.0
-75 -50 -25 0 25 50 75 100 125 150 175
TJ , Temperature ( °C )
Fig 17. Threshold Voltage vs. Temperature
12
IF = 100A
VR = 34V
10
TJ = 25°C
TJ = 125°C
8
) A
(
6
M R R
I
4
12
IF = 60A
VR = 34V
10
TJ = 25°C
TJ = 125°C
8
) A
(
6
M R R
I
4
2
0
0 200 400 600 800 1000
diF /dt (A/μs)
Fig. 18 - Typical Recovery Current vs. dif/dt
300
IF = 60A
VR = 34V
250
TJ = 25°C
TJ = 125°C
)
200
C n
(
R R
Q
150
2
0
0 200 400 600 800 1000
diF /dt (A/μs)
260
220
)
180
C n
(
R R
Q
140
100
60
0 200 400 600 800 1000
100
50
0 200 400 600 800 1000
diF /dt (A/μs)
Fig. 20 - Typical Stored Charge vs. dif/dtFig. 19 - Typical Recovery Current vs. dif/dt
IF = 100A
VR = 34V
TJ = 25°C
TJ = 125°C
diF /dt (A/μs)
Fig. 21 - Typical Stored Charge vs. dif/dt
7
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
IRFP7430PbF
A
Reverse Recovery Current
Driver Gate Drive
D.U.T. ISDWaveform
D.U.T. VDSWaveform
Inductor Current
Inductor Curent
* V
GS
D.U.T
+
-
R
G
+
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
-
Low Leakage Inductance Current Transformer
-
dv/dt controlled by R
Driver same type as D.U.T.
I
controlled by Duty Factor "D"
SD
D.U.T. - Device Under Test
G
+
V
DD
Re-Applied Voltage
+
-
Period
P.W.
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple 5%
= 5V for Logic Level Devices
D =
P. W .
Period
VGS=10V
V
DD
I
SD
*
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
15V
V
DS
L
DRIVER
t
p
(BR)DSS
R
G
20V
V
GS
Fig 22a. Unclamped Inductive Test Circuit
V
GS
R
G
10V
V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D.U.T
I
AS
Ω
0.01
t
p
+
V
DD
-
I
AS
Fig 22b. Unclamped Inductive Waveforms
R
V
DS
D
V
DS
90%
D.U.T.
+
V
DD
-
10% V
GS
t
d(on)tr
t
d(off)tf
Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Current Regulator
Same Type as D.U.T.
.2μF
12V
V
GS
50KΩ
3mA
.3μF
D.U.T.
+
V
DS
-
Vds
Vgs(th)
Id
Vgs
I
G
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
8
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
I
D
Qgs1
Qgs2 Qgd Qgodr
Fig 24b. Gate Charge Waveform
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
IRFP7430PbF
TO-247AC Part Marking Information
TO-247AC package is not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at
9
www.irf.com © 2015 International Rectifier Submit Datasheet Feedback February 19, 2015
http://www.irf.com/package/
IRFP7430PbF
N/A
Qualification information
Industrial
Qualification level
(per JEDEC JESD47F
††
guidelines)
Moisture Sensitivity Level TO-247AC
(per JE DEC J-S T D-020D††)
RoHS compliant
Yes
 Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/
 Applicable version of JEDEC standard at the time of product release.
Revision History
Date Comment
Updated data sheet with new IR corporate template.
4/22/2014
2/19/2015
Updated package outline and part marking on page 9.
Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
Updated E
Updated note 10 “Limited by T
= 1405mJ on page 2
AS (L =1mH)
, starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 53A, VGS =10V”. on page 2
Jmax
10
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
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IMPORTANT NOTICE
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
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is subject to customer’s compliance with its
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use of the product of Infineon Technologies in
customer’s applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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delivery terms and conditions and prices please
contact your nearest Infineon Technologies office
(
www.infineon.com
).
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