INFINEON IPB80N08S2-07, IPP80N08S2-07, IPI80N08S2-07 User Manual
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IPB80N08S2-07
IPP80N08S2-07, IPI80N08S2-07
OptiMOS® Power-Transistor
Product Summary
Features
• N-channel - Enhancement mode
• Automotive AEC Q101 qualified
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
• Green package (lead free)
• Ultra low Rds(on)
• 100% Avalanche tested
Type Package Ordering Code Marking
IPB80N08S2-07 PG-TO263-3-2 SP0002-19048 2N0807
IPP80N08S2-07 PG-TO220-3-1 SP0002-19040 2N0807
IPI80N08S2-07 PG-TO262-3-1 SP0002-19043 2N0807
V
DS
R
DS(on),max
I
D
PG-TO220-3-1 PG-TO262-3-1PG-TO263-3-2
75 V
(SMD version) 7.1
80 A
mΩ
Maximum ratings, at T
Parameter Symbol Conditions Unit
Continuous drain current
Pulsed drain current
Avalanche energy, single pulse
Gate source voltage
Power dissipation
Operating and storage temperature
=25 °C, unless otherwise specified
j
1)
I
D
TC=25 °C, VGS=10 V
T
V
2)
2)
4)
I
D,pulse
E
AS
V
GS
P
tot
T
, T
j
TC=25 °C
ID=80A
TC=25 °C
stg
=100 °C,
C
=10 V
GS
Value
80 A
2)
80
320
810 mJ
±20 V
300 W
-55 ... +175 °C
IEC climatic category; DIN IEC 68-1 55/175/56
Rev. 1.0 page 1 2006-03-03
IPB80N08S2-07
IPP80N08S2-07, IPI80N08S2-07
Parameter Symbol Conditions Unit
Values
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case
Thermal resistance, junction ambient, leaded
SMD version, device on PCB
Electrical characteristics, at T
2)
R
thJC
R
thJA
R
thJA
=25 °C, unless otherwise specified
j
minimal footprint - - 62
2
cooling area
6 cm
5)
- - 0.5 K/W
--62
--40
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
V
(BR)DSSVGS
V
GS(th)
=0 V, ID= 1 mA
VDS=VGS, ID=250 µA
75 - - V
2.1 3.0 4.0
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
I
I
R
DSS
GSS
DS(on)
VDS=75 V, VGS=0 V,
T
=25 °C
j
V
=75 V, VGS=0 V,
DS
T
=125 °C
j
2)
VGS=20 V, VDS=0 V
VGS=10 V, ID=80 A,
V
=10 V, ID=80 A,
GS
SMD version
- 0.01 1 µA
- 1 100
- 1 100 nA
- 5.8 7.4 mΩ
- 5.5 7.1
Rev. 1.0 page 2 2006-03-03
IPB80N08S2-07
y
g
IPP80N08S2-07, IPI80N08S2-07
Parameter Symbol Conditions Unit
Values
min. typ. max.
namic characteristics
D
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Char
e Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
2)
C
iss
V
=0 V, VDS=25 V,
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
2)
Q
gs
Q
gd
Q
g
GS
f =1 MHz
V
=40 V, VGS=10 V,
DD
I
=80 A, R
D
=60 V, ID=80 A,
V
DD
V
=0 to 10 V
GS
=2.2 Ω
G
- 4700 - pF
- 1260 -
- 580 -
-26-ns
-50-
-61-
-30-
-2537nC
- 69 116
- 144 180
Gate plateau voltage
V
plateau
- 5.4 - V
Reverse Diode
Diode continous forward current
I
S
- - 80 A
2)
TC=25 °C
Diode pulse current
2)
Diode forward voltage
Reverse recovery time
Reverse recovery charge
1)
Current is limited by bondwire; with an R
information see Application Note ANPS071E at www.infineon.com/optimos
2)
Defined by design. Not subject to production test.
3)
See diagram 13.
4)
Qualified at -20V and +20V.
5)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
2)
I
S,pulse
V
t
rr
Q
thJC
SD
rr
VGS=0 V, IF=80 A,
T
=25 °C
j
VR=40 V, IF=IS,
di
/dt =100 A/µs
F
VR=40 V, IF=IS,
di
/dt =100 A/µs
F
= 0.5K/W the chip is able to carry 132A at 25°C. For detailed
- - 320
- 0.9 1.3 V
- 110 140 ns
- 470 590 nC
Rev. 1.0 page 3 2006-03-03