INFINEON IKCS12F60AA User Manual
Data Sheet, Preliminary, Nov. 2007
Control integrated Power
System (CIPOS™)
IKCS12F60AA
http://www.infineon.com/cipos
Power Management & Drives
Never stop thinking.
CIPOS™ IKCS12F60AA
Revision History: 2007-12 Rev.1.4
Previous Version: 1.3
Page Subjects (major changes since last revision)
8 max. bootstrap capacitor
Authors: O. Hellmund, W. Scholz, W. Frank
Edition 2007-07
Published by
Infineon Technologies AG
85579 Neubiberg, Germany
© Infineon Technologies AG 12/12/07.
All Rights Reserved.
Attention please!
The information given in this data sheet shall in no event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device, Infineon Technologies
hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office or representatives (http://www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types
in question please contact your nearest Infineon Technologies Office or representatives.
Infineon Technologies Components may only be used in life-support devices or systems with the express
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or
system. Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
of the user or other persons may be endangered.
®
TrenchStop
CIPOS™, CoolMOS™, CoolSET™, DuoPack™, EmCon™ and thinQ!™ are trademarks of Infineon
Technologies AG.
is a registered trademark of Infineon Technologies AG.
Preliminary Data Sheet 2/17 Rev. 1.4, Dec. 2007
CIPOS™ IKCS12F60AA
Table of Contents
CiPoS™ Control integrated Power System ..................................................................................................4
Features........................................................................................................................................................4
Target Applications.....................................................................................................................................4
Description...................................................................................................................................................4
System Configuration.................................................................................................................................4
Internal Electrical Schematic...........................................................................................................................5
Pin Assignment.................................................................................................................................................6
Pin Description............................................................................................................................................6
/HIN1,2,3 and /LIN1,2,3 (Low side and high side control pins, Pin 15 - 20) .............................................. 6
EN (enable, Pin 24) .................................................................................................................................... 7
ITRIP (Over-current detection function, Pin 21)......................................................................................... 7
VDD, VSS (control side supply and reference, Pin 22, 23)........................................................................7
VB1,2,3 and VS1,2,3 (High side supplies, Pin 1, 2, 4, 5, 7, 8)................................................................... 7
VRU, VRV, VRW (low side emitter, Pin 12, 13, 14) ................................................................................... 7
V+ (positive bus input voltage, Pin 10)....................................................................................................... 7
Absolute Maximum Ratings ............................................................................................................................8
Module Section............................................................................................................................................8
IGBT and Diode Section .............................................................................................................................8
Control Section............................................................................................................................................9
Recommended Operation Conditions............................................................................................................9
Static Parameters ...........................................................................................................................................10
Dynamic Parameters......................................................................................................................................11
Integrated Components.................................................................................................................................12
Circuit of a Typical Application.....................................................................................................................12
Test Circuits....................................................................................................................................................14
Preliminary Data Sheet 3/17 Rev. 1.4, Dec. 2007
CIPOS™ IKCS12F60AA
CIPOS™
Control integrated Power System
Single In-Line Intelligent Power Module
3Φ-bridge 600V / 12A @ 25°C
Features
• Fully isolated Single In-Line molded module
®
• TrenchStop
• Optimal adapted EmCon™ diode for low EMI
• Integrated bootstrap diode and capacitor
• Rugged SOI gate driver technology with
stability against transient and negative voltage
• Temperature monitor and over temperature
shutdown
• Overcurrent shutdown
• Undervoltage lockout at all channels
• Matched propagation delay for all channels
• Low side emitter pins accessible for all phase
current monitoring (open emitter)
• Cross-conduction prevention
• Lead-free terminal plating; RoHS compliant
• Qualified according to JEDEC
temperature stress tests for 500h) for target
applications
IGBTs with lowest V
CE(sat)
1
(high
Target Applications
• Washing machines
• Consumer Fans and Consumer Compressors
Description
The CiPoS™ module family offers the chance for
integrating various power and control components
to increase reliability, optimize PCB size and
system costs.
This SIL-IPM is designed to control AC motors in
variable speed drives for applications like air
conditioning, compressors and washing
machines. The package concept is specially
adapted to power applications, which need
extremely good thermal conduction and electrical
isolation, but also EMI-save control and overload
protection. The features of Infineon TrenchStop
IGBTs and EmCon™ diodes are combined with a
new optimized Infineon SOI gate driver for
excellent electrical performance.
®
System Configuration
• 3 halfbridges with TrenchStop® IGBT & FW-
EmCon™ diodes
• 3Φ SOI gate driver
• Bootstrap diodes for high side supply
• Integrated 100nF bootstrap capacitance
• Temperature sensor, passive components for
adaptions
• Isolated heatsink
• Creepage distance 3.1mm
1
J-STD-020 and JESD-022
Preliminary Data Sheet 4/17 Rev. 1.4, Dec. 2007
CIPOS™ IKCS12F60AA
Internal Electrical Schematic
V+ (10)
Tr1, U-HS
D1
Tr3, V-HS
D3
Tr5, W-HS
D5
VRU (12)
VRV (13)
VRW (14)
U, VS1 (8)
V, VS2 (5)
W, VS3 (2)
VB3 (1)
VB2 (4)
VB1 (7)
Dbs1-
Dbs3
Rbs
Tr2, U-LS
D2
RH1 RL1 RL2RH2 RL3RH3
CbsH1 CbsH2 CbsH3
Tr4, V-LS
D4
Tr6, W-LS
D6
VDD (22)
/HIN1 (15)
/HIN2 (16)
/HIN3 (17)
/LIN1 (18)
/LIN2 (19)
/LIN3 (20)
ITRIP (21)
EN (24)
VSS (23)
Figure 1: Internal Schematic
VCC
/HIN1
/HIN2
/HIN3
/LIN1
/LIN2
/LIN3
R
Driver-IC
RTS
C2C1
For integrated
components see
Table
Preliminary Data Sheet 5/17 Rev. 1.4, Dec. 2007
CIPOS™ IKCS12F60AA
Pin Assignment
Pin Number Pin Name Pin Description
1 VB3 high side floating IC supply voltage
2 W,VS3 motor output W, high side floating IC supply offset voltage
3 n.a. None
4 VB2 high side floating IC supply voltage
5 V,VS2 motor output V, high side floating IC supply offset voltage
6 n.a. None
7 VB1 high side floating IC supply voltage
8 U,VS1 motor output U, high side floating IC supply offset voltage
9 n.a. None
10 V+ positive bus input voltage
11 n.a. None
12 VRU low side emitter
13 VRV low side emitter
14 VRW low side emitter
15 /HIN1 input gate driver high side 1/U
16 /HIN2 input gate driver high side 2/V
17 /HIN3 input gate driver high side 3/W
18 /LIN1 input gate driver low side 1/U
19 /LIN2 input gate driver low side 2/V
20 /LIN3 input gate driver low side 3/W
21 ITRIP input overcurrent shutdown
22 VDD module control supply
23 VSS module negative supply
24 EN input logic enable, output temperature monitoring
Pin Description
/HIN1,2,3 and /LIN1,2,3 (Low side and high
side control pins, Pin 15 - 20)
These pins are active low and they are
responsible for the control of the integrated IGBT
The Schmitt-trigger input threshold of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-up resistor of
about 75 kOhm is internally provided to pre-bias
inputs during supply start-up and a zener clamp is
provided for pin protection purposes. Input
schmitt-trigger and noise filter provide beneficial
noise rejection to short input pulses.
It is recommended for proper work of CiPoS™ not
to provide input pulse-width lower than 1us.
The integrated gate drive provides additionally a
shoot through prevention capability which avoids
the simultaneous on-state of two gate drivers of
the same leg (i.e. HO1 and LO1, HO2 and LO2,
HO3 and LO3).
Figure 2: Input pin structure
Preliminary Data Sheet 6/17 Rev. 1.4, Dec. 2007
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