Infineon ICL8001G, ICLS8082G Design Manuallines
Industrial & Multimarket
Application Note
Version 2.0, 2011-04-14
ICL8001G / ICLS8082G
Design Guidelines
Phase-Cut-Dimmable Single-Stage LED Driver with PFC
using Quasi-Resonant Primary Power Control
Version 2.0
LED Driver ICs
Edition 2011-04-14
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2011 Infineon Technologies AG
All Rights Reserved.
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and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
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ICL8001G / ICLS8082G
Design Guidelines
Application Note 3 Version 2.0, 2011-04-14
ICL8001G / ICLS8082G Design Guidelines
werner.ludorf@infineon.com
Revision History: 2011-04-14, Version 2.0
Previous Revision:
Page Subjects (major changes since last revision)
First edition
ICL8001G / ICLS8082G
Design Guidelines
Table of Contents
Application Note 4 Version 2.0, 2011-04-14
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Pin Configuration with PG-DSO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Package PG-DSO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Control Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Design Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 Transformer Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.3 Primary Peak Current Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4 Foldback Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.5 Switch-on Determination for Quasi-resonant Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.6 Power Factor Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.7 VCC for Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Design Optimizations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.1 Dimming Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.2 Dimmer Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.1.3 Dimmer List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1.4 Dimmer Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2 Power Stabilization for Line Voltage Variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2.1 Stabilization using IC Foldback Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.2.2 Discrete Power Stabilization Circuit for ICL8001G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3 Optimized Power Factor Correction Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.1 Output OVP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.2 Output Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.3 Input Overvoltage Protection (OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7 Explicit Questions and Answers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.1 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.2 Control Principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table of Contents
ICL8001G / ICLS8082G
Design Guidelines
Introduction
Application Note 5 Version 2.0, 2011-04-14
1 Introduction
Objective
The objective of this application note is to describe how adimmable, highly efficient single-stage LED driver based
on the ICL8001G / ICLS8082G primary control developed by Infineon Technologies AG can be designed and how
different design targets can be considered. For this purpose, quantitative design tools for dimensioning of the
flyback transformer for QR (quasi-resonant) operation and further discrete components relevant to the power
factor correction (PFC) and dimming control functions are provided. The design process refers to a concrete
application example of a phase cut dimmable LED driver. Explicit questions and answers are treated in conclusion.
Features of ICL8001G / ICLS8082G control
• High, stable efficiency over a wide operating range
• Optimized for trailing and leading-edge dimmers
• Precise PWM for primary PFC and dimming control
• HV power cell for VCC precharging with a constant current
• Built-in digital soft start
• Foldback correction and cycle-by-cycle peak current limitation
• VCC over/undervoltage lockout
• Auto restart mode for short circuit protection
• Adjustable latch-off mode for output overvoltage protection (OVP)
Description
The ICL8001G / ICLS8082G employs a quasi-resonant (QR) operation mode and, due to the availability of
outstanding PFC performance, is optimized for off-line LED lighting applications such as dimmable LED bulbs for
incandescent lamp replacement, LED downlights and LED tubes in a power range from typically 5 W to 50 W.
Precise PWM generation enables primary control for phase cut dimming and potential for high power factors of
PF > 99 %. Depending on the power class, significantly improved driver efficiency of up to 91 % is feasible. The
product has a wide operation range of IC voltage supply and low power consumption. Multiple safety functions
ensure full system protection in failure situations. With its full feature set and simple application, the ICL8001G /
ICLS8082G represents an outstanding choice for QR flyback designs combining feature set and performance at
a minimum BOM cost.
ICL8001G / ICLS8082G
Design Guidelines
Pin Configuration and Functionality
Application Note 6 Version 2.0, 2011-04-14
Application circuit
Figure 1 below shows the application circuit for the ICL8001G.
Figure 1 ICL8001G application circuit
2 Pin Configuration and Functionality
2.1 Pin Configuration with PG-DSO-8
Table 1 Pin Configuration for PG-DSO-8
Pin Symbol Function
1 ZCV Zero Crossing
2 VR Voltage Sense
3 CS Current Sense
4 GD Gate Drive Output
5 HV High Voltage Input
6 n.c. Not connected
7 VCC Controller Supply Voltage
8 GND Controller Ground
Cx
Cin
Rn
Cn
Dn
Cvcc
Dvcc
Rs
Do Co
L1
Rvcc
VCC
GND
T1
npnans
Rzc1
Rzc2
ZCV
ICL8001G
Vo
Vac
BR
Czc
VR
PWM-Control
Protection
GateDriver
Start-Up
Cell
Vm( Vs )
Cc
CS
Ro
Ru
NC
HV
GD
DR
Q1
CR
Rv
L2
Rc
U1
Vin
ICL8001G / ICLS8082G
Design Guidelines
Pin Configuration and Functionality
Application Note 7 Version 2.0, 2011-04-14
2.2 Package PG-DSO-8
Figure 2 Pin Configuration of PG-DSO-8 (top view)
2.3 Pin Functionality
ZCV (Zero Crossing)
The voltage from the auxiliary winding after a time delay circuit is applied at this pin. Internally, the pin is connected
to the zero-crossing detector for switch-on determination. Additionally, the output overvoltage detection is realized
by comparing the voltage Vzc with an internal preset threshold.
VR (Voltage Sense)
The rectified input mains voltage is sensed at this pin. The signal is used to set the peak current ofthepeak-current
control and therefore enable the PFC and phase-cut dimming functionality.
CS (Current Sense)
This pin is connected to the shunt resistor for the primary current sensing, externally, and to the PWM signal
generator for switch-off determination (together with the feedback voltage), internally. Moreover, short-winding
protection is realized by monitoring the voltage Vcs during on-time of the main power switch.
GD (Gate Drive Output)
This output signal drives the external main power switch, which is a power MOSFET in most cases.
HV (High Voltage)
The HV pin is connected to the bus voltage, externally, and to the power cell, internally. The current through this
pin precharges the VCC capacitor with a constant current once the supply bus voltage is applied.
VCC (Power supply)
The VCC pin is the positive supply of the IC. The operating range is between V
VCCoff
and V
VCCOVP
.
GND (Ground)
This is the common ground of the controller.
ZCV
VR
CS
GD
GND
VCC
NC
HV
1
2
3
4 5
6
7
8
ICL8001G / ICLS8082G
Design Guidelines
Control Principle
Application Note 8 Version 2.0, 2011-04-14
3 Control Principle
Figure 3 Block diagram of the ICL8001G
An inspection of the ICL8001G block diagram shows that the voltage measured at the shunt resistor Rs (see also
the application circuit in Figure 1), which varies according to the instant transformer primary current Ip(t),
determines the gain voltage VG as
(1)
With the PWM OPgain G
PWM
and the offset voltage ram V
PWM
VG is compared to the voltage VR, which is derived
from the input voltage divider (Ro, Ru). This means that the peak current through the power switch Q1 and the
primary inductance L varies according to the instant input voltage Vin(t) as expressed by
(2)
Depl. CoolMOS
Startup Cell
Power ManagmentZero Crossing
PWM Control
Gate Drive
Protection
HV
GND
GD
Gate
Control
Voltage
Reference
& Biasing
Over / Under-
Voltage Lockout
OTP
Restart /
Latchup
Control
VCC
CS
Leading
Edge
Blanking
VR
ZCV
Zero
Current
Detection
Over
Voltage
Protection
PM / PFC
Control
Foldback
Correction
Short
Winding
Detection
VG ( Vs )
PWM
Comparator
V
REF
V
FB
25k
2pF
PWMsPWM
VRtIpGtIpVG )())((
RsG
tVin
RuRo
Ru
tIp
PWM
)(
)(
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