Infineon ICE2HS01G Application Note
Application Note, V1.0, July 2011
Design Guide for LLC Converter
with ICE2HS01G
Power Management & Supply
Never stop thinking.
Edition 2011-07-06
Published by Infineon Technologies Asia Pacific,
168 Kallang Way,
349253 Singapore, Singapore
© Infineon Technologies AP 2010.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee
of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types
in question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or
system. Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
of the user or other persons may be endangered.
Design Guide for LLC Converter with ICE2HS01
Revision History: 2011-07 V1.0
Previous Version: NA
Design Guide for LLC Converter with ICE2HS01G
License to Infineon Technologies Asia Pacific Pte Ltd A N - P S 0057
Liu Jianwei
Li Dong
Page
Table of Content
Abstract ............................................................................................. 5
1
2 Design Procedure ............................................................................ 5
2.1 Target Specifications .................................................................................................................... 5
2.2 Design of Power Stage ................................................................................................................. 6
2.2.1 System specifications ...................................................................................................................... 6
2.2.2 Selection of resonant factor m ........................................................................................................ 6
2.2.3 Voltage gain .................................................................................................................................... 7
2.2.4 Transformer turns ratio .................................................................................................................... 7
2.2.5 Effective load resistance ................................................................................................................. 7
2.2.6 Resonant network ........................................................................................................................... 7
2.2.7 Transformer design ......................................................................................................................... 9
2.2.8 SR MOSFET ................................................................................................................................. 10
2.3 Design of Control Parameters and Protections ....................................................................... 10
2.3.1 Frequency setting: ......................................................................................................................... 10
2.3.2 Minimum/Maximum frequency setting: ......................................................................................... 10
2.3.3 Frequency setting for OCP: ........................................................................................................... 11
2.3.4 Dead time ...................................................................................................................................... 12
2.3.5 Softstart time, OLP blanking time and auto-restart time ............................................................... 13
2.3.6 Load pin setting ............................................................................................................................. 13
2.3.7 Current sense ................................................................................................................................ 13
2.3.8 VINS pin setting ............................................................................................................................ 15
2.3.9 Latch off function and burst mode selection ................................................................................. 15
2.4 Design of Synchronous Rectification (SR) control ................................................................. 16
2.4.1 On-time control - SRD pin and CL pin .......................................................................................... 18
2.4.2 Turn-on delay
- Vres pin ................................................................................................. 20
delayonT_
2.4.3 Advanced Turn off delay
2.4.4 A review of the control scheme ..................................................................................................... 21
2.4.5 SR Protections .............................................................................................................................. 22
2.5 Design summary ......................................................................................................................... 22
- Delay pin .............................................................................. 21
delayoffT_
3 Tips on PCB layout ........................................................................ 24
3.1 Star connection for Power stage ............................................................................................... 24
3.2 Star connection for IC ................................................................................................................. 25
Application Note 4 2011-07-06
1 Abstract
ICE2HS01G is our 2nd generation half-bridge LLC controller designed especially for high efficiency with its
synchronous rectification (SR) control for the secondary side. With its new driving techniques, SR can be
realized for half-bridge LLC converter operated with secondary switching current in both CCM and DCM
conditions. No individual SR controller IC is needed at the secondary side.
A typical application circuit of ICE2HS01G is shown in Figure 1. For best performance, it is suggested to use
half-bridge driver IC in the primary side with ICE2HS01G.
R
HV
VCC
C
BUS
INS1
R
INS2
R
INS3
HV IC
C
VCC
Q
PH
L
res
Q
PL
C
RES
Q
SH
CO1C
O2
Q
SL
V
out
C
HG LG
R
delay
R
EnA
C
EnA
R
TD
R
R
mc1
R
mc2
GND
Delay
EnA
TD
ICE2HS01G
V
ref
res1
V
mc
V
res
R
res2
C
T
C
R
T
VINSVCC
CS
CL
SRD
SHG
SLG
LOADFREQSSTimer
R
R
SS1
SS
C
SS1
OCP
R
reg
R
FMIN
R
R
CL
Q
SRD
R
FT1
R
FT2
CS2CCS2
C
CL
R
SRD
D
CS1
R
CS1
CS1
D
CS2
R
OVS1
R
IC Driver
Pulse
Trans.
Q
S1
Q
S2
R
Q
S3
Q
S4
IC Driver
OPTO
BA1
BA2
TL431
R
OVS2
C
oc
R
oc
R
OVS3
Figure 1 Typical application circuit
In this application note, the design procedure for LLC resonant converter with ICE2HS01 is presented,
together with an example of a 300W converter with 400VDC. Detailed calculation of the values of the
components around the IC is also included, together with tips on the PCB layout.
2 Design Procedure
2.1 Target Specifications
Application Note 5 2011-07-06
The design example is based on the typical application circuit in Figure 1, where individual resonant
choke is implemented. The target specifications are summarized in Table 1.
Input voltage
Output voltage and current
Output power
Efficiency η
Resonant frequency
Hold up time
Bulk capacitor
Table 1 Target application specifications
V
in
P
T
h
C
IV ,
oo
in
f
r
out
2.2 Design of Power Stage
400VDC
12VDC, 25A
~ 300W
>96% at 100% load
>97% at 50% load
>96% at 20% load
85kHz
20ms
270uF
2.2.1 System specifications
The maximum input power can be calculated as:
P
in
Based on the required 20ms hold-up time, the minimum input voltage can be given as:
*
IV
OO
η
VV
25*12
===
96.0
2
2
_min_
nominin
C
out
W
5.312
3
TP
hin
400
2
10*270
−
10*20*5.312*2
6
−
=−=−=
V
2.337
[1]
[2]
2.2.2 Selection of resonant factor m
L
In order to achieve the highest efficiency possible, the value of resonant factor
be set as big as possible, so that the magnetizing inductance
is small, which results in low core loss and conduction loss. On the other hand, the magnetizing current
should be big enough to discharge the
ZVS to ensure safe switching and save switching loss. In this design example,
start. The ZVS of primary side MOSFET will be confirmed later with the determination of the deadtime of
switching.
C of primary side MOSFET during the transitions, to realize
ds
L is big and therefore magnetizing current
m
m
p
== is to
L
r
13=m is selected as a
LL
+
rm
L
r
Application Note 6 2011-07-06
=
=
2.2.3 Voltage gain
It is for efficiency optimization to operate the LLC converter around the resonant frequency at nominal
input voltage, where the voltage gain
is neglected due to the implementation of individual resonant choke.
The worst case we need to consider for resonant network and transformer design is the full load
operation at minimum input voltage
M , on condition that the secondary-side leakage inductance
V . The maximum voltage gain at
1
nom
min_in
V can be calculated as:
min_in
V
nomin
_
M [3]
max
V
M
in
nom
min_
400
19.11*
===
2.337
2.2.4 Transformer turns ratio
Assuming the drain-source voltage drop of secondary-side MOSFET VV
ratio will be:
V
_
=
n [4]
nomin
)(2
+
VV
fo
M
nom
=
400
5.161*
=
)1.012(*2
+
1.0
f
, the transformer turns
2.2.5 Effective load resistance
The effective load resistance can be given as:
V
2
eff
nR
2
88
o
I
2
ππ
o
12
2
*5.16*
Ω=== 106
[5]
25
2.2.6 Resonant network
L
Q =
r
C
r
R
eff
f
Defining the normalised frequency to
the voltage gain of the converter can be written as:
2
),(
=
QFMj
)1(
−
mF
22
F = , the load factor of the LLC converter is
f is
r
−−+−
f
r
[6]
QmFjFmF
)1)(1()1(
,
Its magnitude is:
22
)),(Im()),(Re(),( QFMjQFMjQFG += [7]
The graph of voltage gain
Application Note 7 2011-07-06
G Vs F for different Q can be plotted based on [7] with Mathcad:
=
=
=
1.5
1.413
GF0.22, ()
GF0.267, ()
GF0.3, ()
GF0.35, ()
GF0.5, ()
GF0.65, ()
GF0.8, ()
Line
Figure 2 Voltage gain G Vs normalized frequency F
Among the curves, we find that the one with
1.325
1.238
1.15
1.063
0.975
0.888
0.8
0.2 0.35 0.5 0.65 0.8 0.95 1.1 1.25 1.4
Q can achieve the required peak gainpkG , which
267.0
F
is 8% higher than
pk
From the curve, the corresponding
Having found the proper
C
r
π
L
r
rp
M for design margin, i.e.
max
28.108.1
== MG
max
F can be located where 28.1
Q, we can calculate the
1
RfQ
***2
effr
π
1
Cf
*)*2(
uHmLL
690==
ππ
rr
min
35.0
C
L
,
and
r
nF
66
===
uH
53
L as follows:
r
1
3
106*10*85*268.0*2
1
===
9232
−
10*66*)10*85*2(
G is achieved.
p
[8]
[9]
2.2.6.1 Resonant choke design
The minimum rms voltage across the resonant network is:
inrmsin
min_min__
Then the corresponding rms current flowing through the resonant choke
22
===
VVV
79.1512.337*
ππ
pk
L
can be calculated as:
r
[10]
Application Note 8 2011-07-06
Loading...