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www.infineon.com.
CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG.
Edition 2004-01-28
Published by Infineon Technologies AG,
The information herein is given to describe certain components and shall not be considered as warr anted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technolog ies Representatives worldwide (see address
list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the ex press written
approval of Infineon Technologies, if a failure of such components can reasona bly be expe cted to cause the f ailure
of that life-support device or system, or to aff ect t he safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Off-Line SMPS Current Mode Controller
with integrated 650V/800V
CoolSET™-F2
Product Highlights
• Best in class in DIP8, DIP7, TO220 packages
• No heatsink required for DIP8, DIP7
• Lowest standby power dissipation
• Enhanced protection functions all with
Auto Restart Mode
• Isolated drain package for TO220
• Increased creepage distance for TO220 packages
Features
• 650V/800V avalanche rugged CoolMOS™
• Only few external components required
• Input Vcc Undervoltage Lockout
• 67kHz/100kHz switching frequency
• Max duty cycle 72%
• Low Power Standby Mode to meet
European Commission Requirements
• Thermal Shut Down with Auto Restart
• Overload and Open Loop Protection
• Overvoltage Protection during Auto Restart
• Adjustable Peak Current Limitation via
external resistor
• Overall tolerance of Current Limiting < ±5%
• Internal Leading Edge Blanking
• User defined Soft Start Soft Switching for low EMI
Typical Application
R
VCC
Power
Management
Protection Unit
Start-up
PWM Controller
Current Mode
Precise Low Tolerance
Peak Current Limitation
85 ... 270 VAC
SoftS
C
Soft Start
FB
Feedback
Low Power
StandBy
Soft-Start Control
PWM-Controller
CoolSET™-F2
Description
The second generation CoolSET™-F2 provides several
special enhancements to satisfy the needs for low power
standby and protection features. In standby mode
frequency reduction is used to lower the power
consumption and support a stable output voltage in this
mode. The frequency reduction is limited to 20kHz/21.5
kHz to avoid audible noise. In case of failure modes like
open loop, overvoltage or overload due to short circuit the
device switches in Auto Restart Mode which is controlled by
the internal protection unit. By means of the internal precise
peak current limitation the dimension of the transformer and
the secondary diode can be lower which leads to more cost
efficiency.
5VCCController Supply Voltage
6SoftSSoft-Start
7FBFeedback
1)
at Tj = 110°C
650V1) CoolMOS™ Drain
650V1) CoolMOS™ Source
Package P-TO220-6-46/47
1
234567
SoftS (Soft Start & Auto Restart Control)
This pin combines the function of Soft Start in case of
Start Up and Auto Restart Mode and the controlling of
the Auto Restart Mode in case of an error detection.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to t he internal
PWM-Comparator to control the duty cycle.
Isense (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
integrated CoolMOS™. When Isense reaches the
internal threshold of the Current Limit Comparator, the
Driver output is disabled. By this means the Over
Current Detection is realized.
Furthermore the current information is provided for the
PWM-Comparator to realize the Current Mode.
Drain (Drain of integrated CoolMOS™)
Pin Drain is the connection to the Drain of the internal
CoolMOS
VCC (Power supply)
This pin is the positiv supply of the IC. The operating
range is between 8.5V and 21V.
To provide overvoltage protection the driver gets
disabled when the voltage becomes higher than 16.5V
during Start Up Phase.
GND (Ground)
This pin is the ground of the primary side of the SMPS.
TM
.
Drain
Isense
GND
VCC
SoftS
FB
Figure 3Pin Configuration (top view)
Datasheet V4.57Jan 2004
2Representative Blockdiagram
OUT
-
+
V
Converter
DC Output
Snubber
Drain
CoolMOS™
Gate
Driver
Q
Q
S
Clock
Reset
R
PWM-Latch
G4
norm
-f
standby
f
Spike
SQ
Blanking
G3
PWM
Comparator
Q
R
Error-Latch
s
5
G2
Soft-Start
Soft Start
Comparator
0.72
Duty Cycle Max
max
Duty Cycle
Oscillator
6.5V
4.8V
5.3V
4.0V
Voltage
Reference
Internal Bias
Power Management
13.5V
Reset
Lockout
Power-Down
Line
C
Undervoltage
VCC
C
Power-Up
8.5V
G1
CoolSET™-F2
Representative Blockdiagram
Sense
R
Isense
D1
10k
220ns
Blanking
Leading Edge
csth
V
Comparator
Current-Limit
C5
0.3V
osc
f
norm
f
f
Optocoupler
ICE2Bxxxx
Compensation
Propagation-Delay
Current Limiting
ICE2Axxxx
x3.65
0.8V
Improved Current Mode
PWM OP
FB
U
standby
Standby Unit
67kHz
20kHz
100kHz
21.5kHz
norm
standby
f
f
Start-up
R
85 ... 270 VAC
VCC
C1
4.0V
16.5V
6.5V
C4
C3
>140°C
j
T
Thermal Shutdown
4.8V
5.3V
5.6V
Soft-Start
R
SoftS
FB
R
6.5V
T1
Soft-Start
C
Protection Unit
FB
GND
CoolSET™-F2
C2
Figure 4Representative Blockdiagram
Datasheet V4.58Jan 2004
3Functional Description
3.1Power Management
CoolSET™-F2
Functional Description
3.2Improved Current Mode
Main Line (100V-380V)
R
Start-Up
Primary Winding
C
VCC
VCC
Power Management
SoftS
C
Soft-Start
Undervoltage
Lockout
8.5V
Pow er-D own
Reset
Power-Up
Reset
R
T1
13.5V
6.5V
Soft-S ta rt
Intern al
Bias
Voltage
Reference
RSQ
Q
Error-Latch
Soft-S ta rt C o m para to r
Error-D ete ction
6.5V
5.3V
4.8V
4.0V
PWM-Latch
Figure 5Power Management
The Undervoltage Lockout monitors the external
supply voltage V
current consumption is max. 55µA. When the SMPS is
plugged to the main line the current through R
charges the external Capacitor C
exceeds the on-threshold V
circuit and the voltage reference are switched on. After
that the internal bandgap generates a reference
voltage V
avoid uncontrolled ringing at switch-on a hysteresis is
implemented which means that switch-off is only after
active mode when Vcc falls below 8.5V.
In case of switch-on a Power Up Reset is done by
reseting the internal error-latch in the protection unit.
When V
internal reference is switched off and the Power Down
reset let T1 discharging the soft-start capaci tor C
at pin SoftS. Thus it is ensu re d th at at ev ery s wi tch- on
the voltage ramp at pin SoftS starts at zero.
REF
falls below the off-threshold V
VCC
. In case the IC is inactive the
VCC
Start-up
. When V
VCC
=13.5V the internal bias
CCon
VCC
=6.5V to supply the internal circuits. To
=8.5V the
CCoff
Soft-Start
Soft-Start Com parator
FB
PW M-Latch
RSQ
Driver
PW M Com parator
Q
0.8V
PWM OP
x3.65
Isense
Improved
Current Mode
Figure 6Current Mode
Current Mode means that the duty cycle is controlled
by the slope of the primary current. This is done by
comparison the FB signal with the amplified current
sense signal.
Amplified Current Signal
FB
0.8V
Driver
T
on
t
t
Figure 7Pulse Width Modulation
In case the amplified current sense signal exceeds the
FB signal the on-time T
reseting the PWM-Latch (see Figure 7).
of the driver is finished by
on
Datasheet V4.59Jan 2004
The primary current is sensed by the external series
resistor R
CoolMOS™. By means of Current Mode the regulation
of the secondary voltage is insensitive on line
variations. Line variation causes varition of the
increasing current slope which controls the duty cycle.
The external R
the maximum source current of the integrated
inserted in the source of the integrated
Sense
allows an individual adjustment of
Sense
CoolMOS™.
Soft-Start Com parator
PWM Comparator
FB
PW M-Latch
OSC
0.3V
C5
G a te Drive r
O scillato r
V
0.8V
10k
Ω
x3.65
T
2
R
1
V
1
C
20pF
1
PWM O P
Voltage Ramp
Figure 8Improved Current Mode
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp, which is built by
the switch T
low pass filter composed of R
Figure 9). Every time the oscillator shuts down for max.
duty cycle limitation the switch T2 is closed by V
When the oscillator triggers the Gate Driver T2 is
opened so that the voltage ramp can start.
In case of light load the amplified current ramp is to
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the Compa rator C5, the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the duty cycle to be reduced continously till 0%
by decreasing V
, the voltage source V1 and the 1st order
2
below that threshold.
FB
and C1(see Figure 8,
1
OSC
.
CoolSET™-F2
Functional Description
V
OSC
max.
Duty Cycle
Voltage Ramp
0.8V
FB
0.3V
Gate Driver
Figure 9Light Load Conditions
3.2.1PWM-OP
The input of the PWM-OP is applied over the internal
leading edge blanking to the external sense resistor
connected to pin ISense. R
R
Sense
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.
Sense
3.2.2PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the integrated C oolMOS
signal V
external optocoupler or external transistor in
combination with the internal pullup resistor R
provides the load information of the feedback circuitry.
When the amplified current signal of the integrated
CoolMOS™ exceeds the signal V
(see Figure 10). VFB is created by an
FB
Comparator switches off the Gate Driver.
TM
with the feedback
FB
t
t
t
converts the
and
FB
the PWM-
Datasheet V4.510Jan 2004
6.5V
R
FB
FB
Soft-Start Com parator
PW M-Latch
PW M Com parator
0.8V
Optocoupler
PWM OP
Ise n s e
x3.65
Improved
Current Mode
Figure 10 PWM Controlling
3.3Soft-Start
V
So ftS
5.6V
5.3V
T
So ft-Start
G a te Drive r
t
t
Figure 11 Soft-Start Phase
The Soft-Start is realized by the internal pullup resistor
and the external Capacitor C
R
Soft-Start
Figure 2). The Soft-Start voltage V
charging the external capacitor C
is generated by
SoftS
Soft-Start
(see
Soft-Start
by the internal
CoolSET™-F2
Functional Description
pullup resistor R
compares the voltage at pin SoftS at the negative input
with the ramp signal of the PWM-OP at the positive
input. When Soft-Start voltage V
Feedback voltage V
the pulse width by reseting the PWM-Latch (see Figure
11). In addition to Start-Up, Soft-Start is also activated
at each restart attempt during Auto Restart. By means
of the above mentioned C
defined by the user. The Soft-Start is finished when
exceeds 5.3V. At that time the Protection Unit is
V
SoftS
activated by Comparator C4 and senses the FB by
Comparator C3 wether the voltage is below 4.8V which
means that the voltage on the secondary side of the
SMPS is settled. The internal Zener Diode at SoftS with
breaktrough voltage of 5.6V is to prevent the internal
circuit from saturation (see Figure 12).
6.5V
5.6V
So ftS
6.5V
5.3V
4.8V
R
FB
FB
Figure 12 Activation of Protection Unit
The Start-Up time T
voltage V
Start Phase T
C
Soft Start–
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
integrated CoolMOS™, the clamp circuit and the output
overshoot and prevents saturation of the transformer
during Start-Up.
is settled must be shorter than the Soft-
OUT
Soft-Start
. The Soft-Start-Comparator
Soft-Start
the Soft-Start-Comparator limits
FB
SoftS
the Soft-Start can be
Soft-Start
Power-Up Reset
R
Sof t-S ta rt
C4
Erro r-L atc h
G2
C3
Clock
PWM-Latch
within the converter output
Start-Up
(see Figure 13).
T
Soft Start–
------------------------------------- -=
R
Soft Start–
1.69×
is less than
RSQ
Q
RSQ
Gate
Driver
Q
Datasheet V4.511Jan 2004
CoolSET™-F2
Functional Description
V
SoftS
5.3V
T
So ft-S tart
V
FB
t
4.8V
V
OUT
V
OUT
T
Start-Up
t
t
Figure 13 Start Up Phase
3.4Oscillator and Frequency
Reduction
3.4.1Oscillator
The oscillator generates a frequency f
100kHz. A resistor, a capacitor and a current source
and current sink which determine the frequency are
integrated. The charging and discharging current of the
implemented oscillator capacitor are internally
trimmed, in order to achieve a very accurate switching
frequency. The ratio of controlled charge to discharge
current is adjusted to reach a max. duty cycle limitation
of D
=0.72.
max
switch
= 67kHz/
3.4.2Frequency Reduction
The frequency of the oscillator is depending on the
voltage at pin FB. The dependence is shown in Figure
14. This feature allows a power supply to operate at
lower frequency at light loads thus lowering the
switching losses while maintaining good cross
regulation performance and low output ripple. In case
of low power the power consumption of the whole
SMPS can now be reduced very effective. The minimal
reachable frequency is limited to 20kHz/21.5 kHz to
avoid audible noise in any case.
kHz
100
65
OSC
f
21.5
1.0
1.1 1. 2 1.3 1.4 1. 5 1.6 1.7 1.8 1. 9 2.0
f
norm
f
standby
21.5kHz
67kHz
20kHz
ICE2BxxxxICE2Axxxx
100kHz
V
FB
V
Figure 14 Frequency Dependence
3.5Current Limiting
There is a cycle by cycle current limiting realised by the
Current-Limit Comparator to provide an overcurrent
detection. The source current of the integrated
CoolMOS
R
transformed to a sense voltage V
voltage V
V
off the gate drive. To prevent the Current Limiting from
distortions caused by leading edge spikes a Leading
Edge Blanking is integrated at the Current Sense.
Furthermore a Propagation Delay Compensation is
added to support the immedeate shut down of the
CoolMOS™ in case of overcurrent.
TM
is sensed via an external sense resistor
. By means of R
Sense
exceeds the internal threshold voltage
Sense
the Current-Limit-Comparator immediately turns
csth
the source current is
Sense
. When the
Sense
3.5.1Leading Edge Blanking
V
Sense
V
csth
t
= 220ns
LEB
t
Figure 15 Leading Edge Blanking
Each time when CoolMOS™ is switched on a leading
spike is generated due to the primary-side
capacitances and secondary-side rectifier reverse
recovery time. To avoid a premature termination of the
switching pulse this spike is blanked out with a time
constant of t
= 220ns. During that time the output of
LEB
Datasheet V4.512Jan 2004
the Current-Limit Comparator cannot switch off the
gate drive.
3.5.2Propagation Delay Compensation
In case of overcurrent detection by I
of CoolMOS™ is delayed due to the propagation delay
of the circuit. This delay causes an overshoot of the
peak current I
the peak current (see Figure 16).
which depends on the ratio of dI/dt of
peak
.
the shut down
Limit
Signal2Signal1
I
peak2
I
peak1
I
Limit
I
Sense
I
Overs hoot2
t
Propagation Delay
I
Overshoot1
t
Figure 16 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoot dependent on dI/dt of the rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
and the switch off of CoolMOS™ is compensated
V
csth
over temperature within a range of at least.
0 R
≤≤
So current limiting is n ow capable in a very accura te
way (see Figure 18).
V
V
OSC
Sense
V
Sense
csth
dI
peak
------------
×
dt
max. Duty Cycle
dV
Sense
---------------
dt
off time
t
Propagation Del ay
t
Signal1Signal 2
Figure 17 Dynamic Voltage Threshold V
csth
CoolSET™-F2
Functional Description
The propagation delay compensation is done by
means of a dynamic threshold voltage V
17). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
E.g. I
= 0.5A with R
peak
delay compensation the current sense threshold is set
to a static voltage level V
dI/dt = 0.4A/µs, that means dV
propagation delay time of i.e. t
leads then to a I
propagation delay compensation the overshoot is only
about 2% (see Figure 18).
V
1.3
1.25
1.2
1.15
1.1
Sense
V
1.05
1
0.95
0.9
peak
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
= 2 . Without propagation
Sense
=1V. A current ramp of
csth
Sense
overshoot of 12%. By means of
dV
dt
without compensation
Sense
with compensation
Figure 18 Overcurrent Shutdown
3.6PWM-Latch
The oscillator clock output applies a set pulse to the
PWM-Latch when initiating CoolMOS™ conduction.
After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of reseting the driver is shut
down immediately.
3.7Driver
The driver-stage drives the gate of the CoolMOS™
and is optimized to minimize EMI and to provide high
circuit efficiency. This is done by reducing the switch on
slope when reaching the CoolMOS™ threshold. This is
achieved by a slope control of the rising edge at the
driver’s output (see Figure 19).
Thus the leading switch on spike is minimized. When
CoolMOS™ is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduction of the output
stage. At voltages below the undervoltage lockout
threshold V
the gate drive is active low.
VCCoff
(see Figure
csth
/dt = 0.8V/µs, and a
Propagation Delay
=180ns
V/us
Datasheet V4.513Jan 2004
CoolSET™-F2
Functional Description
ca. t = 130ns
V
Gate
5V
t
Figure 19 Gate Rising Slope
3.8Protection Unit (Auto Restart Mode)
An overload, open loop and overvoltage detection is
integrated within the Protection Unit. These three
failure modes are latched by an Error-Latch. Ad ditiona l
thermal shutdown is latched by the Error-Latch. In case
of those failure modes the Error-Latch is set after a
blanking time of 5µs and the CoolMOS™ is shut down.
That blanking prevents the Error-Latch f rom distor tions
caused by spikes during operation mode.
3.8.1Overload / Open L oop with Normal
Load
Figure 20 shows the Auto Restart Mode in case of
overload or open loop with normal load. The detection
of open loop or overload is provided by the Comparator
C3, C4 and the AND-gate G2 (see Figure 21). The
detection is activated by C4 when the voltage at pin
SoftS exceeds 5.3V. Till this time the IC operates in the
Soft-Start Phase. After this phase the comparator C3
can set the Error-Latch in case of open loop or ove rload
which leads the feedback voltage V
threshold of 4.8V. After latching VCC decreases till
8.5V and inactivates the IC. At this time the external
Soft-Start capacitor is discharged by the internal
transistor T1 due to Power Down Reset. When the IC
is inactive V
the Capacitor C
R
Start-Up
Reset and the external Soft-Start capacitor C
charged by the internal pullup resistor R
the Soft-Start Phase which ends when the voltage at
pin SoftS exceeds 5.3V the detection of overload and
open loop by C3 and G2 is inactive. In this way the Start
Up Phase is not detected as an overload.
increases till V
VCC
by means of the Start-Up Resistor
VCC
. Then the Error-Latch is reset by Power Up
CCon
to exceed the
FB
= 13.5V by charging
is
Soft-Start
. During
Soft-Start
Overload / Open Loop wi th Normal Load
5µs Blanking
FB
4.8V
Soft S
5.3V
Dri ver
VCC
13.5V
8.5V
Fail ure
Dete cti on
Soft-St art Phase
T
Burst1
Figure 20 Auto Restart Mode
So ftS
FB
C
6.5V
Soft-S ta rt
R
Soft-S ta rt
T1
R
FB
6.5V
Power Up Reset
C4
5.3V
4.8V
C3
T
Restar t
t
t
t
t
Error-L a tch
G2
Figure 21 FB-Detection
Datasheet V4.514Jan 2004
But the Soft-Start Phase must be finished within the
Start Up Phase to force the voltage at pin FB below the
failure detection threshold of 4.8V.
3.8.2Overvoltage due to Open Loop with
No Load
Open loop & no load condition
5µs Blanking
FB
4.8V
Failure
Detection
CoolSET™-F2
Functional Description
normal operation mode is prevented from overvoltage
detection due to varying of VCC concerning the
regulation of the converter output. When the voltage
is above 4.0V the overvoltage detection by C1 is
V
SoftS
deactivated.
VCC
So ftS
6.5V
16.5V
R
Soft-Start
4.0V
C1
C2
G1
Error L a tch
So ftS
5.3V
4.0V
Driver
VCC
16.5V
13.5V
8.5V
Soft- S ta rt P h a s e
Overvoltage
Detection Phase
Overvoltage D etection
T
Burst2
T
t
t
Restart
t
t
Figure 22 Auto Restart Mode
Figure 22 shows the Auto Restart Mode for open loop
and no load condition. In case of this failure mode the
converter output voltage increases and also VCC. An
additional protection by the comparators C1, C2 and
the AND-gate G1 is implemented to consider this
failure mode (see Figure 23).The overvoltage detection
is provided by Comparator C1 only in the first time
during the Soft-Start Phase till the Soft-Start voltage
exceeds the threshold of the Comparator C2 at 4.0V
and the voltage at pin FB is above 4.8V. When VCC
exceeds 16.5V during the overvoltage detect ion pha se
C1 can set the Error-Latch and the Burst Phase during
Auto Restart Mode is finished earlier. In that case
is shorter than T
T
Burst2
. By means of C2 the
Soft-Start
C
So ft-S tart
T1
Power Up Reset
Figure 23 Overvoltage Detection
3.8.3Thermal Shut Down
Thermal Shut Down is latched by the Error-Latch when
junction temperature T
exceeding an internal threshold of 140°C. In that case
the IC switches in Auto Restart Mode.
Note: All the values which are mentioned in the
functional description are typical. Please refer
to Electrical Characteristics for min/max limit
values.
of the pwm controller is
j
Datasheet V4.515Jan 2004
CoolSET™-F2
Electrical Characteristics
4Electrical Characteristics
4.1Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin
(VCC) is discharged before assembling the application circuit.
ParameterSymbolLimit ValuesUnitRemarks
min.max.
Drain Source Voltage
ICE2A0565/165/265/365/765I/765P2
ICE2B0565/165/265/365/765I/765P2
ICE2A0565Z
Drain Source Voltage
ICE2A180Z/280Z
Avalanche energy,
repetitive t
max. T
AR
=150°C
j
limited by
1)
ICE2A0565 E
ICE2A165E
ICE2A265E
ICE2A365E
ICE2B0565 E
ICE2B165E
ICE2B265E
ICE2B365E
ICE2A0565Z E
ICE2A180Z E
ICE2A280Z E
ICE2A765IE
ICE2B765IE
ICE2A765P2 E
ICE2B765P2 E
1)
Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR* f
V
DS
V
DS
AR1
AR2
AR3
AR4
AR5
AR6
AR7
AR8
AR9
AR10
AR11
AR12
AR13
AR14
AR15
-650VTj = 110°C
-800VTj = 25°C
-0.01mJ
-0.07mJ
-0.40mJ
-0.50mJ
-0.01mJ
-0.07mJ
-0.40mJ
-0.50mJ
-0.01mJ
-0.07mJ
-0.40mJ
-0.50mJ
-0.50mJ
-0.50mJ
-0.50mJ
6
Datasheet V4.516Jan 2004
CoolSET™-F2
Electrical Characteristics
ParameterSymbolLimit ValuesUnitRemarks
min.max.
Avalanche current,
repetitive tAR limited by
max. T
Equivalent to discharging a 100pF capacitor through a 1.5 kΩ series resistor
2)
1kV at pin drain of ICE2x0565, ICE2A0565Z
ICE2A0565 I
ICE2A165I
ICE2A265I
ICE2A365I
ICE2B0565 I
ICE2B165I
ICE2B265I
ICE2B365I
ICE2A0565Z I
ICE2A180Z I
ICE2A280Z I
ICE2A765II
ICE2B765II
ICE2A765P2 I
ICE2B765P2 I
AR1
AR2
AR3
AR4
AR5
AR6
AR7
AR8
AR9
AR10
AR11
AR12
AR13
AR14
AR15
I
Sense
R
R
V
CC
FB
SoftS
j
S
thJA1
thJA2
ESD
-0.5A
-1A
-2A
-3A
-0.5A
-1A
-2A
-3A
-0.5A
-1A
-2A
-7A
-7A
-7A
-7A
-0.322V
-0.36.5V
-0.36.5V
-0.33V
-40150°CCont roller & CoolMOS™
-50150°C
-90K/WP-DIP-8-6
-96K/WP-DIP-7-1
-2
2)
kVHuman Body Model
Datasheet V4.517Jan 2004
CoolSET™-F2
Electrical Characteristics
4.2Thermal Impedance (ICE2X765I and ICE2X765P2)
ParameterSymbolLimit ValuesUnitRemarks
min.max.
Thermal Resistance
Junction-Ambient
Junction-CaseICE2A765I
4.3Operating Range
Note: Within the operating range the IC operates as described in the functional description.
ParameterSymbolLimit ValuesUnitRemarks
VCC Supply VoltageV
Junction Temperature of
Controller
Junction Temperature of
CoolMOS™
ICE2A765I
ICE2B765I
ICE2A765P2
ICE2B765P2
ICE2B765I
ICE2A765P2
ICE2B765P2
CC
T
JCon
T
JCoolMOS
R
thJA3
R
thJC
-74K/WFree standing with no heatsink
-2.5K/W
min.max.
V
CCoff
21V
-25130° CLimited due to thermal shut down
of controller
-25150° C
Datasheet V4.518Jan 2004
CoolSET™-F2
Electrical Characteristics
4.4Characteristics
Note: The electrical characteristics involve the spread of values given within the specified supply voltage and
junction temperature range T
are related to 25°C. If not otherwise stated, a supply voltage of V
1) Shear and punch direction no burrs this surface
Back side, heatsink contour
All metal surfaces tin plated, except area of cut.
A
±0.2
2.8
-0.15
3.7
±0.3
1.3
5.3
0.05
+0.1
-0.02
B
2.4
±0.3
±0.3
8.4
4.4
1)
8.6
6 x 0.6
0.25AMB
±0.1
5.3
2.4
±0.3
8.4
±0.3
±0.2
9.2
±0.2
9.2
0.5
0.5
±0.1
±0.1
1) Shear and punch direction no burrs this surface
Back side, heatsink contour
All metal surfaces tin plated, except area of cut.
Figure 60 P-TO220-6-47 (Isodrain Package)
Dimensions in mm
Datasheet V4.532Jan 2004
Total Quality Management
Qualität hat für uns eine umfassende
Bedeutung. Wir wollen allen Ihren
Ansprüchen in der bestmöglichen
Weise gerecht werden. Es geht uns also
nicht nur um die Produktqualität –
unsere Anstrengungen gelten
gleichermaßen der Lieferqualität und
Logistik, dem Service und Support
sowie allen sonstigen Beratungs- und
Betreuungsleistungen.
Dazu gehört eine bestimmte
Geisteshaltung unserer Mitarbeiter.
Total Quality im Denken und Handeln
gegenüber Kollegen, Lieferanten und
Ihnen, unserem Kunden. Unsere
Leitlinie ist jede Aufgabe mit „Null
Fehlern“ zu lösen – in offener
Sichtweise auch über den eigenen
Arbeitsplatz hinaus – und uns ständig
zu verbessern.
Unternehmensweit orientieren wir uns
dabei auch an „top“ (Time Optimized
Processes), um Ihnen durch größere
Schnelligkeit den entscheidenden
Wettbewerbsvorsprung zu verschaffen.
Geben Sie uns die Chance, hohe
Leistung durch umfassende Qualität zu
beweisen.
Wir werden Sie überzeugen.
Quality takes on an allencompassing
significance at Semiconductor Group.
For us it means living up to each and
every one of your demands in the best
possible way. So we are not only
concerned with product quality. We
direct our efforts equally at quality of
supply and logistics, service and
support, as well as all the other ways in
which we advise and attend to you.
Part of this is the very special attitude of
our staff. Total Quality in thought and
deed, towards co-workers, suppliers
and you, our customer. Ou r gui del ine i s
“do everything with zero defects”, in an
open manner that is demonstrated
beyond your immediate workplace, and
to constantly improve.
Throughout the corporation we also
think in terms of Time Optimized
Processes (top), greater speed on our
part to give you that decisive
competitive edge.
Give us the chance to prove the best of
performance through the best of quality
– you will be convinced.
http://www.infineon.com
Published by Infineon Technologies AG
This datasheet has been download from:
www.datasheetcatalog.com
Datasheets for electronics components.
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