Off-Line SMPS Current Mode
Controller with integrated 650V/
800V CoolMOS™
Power Management & Supply
Never stop thinking.
CoolSET™-F2
Revision History:2001-09-19Datasheet
Previous Version:First One
PageSubjects (major changes since last revision)
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CoolMOS™, CoolSET™ are trademarks of Infineon Technologies AG.
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Edition 2001-09-19
Published by Infineon Technologies AG,
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).
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Due to technical requirem ent s components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon T echnologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiv eness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Off-Line SMPS Current Mode Controller
with integrated 650V/800V CoolMOS™
Product Highlights
• Best of Class in DIP8 Package
• No Heatsink required
• Lowest Standby Power Dissipation
• Enhanced Protection Functions all
with Auto Restart Mode
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
P-DIP-8-6
Features
•650V/800V Avalanche Rugged CoolMOS™
•Only few external Components required
•Input Undervoltage Lockout
•100kHz Switching Frequency
•Max Duty Cycle 72%
•Low Power Standby Mode to meet European
Commission Requirements
•Thermal Shut Down with Auto Restart
•Ove r l oad and Open Loop Prot ec tion
•Overvoltage Protection during Auto Rest art
•Adjustable Peak Current Limitation via
External Resistor
•Overall Tolerance of Current Limiting < ±5%
•Internal Leading Edge Blanking
•User defined Soft Start
•Soft Switching for Low EMI
Typical Application
R
VCC
Power
Precise Low Tolerance
Peak Current Limitation
Protection Unit
Start-up
PWM Controller
Current Mode
85 ... 270 VAC
SoftS
C
Soft Start
FB
Feedback
Low Power
StandBy
Soft-Start Control
PWM-Controller
CoolSET™-F2
Management
Description
The second generation CO OLSET™-F2 provides several
special enhancements t o satisfy the needs for low po wer
standby and protection features. In standby mode
frequency reduction is used to lower the power
consumption and support a stable output voltage in this
mode. The frequency reduction is limited to 21.5 kHz to
avoid audible noise. In case of failure modes like open loop,
overvoltage or overload due to short circuit the device
switches in Auto Rest art Mode which is control led by the
internal protection u nit. By means of the internal precise
peak current limitation the dimension of the transformer and
the secondary diode can be lower which leads to more cost
efficiency.
+
Snubber
C
VCC
Drain
CoolMOS™
Isense
GND
Feedback
R
Sense
Converter
DC Output
-
TypeOrdering CodePackageU
DS
F
OSC
R
DSon
1)
230VAC ±15%
2)
85-265 VAC
2)
ICE2A165Q67040-S4426P-DIP-8-6650V100kHz3.0Ω31W18W
ICE2A265Q67040-S4414P-DIP-8-6650V100kHz0.9Ω52W32W
ICE2A365Q67040-S4415P-DIP-8-6650V100kHz0.45Ω67W45W
ICE2A180ES Samples available P-DIP-8-6800V100kHz3.0Ω31W18W
ICE2A280Q67040-S4416P-DIP-8-6800V100kHz0.8Ω54W34W
1)
typ @ T=25°C
2)
Maximum power rating at Ta=75°C, Tj=125°C and with copper area on PCB = 6cm²,
1SoftSSoft-Start
2FBFeedback
3Isen s eController Current Sense Input,
CoolMOS™ Source Output
4Drain
5Drain
6N.CNot connected
7VCCController Supply Voltage
8GNDController Ground
1)
at Tj = 110°C
2)
at Tj = 110°C
1)
/800V CoolMOS™ Drain
650V
2)
/800V CoolMOS™ Drain
650V
Package P-DIP-8-6
1.2Pin Functionality
SoftS (Soft Start & Auto Restart Control)
This pin combines the function of Soft Start i n case of
Start Up and Auto Restart Mod e and the con troll ing of
the Auto Restart Mode in case of an error detection.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle.
Isense (Current Sens e)
The Current Sense pin sense s the voltage develop ed
on the series resistor inserted in the source of the
integrated CoolMOS™. When Isense reaches the
internal threshold of th e Current Limi t Compara tor , the
Driver output is disabled. By this means the Over
Current Detection is realized.
Furthermore the current information is provided for the
PWM-Comparator to realize the Current Mode.
Drain (Drain of integrated CoolMOS™)
Pin Drain is the connection to the Drain of the internal
CoolMOS
TM
.
SoftS
Isense
Drain
Figure 1Pin Configuration (top view)
1
2
3
4
8
7
6
5
GND
VCCFB
N.C
Drain
VCC (Power supply)
This pin is the positiv su pply of the IC. The opera ting
range is between 8.5V and 21 V.
To provide overvoltage protection the driver gets
disabled when the voltage becomes higher than 16.5V
during Start Up Phase.
GND (Ground)
This pin is the ground of the primary side of the SMPS.
Datasheet5September 2001
2Representative Blockdi agram
-
OUT
+
V
Converter
DC Output
Sense
R
Snubber
Drain
Ω
10k
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Representative Blockdiagram
Optocoupler
Isense
D1
CoolMOS™
Gate
Driver
Q
Q
S
21.5-100kHz
Soft-Start
R
PWM-Latch
Soft-Start
Comparator
Soft Start
SoftS
5.6V
C
R
Spike
Soft-Start
G4
SQ
Blanking
G3
G2
C4
5.3VC34.8V
PWM
Q
R
s
µ
5
6.5V
T1
0.72
max
Clock
Duty Cycle
Oscillator
6.5V
4.8V
5.3V
4.0V
Bias
Internal
Voltage
Reference
13.5V
Power Management
Line
VCC
C
C
Start-up
R
VCC
Lockout
8.5V
Undervoltage
C1
16.5V
Reset
Power-Down
6.5V
4.0V
Reset
Power-Up
G1
C2
Comparator
0.3V
Error-Latch
FB
R
C5
Blanking
Leading Edge
Comparator
Current-Limit
osc
f
Thermal
FB
200ns
csth
V
0.8V
FB
U
21.5kHz
100kHz
Shutdown
>140°C
j
T
Compensation
Propagation-Delay
x3.65
PWM OP
Standby Unit
Protection Unit
Current Limiting
Improved Current Mode
GND
CoolSET™-F2
85 ... 270 VAC
Figure 2Represent a tive Blockdia gr a m
Datasheet6September 2001
3Functional Description
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Functional Description
3.1Power Management
Main Line (100V-380V)
R
Start-Up
C
VCC
VCC
Power Management
So ftS
C
Soft-S ta rt
Undervoltage
Lockout
8.5V
Pow er-D ow n
Reset
Pow er-U p
Reset
T1
13.5V
6.5V
R
Soft-S tart
Internal
Bias
Voltage
Reference
RSQ
Q
Error-Latch
So ft-Start C om para to r
Error-D etec tion
Primary Winding
6.5V
5.3V
4.8V
4.0V
PWM-Latch
3.2Improved Current M ode
Soft-Start Com parator
FB
PW M-Latch
RSQ
Driver
PW M C om parator
Q
0.8V
PW M O P
x3.65
Isense
Improved
Current Mode
Figure 4Current Mode
Current Mode means that the d uty cycle is controlled
by the slope of the primary current. This is done by
comparison the FB signal with the amplified current
sense signal.
Figure 3P ower Management
The Undervoltage Lockout monitors the external
supply voltage V
. In case the IC is inactive the
VCC
current consumption is max. 55µA. When the SMPS is
plugged to the main line the current through R
charges the external Capacitor C
exceeds the on -threshold V
=13.5V the internal bias
CCon
. When V
VCC
Start-up
VCC
circuit and the voltage reference are switched on. After
it the internal ba ndgap generates a refere nce voltage
V
=6.5V to supply the internal circuits. To avoid
REF
uncontrolled ringing at switch-on a hysteresis is
implemented which mea ns that switch-off is only af ter
active mode when Vcc falls below 8.5V.
In case of switch-on a Power Up Reset is done by
reseting the internal error-latch in the protection unit.
When V
falls below the off-threshold V
VCC
CCoff
=8.5V the
internal reference is sw itched off and t he Powe r Dow n
reset let T1 discharging the soft-start capacitor C
Soft-Start
at pin SoftS. Thus it is ensured that at every switch-on
the voltage ramp at pin SoftS starts at zero.
Am plified Current Signal
FB
0.8V
Driver
T
on
t
t
Figure 5Pulse Width Modula ti on
In case the amplified current sense signal exceeds the
FB signal the on-time T
reseting the PWM-Latch (see Figure 5).
of the driver is finished by
on
Datasheet7September 2001
The primary current is sensed by the external series
resistor R
inserted in the source of the inte grated
Sense
CoolMOS™. By means of Current Mode the regulation
of the secondary voltage is insensitive on line
variations. Line variation causes varition of the
increasing current slope which contro ls th e duty cycle.
The external R
allows an individual a djustment of
Sense
the maximum source current of the integrated
CoolMOS™.
S oft-Sta rt Co mp a ra to r
PW M C om parator
FB
PW M-Latch
V
OSC
Duty Cycle
Voltage Ram p
0.8V
FB
0.3V
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Functional Description
max.
t
Oscillator
0.3V
C5
V
OSC
G a te Driv e r
0.8V
10k
Ω
x3.65
T
2
C
1
R
1
20pF
V
1
PWM OP
Voltage Ram p
Figure 6Improve d Current Mode
To improve the Current Mode during light load
conditions the amplified current ramp of the PWM-OP
is superimposed on a voltage ramp , which is built by
the switch T
low pass filter composed of R
Figure 7). Every time the oscillator shuts down for max.
duty cycle limitation the switch T2 is closed by V
When the oscillator triggers the Gate Driver T2 is
opened so that the voltage ramp can start.
In case of light load the amplified current ramp is to
small to ensure a stable regulation. In that case the
Voltage Ramp is a well defined signal for the
comparison with the FB-signal. The duty cycle is then
controlled by the slope of the Voltage Ramp.
By means of the C5 Comparator the Gate Driver is
switched-off until the voltage ramp exceeds 0.3V. It
allows the duty cycle to be reduced continou sly till 0%
by decreasing V
, the voltage source V1 and the 1st order
2
below that threshold.
FB
and C1(see Figure 6,
1
OSC
G a te D r ive r
Figure 7Light Load Conditions
3.2.1PWM-OP
The input of the PWM-OP is applied over t he internal
leading edge blanking to the external sense resistor
R
connected to pin ISense. R
Sense
source current into a sense voltage. The sense voltage
is amplified with a gain of 3.65 by PWM OP. The output
of the PWM-OP is connected to the voltage source V1.
The voltage ramp with the superimposed amplified
current singal is fed into the positive inputs of the PWMComparator, C5 and the Soft-Start-Comparator.
.
3.2.2PWM-Comparator
The PWM-Comparator compares the sensed current
signal of the i ntegrated CoolMOS
signal V
(see Figure 8). VFB is created by an external
FB
optocoupler or external transistor in combination with
the internal pullup re sistor R
and provides the load
FB
information of the feedback circuitry. When the
amplified current signal of the integrated CoolMOS™
exceeds the signal V
the PWM-Compar ator swi tches
FB
off the Gate Driver.
converts the
Sense
TM
with the feedback
t
t
Datasheet8September 2001
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Functional Description
6.5V
R
FB
S o ft-Sta rt C o mp a ra t o r
FB
PW M C om parator
0.8V
Optocoupler
PW M O P
Figure 8PWM Controlling
3.3Soft-Start
V
SoftS
5.6V
5.3V
T
S of t-S ta rt
PWM -Latch
Isense
x3.65
Improved
Current Mode
pullup resistor R
. The Soft-Start-Comparator
Soft-Start
compares the voltage at pin SoftS at the negative input
with the ramp signal of the PWM-OP at the positive
input. When Soft-Start voltage V
Feedback voltage V
the Soft-Start-Comparator limits
FB
is less than
SoftS
the pulse width by reseting the PWM-Latch (see Figure
9). In addition to Start -Up, Soft-Start is a lso activated at
each restart attempt duri ng Aut o Resta rt . By mean s of
the above mentioned C
the Soft-Start can be
Soft-Start
defined by the user. The Soft-Start is finished when
V
exceeds 5.3V. At that ti me the Prot ection Uni t is
SoftS
activated by Comparator C4 and senses the FB by
Comparator C3 wether the voltage is below 4.8V which
means that the voltage on the secondary side of the
SMPS is settled. The internal Zener Diode at SoftS with
breaktrough voltage of 5.6V is to pre vent the internal
circuit from saturation (see Figure 10).
5.6V
SoftS
6.5V
FB
5.3V
4.8V
R
FB
6.5V
R
Power-Up Reset
So ft-Sta rt
C4
C3
Clock
Error-Latch
G2
PW M-Latch
RSQ
Q
RSQ
Gate
Driver
Q
Figure 10Activation of Protection Unit
The Start-Up time T
voltage V
Start Phase T
is settled must be shorter than the Soft-
OUT
Soft-Start
within the conver ter output
Start-Up
(see Figure 11).
T
−
StartSoft
−
StartSoft
69,1×
Gate Driver
C
t
=
−
StartSoft
R
By means of Soft-Start there is an effective
minimization of current and voltage stresses on the
integrated CoolMOS™, the clamp circuit and the output
overshoot and prevent s saturation of the transforme r
during Start-Up.
t
Figure 9Soft-Start Phase
The Soft-Start is r e al i z ed by the internal pu ll u p r es i s to r
R
Figure 2). The Soft-Start voltage V
charging the external capacitor C
and the external Capacitor C
Soft-Start
Soft-Start
is generated by
SoftS
by the internal
Soft-Start
(see
Datasheet9September 2001
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Functional Description
V
SoftS
5.3V
T
So ft-Sta rt
V
FB
4.8V
V
OUT
V
OUT
T
Start-Up
Figure 11 Start Up Phase
3.4Oscillator and Frequency
Reduction
kHz
100
65
OSC
f
21,5
0,9
t
1,0
1,1 1,2 1,3 1,4 1,5 1,6 1,7 1,8 1,9 2
V
FB
Figure 12Frequency Dependence
3.5Current Limiting
There is a cycle by cycle current limiting realised by the
t
Current-Limit Comparator to provide an overcurrent
detection. The source current of the integrated
CoolMOS
R
Sense
transformed to a sense voltage V
voltage V
V
t
csth
off the gate drive. To prevent the Current Limiting from
distortions caused by leading edge spikes a Lead ing
Edge Blanking is integrated at the Current Sense.
Furthermore a Propagation Delay Compensation is
added to support the immedeate shut down of the
CoolMOS™ in case of overcurrent.
TM
is sensed via an external sense resistor
. By means of R
exceeds the internal threshold voltage
Sense
the source current is
Sense
Sense
the Current-Limit-Comparator immediately turns
V
. When the
3.4.1Oscillator
The oscillator generates a frequency f
resistor, a capacitor and a current source and current
sink which determine the frequency are integrated. The
charging and discharging current of the implemented
oscillator capacitor are intern ally trimmed, in order to
achieve a very accurate switching frequency. The ratio
of controlled charge to discharge current is adjusted to
reach a max. duty cycle limitation of D
= 100kHz. A
switch
=0.72.
max
3.4.2Frequency Reduction
The frequency of the oscillator is depending on the
voltage at pin FB. The d epe ndence is sho wn in F igu re
12. This feature allows a power supply to op erate at
lower frequency at light loads thus lowering the
switching losses while maintaining good cross
regulation performan ce and low output ripple. In case
of low power the power consumption of the whole
SMPS can now be reduced very effective. The minimal
reachable frequency is limited to 21.5 kHz to avoid
audible noise in any case.
3.5.1Leading Edge Blanking
V
Sense
V
csth
t
= 220ns
LEB
t
Figure 13 Leading Edge Blanking
Each time when CoolMOS™ is switched on a le ading
spike is generated due to the primary-side
capacitances and secondary-side rectifier reverse
recovery time. To avoid a premature termination of the
switching pulse this spi ke is blanked out with a time
constant of t
the Current-Limit Comparator cannot switch off the
gate drive.
= 220ns. During that time the output of
LEB
Datasheet10September 2001
CoolSET™-F2
t
ICE2A165/265/365
ICE2A180/280
Functional Description
3.5.2Propagation Delay Compensation
In case of overcurrent detection by I
of CoolMOS ™ is delayed due to the propagation delay
of the circuit. This delay causes an over shoot of the
peak current I
which depends on the ratio of dI/dt of
peak
the peak current (see Figure 14).
.
I
Sense
I
peak2
I
peak1
I
Limit
I
Overshoot2
Figure 1 4 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform.
A propagation delay compensation is integrated to
bound the overshoo t dependent on dI/dt of t he rising
primary current. That means the propagation delay
time between exceeding the current sense threshold
V
and the switch off of CoolMOS™ is compensated
csth
over temperature within a range of at least.
dI
R
Sense
dt
peak
10≤×≤
So current limiting is now ca pable in a very accurate
way (see Figure 16).
V
OSC
max. Duty Cycle
Limit
Signal1Signal2
t
Propagation Delay
dV
Sense
dt
the shut down
I
Overshoot1
t
The propagation delay compensation is done by
means of a dynamic threshold voltage V
(see Figure
csth
15). In case of a steeper slope the switch off of the
driver is earlier to compensate the de lay.
E.g. I
= 0.5A with R
peak
= 2 . Without pr opagation
Sense
delay compensation the cu rrent sense thresh old is set
to a static voltage level V
dI/dt = 0.4A/µs, that means dV
propagation delay time of i.e. t
leads then to a I
peak
=1V. A current ramp of
csth
/dt = 0.8V/µs, and a
Sense
Propagation Delay
=180ns
overshoot of 12%. By means of
propagation delay compensatio n the overshoo t is only
about 2% (see Figure 16).
with compensationwithout compensation
V
1,3
1,25
1,2
1,15
Sense
1,1
V
1,05
1
0,95
0,9
0 0,2 0,4 0,6 0,8 11,2 1,4 1,6 1,82
dV
Sense
d
V
s
µ
Figure 16Overcurrent Shutdown
3.6PWM-Latch
The oscillator clock output appl ies a set pulse to the
PWM-Latch when initiating CoolMOS™ conduction.
After setting the PWM-Latch can be reset by the PWMOP, the Soft-Start-Comparator, the Current-LimitComparator, Comparator C3 or the Error-Latch of the
Protection Unit. In case of resetin g the driver is shut
down immediately.
3.7Driver
off time
V
Sense
V
csth
Propagation Delay
Signal1Signal2
Figure 15 Dynamic Voltage Threshold V
t
t
csth
The driver-stage drives the gate of the CoolMOS™
and is optimized t o minimize EMI and to provide high
circuit efficiency. This is done by reducing the switch on
slope when reaching the CoolMOS™ threshold. This is
achieved by a slope control of the rising edge at the
driver’s output (see Figure 17).
Thus the leading switch on spike is minimized. When
CoolMOS™ is switched off, the falling shape of the
driver is slowed down when reaching 2V to prevent an
overshoot below ground. Furthermore the driver circuit
is designed to eliminate cross conduct ion of the output
stage. At voltages below the undervoltage lockout
threshold V
the gate drive is active low.
VCCoff
Datasheet11September 2001
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Functional Description
V
5V
Gate
ca. t = 130ns
t
Figure 17 Gate Rising Slope
3.8Protection Unit (Auto Re start Mode)
An overload, open loo p and overvoltage detection is
integrated within the Protection Unit. These three
failure modes are latched by an Error-Latch. Additional
thermal shutdown is latched by the Error-Latch. In case
of those failure modes the Error-Latch is set after a
blanking time of 5µs and the C ool MOS™ is shut down.
That blanking pr eve nts the Err or-L atc h fr om di sto rti ons
caused by spikes during operation mode.
3.8.1Overload & O pen loop wi th normal
load
Figure 18 shows the Auto Restart Mode in case of
overload or open l oop w ith norma l loa d. T he det ectio n
of open loop or overload is provided by the Comparator
C3, C4 and the AND-gate G2 (see Figure19). The
detection is activa ted by C4 when the vol tage at pin
SoftS exceeds 5.3V. Till this time the IC operates in the
Soft-Start Phase. After this phase the comparator C3
can set the Error-Latch in case of open loop or overload
which leads the feedback voltage V
threshold of 4.8V. After latching VCC decreases till
8.5V and inactivates t he IC. At this time the external
Soft-Start capacitor is discharged by the internal
transistor T1 due to Powe r Down Reset. When th e IC
is inactive V
the Capacitor C
R
. Then the Error-Latch is reset by Power Up
Start-Up
increases till V
VCC
by means of the Start-Up Resistor
VCC
CCon
Reset and the external Soft -Start capacitor C
charged by the internal pullup resistor R
the Soft-Start Phase which ends when the voltage at
pin SoftS exceeds 5. 3V the detection of overload an d
open loop by C3 and G2 is inactive. In this way the Start
Up Phase is not detect ed as an overload.
to exceed the
FB
= 13.5V by charging
is
Soft-Start
. During
Soft-Start
O v e r lo a d & O pe n loo p /n o r ma l loa d
5µs Blanking
FB
4.8V
Fa ilu r e
Detection
SoftS
5.3V
Soft-S tart Ph a se
T
Driver
VCC
13.5V
8.5V
Burst1
Figure 18Auto Restart Mode
So ftS
FB
C
So ft-Sta rt
6.5V
R
T1
Power Up Reset
So ft-Sta rt
C4
5.3V
4.8V
C3
T
Restart
G2
t
t
t
t
Erro r-L atch
R
FB
6.5V
Figure 19FB-Detection
Datasheet12September 2001
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Functional Description
But the Soft-Sta rt Phase must be finished within the
Start Up Phase to force the voltage at pin FB below the
failure detection thresh old of 4.8V.
3.8.2Overvoltage due to open loop with
no load
Open loop & no load condition
5µs Blanking
FB
4.8V
Failure
Detection
So ftS
5.3V
4.0V
Driver
VCC
16.5V
13.5V
Soft-Start Phase
Overvoltage
Detection Phase
T
Overvoltage Detection
Burst2
T
Restart
t
t
t
detection due to varying of VCC concerning the
regulation of the co nverter output. When the voltage
V
is above 4.0V the ov ervoltage detection by C1 is
SoftS
deactivated.
VCC
6.5V
C1
16.5V
R
So ft-S tart
4.0V
SoftS
C
Soft-Start
T1
C2
Power Up Reset
Figure 21Overvoltage Detection
3.8.3Thermal Shut Down
Thermal Shut Down is latched by the Error-Latch when
junction temperature T
exceeding an internal thre shold of 1 40°C. In that c ase
the IC switches in Auto Restart Mode.
of the pwm controller is
j
Error Latch
G1
8.5V
t
Figure 20 Auto Restart Mode
Figure 20 shows the Auto Restart Mode for open loop
and no load co nditi on. In case o f this failure mode the
converter output voltage in creases and also VCC. An
additional protect ion by the comparators C1, C2 and
the AND-gate G1 is implemented to consider this
failure mode (see Figure 21).The overvoltage detection
is provided by Comparator C1 only in the first time
during the Soft-Start Phase till the Soft-Start voltage
exceeds the threshold of t he Comparator C2 at 4.0V
and the voltage at pin FB is abo ve 4.8V. When VCC
exceeds 16.5V durin g the ov er volt ag e dete cti on ph ase
C1 can set the E r r or- L atch and the Bu r s t P h as e during
Auto Restart Mode is finished earlier. In that case
T
is shorter than T
Burst2
. By means of C2 the
Soft-Start
normal operation mo de is preven ted from overvoltage
Note:All the values which are mentioned in the
functional descriptio n are typical. Please refer
to Electrical Characteristics for min/max limit
values.
Datasheet13September 2001
CoolSET™-F2
ICE2A165/265/365
ICE2A180/280
Electrical Characteristics
4Electrical Characteristics
4.1Absolute Maximum Ratings
Note:Absolute maxi mum ratings are defi ned as ratings, which when being exceed ed may lead to destruct ion
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 6
(VCC) is discharged before a ssembling the application circuit.
Qualität hat für uns eine umfassende
Bedeutung. Wir wollen allen Ihren
Ansprüchen in der bestmöglichen
Weise gerecht werd en. Es geht uns also
nicht nur um die Produktqualität –
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gleichermaßen der Lieferqualität und
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Dazu gehört eine bestimmte
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Total Quality im Denken und Handeln
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Geben Sie uns die Chance, hohe
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Wir werden Sie überzeugen.
Quality takes on an allencompassing
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For us it means living up to each and
every one of your demands in the best
possible way. So we are not only
concerned with product quality. We
direct our efforts equally at quality of
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Part of this is t he v ery spec i al att it ude of
our staff. Total Quality in thought and
deed, towards co-workers, suppliers
and you, our customer. Our guideline is
“do everything with zero defects”, in an
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Throughout the corporation we also
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Processes (top), greater speed on our
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Give us the chance to prove the best of
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– you will be convinced.
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Published by Infineon Technologies AG
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