INFINEON BTS 5440 G User Manual

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Addendum for PCN 2004-018-A BTS 5440 G

Addendum for PCN-Datasheet 2004-018-A: BTS 5440 G

This Addendum and PCN-Datasheet refers to the PCN 2004-018-A:

“Minor datasheet adaption for BTS 5240 L, BTS 5240 G, BTS 5440 G “.

The PCN-datasheet attached will be valid starting from August 2004.

There are the following changes in the datasheet (on page 7):

Old: Symbol min typ max Unit Current limit adjustment threshold voltage V

- - 3.6

New: Symbol min typ max Unit Current limit adjustment threshold voltage V

- - 4.0

2.6 - - V

CLA(T-)

2.0 - - V

CLA(T-)

Smart High-Side Power Switch

)

Four Channels: 4 x 25mΩ

IntelliSense

PCN 2004-018-A: BTS 5440G

Product Summary

Operating voltage V

bb(on)

4,5...28

V

Package

( Loaddump: 40 V )

Active channels one four parallel

On-state resistance R

Nominal load current I

L(nom

Current limitation Low I

ON

L(SCr

25 6.5 mΩ

6.2 13.9 A

10 A

P-DSO-28-19

High 40

General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and 

diagnostic feedback, monolithically integrated in Smart SIPMOS

technology.

• Providing embedded protective functions.

• Extern adjustable current limitation.

Application

• All types of resistive, inductive and capacitive loads

• µC compatible high-side power switch with diagnostic feedback for 12 V grounded loads

• Due to the adjustable current limitation best suitable for loads with high inrush currents, so as lamps

• Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

• Very low standby current

• CMOS compatible input

• Improved electromagnetic compatibility (EMC)

• Stable behaviour at low battery voltage

Protection Functions

• Reverse battery protection with external resistor

• Short circuit protection

• Overload protection

• Current limitation

• Thermal Shutdown

• Overvoltage protection with external resistor

• Loss of GND and loss of V

• Electrostatic discharge Protection (ESD)

protection

bb

Block Diagram

IN1

IS1 IS2

IN2

CLA 1/2

IN3

IS3 IS4

IN4

CLA 3/4

Vbb

Logic Channel 1 Channel 2

Logic Channel 3 Channel 4

GND

Diagnostic Functions: IntelliSense

• Proportional load current sense ( with defined fault signal during thermal shutdown and overload )

• Additional open load detection in OFF - state

• Suppressed thermal toggling of fault signal

Load 1

Load 2

Load 3

Load 4

Page 1

2004-Mar-08

Functional diagram

PCN 2004-018-A: BTS 5440G

IN1

IS1

CLA 1/2

IN2

IS2

GND1/2

IN3

IS3

CLA 3/4

overvoltage

protection

internal voltage

supply

ESD

gate

control

+

charge

logic

pump

temperature

sensor

openload

dedection

control and protection circuit

of

channel 2

control and protection circuit

of

channel 3

current limit

clamp for

inductive load

Current

sense

VBB

OUT1

LOAD

OUT2

OUT3

IN4

IS4

GND3/4

control and protection circuit

of

channel 4

Page 2

OUT4

2004-Mar-08

Pin definition and function

PCN 2004-018-A: BTS 5440G

1,14,

15,28

3

6

9

12

25,26,27

22,23,24

19,20,21

16,17,18

4

5

10

Symbol

V

bb

IN1

IN2

IN3

IN4

OUT1

OUT2

OUT3

OUT4

IS1

IS2

IS3

Function

Positive power supply voltage. Design the wiring for the

simultaneous max. short circuit currents from channel 1 to 4

and also for low thermal resistance

Input 1,2,3,4 activates channel 1,2,3,4 in case of logic high signal

Output 1,2,3,4 protected high-side power output of channel 1,2,3,4.

Design the wiring for the max. short circuit current

Diagnostic feedback 1...4 of channel 1 to 4

On state: advanced current sense with defined signal in case

of overload or short circuit

11

7

13

2

8

IS4

CLA 1/2

CLA 3/4

GND 1/2

GND 3/4

Off state: High on failure

Current limit adjust; the current limit for channels 1/2 and 3/4 can

be chosen as high ( potential < 2,6V ) or low ( potential > 3,6V ).

Ground of chip 1 ( channel 1,2 )

Ground of chip 2 ( channel 3,4 )

Pin configuration

(top view)

V

1

bb

GND ½ 2 27 OUT1

IN1 3 26 OUT1 IS1 4 25 OU T1 IS2 5 24 O U T2 IN2 6 23 O U T 2

CLA ½ 7 22 OUT2

GND ¾ 8 21 OUT3

IN3 9 20 O U T 3 IS3 1 0 19 O U T 3 IS4 1 1 18 O U T 4 IN4 12 17 O U T 4

CLA ¾ 13 16 OUT4

V

bb

•

14 15

28 V

bb

V

bb

Page 3

2004-Mar-08

PCN 2004-018-A: BTS 5440G

)

g

A

Maximum Ratings at Tj=25°C, unless otherwise specified

Parameter Symbol Value Unit

Supply voltage (overvoltage protection see page 6) V

Supply voltage for full short circuit protection;Tj = -40...150°C V

Maximum voltage across DMOS V

Load dump protection3) V

LoadDump

In = low or high; td = 400 ms; R

R

= 2.25 Ω

L

R

= 6.8 Ω

L

4)

= VA + VS; VA = 13,5 V

4)

= 2 Ω

I

V

Load current (Short - circuit current, see page 7) I

Operating temperature range T Storage temperature range T

bb

bb(SC

ON

Loaddump

L

j st

1)

28

2)

28

52

40

53

5)

I

L(lim

-40...+150

-55...+150

Dynamical temperature rise at switching dT 60 K

V

A

°C

Power dissipation6) (DC), all channels active TA = 85 °C

Maximal switchable inductance, single pulse

Vbb=12V, T

IL = 6 A, EAS = 0.319 J, R

IL = 12 A, E

=150°C; (see diagrams on page 12)

jstart

= 0 Ω, one channel:

L

= 0.679 J, R

S

= 0 Ω, two parallel channels:

L

Electrostatic discharge voltage IN:

(Human Body Model) IS:

according to ANSI EOS/ESD - S5.1 - 1993 , ESD STM5.1 - 1998 OUT:

Continuous input voltage V

Voltage at current limit adjustment pin V

Current through current limit adjustment pin I

Current through input pin (DC) I

Current through sense pin (DC) (see page 11) I

1

18...28 V for 100 hours

2

only single pulse, R

line, contact and generator impedances. 3

Supply voltage higher than V

4

RI = internal resistance of the load dump test pulse generator.

5

Current limit is a protection function. Operation in current limitation is considered as "outside" normal operating

range. Protection functions are not designed for continuous repetitive operation.

6

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for Vbb

connection. PCB is vertical without blown air.

= 200 mΩ ; L = 8 µH ; R and L are describing the complete circuit impedance including

L

bb(AZ)

require an external current limit for the GND (150Ω resistor) and sense pin.

P

Z

V

CL

IN

IS

tot

L(s)

ESD

IN

CL

1,6

9.8

5.2

1,0

2,0

4,0

-10...16 V

-10...16

±5.0

-5...+10

W

mH

kV

mA

Page 4

2004-Mar-08

PCN 2004-018-A: BTS 5440G

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified min. typ. max.

Thermal Resistance

junction - soldering point1) each channel:

junction - ambient2) one channel active:

all channels active:

Load Switching Capabilities and Characteristics

On-state resistance (Vbb to OUT), (see page 13)

T

= 25 °C, IL = 5 A, each channel:

j

T

= 150 °C, each channel:

j

T

= 25 °C, two parallel channels:

j

T

= 25 °C, four parallel channels:

j

Nominal load current2)

Ta = 85°C, T

≤ 150°C , one channel active:

j

two channels active, per channel:

four channels active, per channel:

Output voltage drop limitation at small load currents

IL = 0.5 A

R

thJS

R

thJA

R

ON

I

L(nom)

V

ON(NL)

- - 25 K/W

-

40

- K/W

32

-

5.7

4.0

3.1

21

42

11

5.5

6.2

4.4

3.4

25

50

13

6.5

-

mΩ

A

- 40 - mV

Output current while GND disconnected

( see diagram page 12 )

3)

I

L(GNDhigh)

- - 2 mA

VIN = 0 V

1

Soldering point is measured at Vbb-pin

2

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for Vbb

connection. PCB is vertical without blown air. 3

not subject to production test, specified by design

Page 5

2004-Mar-08