INFINEON BTS 5440 G User Manual

现货库存、技术资料、百科信息、热点资讯，精彩尽在鼎好!

Addendum for PCN 2004-018-A BTS 5440 G

Addendum for PCN-Datasheet 2004-018-A: BTS 5440 G

This Addendum and PCN-Datasheet refers to the PCN 2004-018-A:

“Minor datasheet adaption for BTS 5240 L, BTS 5240 G, BTS 5440 G “.

The PCN-datasheet attached will be valid starting from August 2004.

There are the following changes in the datasheet (on page 7):

Old: Symbol min typ max Unit Current limit adjustment threshold voltage V

- - 3.6

New: Symbol min typ max Unit Current limit adjustment threshold voltage V

- - 4.0

2.6 - - V

CLA(T-)

2.0 - - V

CLA(T-)

Smart High-Side Power Switch

)

Four Channels: 4 x 25mΩ

IntelliSense

PCN 2004-018-A: BTS 5440G

Product Summary

Operating voltage V

bb(on)

4,5...28

V

Package

( Loaddump: 40 V )

Active channels one four parallel

On-state resistance R

Nominal load current I

L(nom

Current limitation Low I

ON

L(SCr

25 6.5 mΩ

6.2 13.9 A

10 A

P-DSO-28-19

High 40

General Description

• N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and 

diagnostic feedback, monolithically integrated in Smart SIPMOS

technology.

• Providing embedded protective functions.

• Extern adjustable current limitation.

Application

• All types of resistive, inductive and capacitive loads

• µC compatible high-side power switch with diagnostic feedback for 12 V grounded loads

• Due to the adjustable current limitation best suitable for loads with high inrush currents, so as lamps

• Replaces electromechanical relays, fuses and discrete circuits

Basic Functions

• Very low standby current

• CMOS compatible input

• Improved electromagnetic compatibility (EMC)

• Stable behaviour at low battery voltage

Protection Functions

• Reverse battery protection with external resistor

• Short circuit protection

• Overload protection

• Current limitation

• Thermal Shutdown

• Overvoltage protection with external resistor

• Loss of GND and loss of V

• Electrostatic discharge Protection (ESD)

protection

bb

Block Diagram

IN1

IS1 IS2

IN2

CLA 1/2

IN3

IS3 IS4

IN4

CLA 3/4

Vbb

Logic Channel 1 Channel 2

Logic Channel 3 Channel 4

GND

Diagnostic Functions: IntelliSense

• Proportional load current sense ( with defined fault signal during thermal shutdown and overload )

• Additional open load detection in OFF - state

• Suppressed thermal toggling of fault signal

Load 1

Load 2

Load 3

Load 4

Page 1

2004-Mar-08

Functional diagram

PCN 2004-018-A: BTS 5440G

IN1

IS1

CLA 1/2

IN2

IS2

GND1/2

IN3

IS3

CLA 3/4

overvoltage

protection

internal voltage

supply

ESD

gate

control

+

charge

logic

pump

temperature

sensor

openload

dedection

control and protection circuit

of

channel 2

control and protection circuit

of

channel 3

current limit

clamp for

inductive load

Current

sense

VBB

OUT1

LOAD

OUT2

OUT3

IN4

IS4

GND3/4

control and protection circuit

of

channel 4

Page 2

OUT4

2004-Mar-08

Pin definition and function

PCN 2004-018-A: BTS 5440G

1,14,

15,28

3

6

9

12

25,26,27

22,23,24

19,20,21

16,17,18

4

5

10

Symbol

V

bb

IN1

IN2

IN3

IN4

OUT1

OUT2

OUT3

OUT4

IS1

IS2

IS3

Function

Positive power supply voltage. Design the wiring for the

simultaneous max. short circuit currents from channel 1 to 4

and also for low thermal resistance

Input 1,2,3,4 activates channel 1,2,3,4 in case of logic high signal

Output 1,2,3,4 protected high-side power output of channel 1,2,3,4.

Design the wiring for the max. short circuit current

Diagnostic feedback 1...4 of channel 1 to 4

On state: advanced current sense with defined signal in case

of overload or short circuit

11

7

13

2

8

IS4

CLA 1/2

CLA 3/4

GND 1/2

GND 3/4

Off state: High on failure

Current limit adjust; the current limit for channels 1/2 and 3/4 can

be chosen as high ( potential < 2,6V ) or low ( potential > 3,6V ).

Ground of chip 1 ( channel 1,2 )

Ground of chip 2 ( channel 3,4 )

Pin configuration

(top view)

V

1

bb

GND ½ 2 27 OUT1

IN1 3 26 OUT1 IS1 4 25 OU T1 IS2 5 24 O U T2 IN2 6 23 O U T 2

CLA ½ 7 22 OUT2

GND ¾ 8 21 OUT3

IN3 9 20 O U T 3 IS3 1 0 19 O U T 3 IS4 1 1 18 O U T 4 IN4 12 17 O U T 4

CLA ¾ 13 16 OUT4

V

bb

•

14 15

28 V

bb

V

bb

Page 3

2004-Mar-08

PCN 2004-018-A: BTS 5440G

)

g

A

Maximum Ratings at Tj=25°C, unless otherwise specified

Parameter Symbol Value Unit

Supply voltage (overvoltage protection see page 6) V

Supply voltage for full short circuit protection;Tj = -40...150°C V

Maximum voltage across DMOS V

Load dump protection3) V

LoadDump

In = low or high; td = 400 ms; R

R

= 2.25 Ω

L

R

= 6.8 Ω

L

4)

= VA + VS; VA = 13,5 V

4)

= 2 Ω

I

V

Load current (Short - circuit current, see page 7) I

Operating temperature range T Storage temperature range T

bb

bb(SC

ON

Loaddump

L

j st

1)

28

2)

28

52

40

53

5)

I

L(lim

-40...+150

-55...+150

Dynamical temperature rise at switching dT 60 K

V

A

°C

Power dissipation6) (DC), all channels active TA = 85 °C

Maximal switchable inductance, single pulse

Vbb=12V, T

IL = 6 A, EAS = 0.319 J, R

IL = 12 A, E

=150°C; (see diagrams on page 12)

jstart

= 0 Ω, one channel:

L

= 0.679 J, R

S

= 0 Ω, two parallel channels:

L

Electrostatic discharge voltage IN:

(Human Body Model) IS:

according to ANSI EOS/ESD - S5.1 - 1993 , ESD STM5.1 - 1998 OUT:

Continuous input voltage V

Voltage at current limit adjustment pin V

Current through current limit adjustment pin I

Current through input pin (DC) I

Current through sense pin (DC) (see page 11) I

1

18...28 V for 100 hours

2

only single pulse, R

line, contact and generator impedances. 3

Supply voltage higher than V

4

RI = internal resistance of the load dump test pulse generator.

5

Current limit is a protection function. Operation in current limitation is considered as "outside" normal operating

range. Protection functions are not designed for continuous repetitive operation.

6

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for Vbb

connection. PCB is vertical without blown air.

= 200 mΩ ; L = 8 µH ; R and L are describing the complete circuit impedance including

L

bb(AZ)

require an external current limit for the GND (150Ω resistor) and sense pin.

P

Z

V

CL

IN

IS

tot

L(s)

ESD

IN

CL

1,6

9.8

5.2

1,0

2,0

4,0

-10...16 V

-10...16

±5.0

-5...+10

W

mH

kV

mA

Page 4

2004-Mar-08

PCN 2004-018-A: BTS 5440G

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified min. typ. max.

Thermal Resistance

junction - soldering point1) each channel:

junction - ambient2) one channel active:

all channels active:

Load Switching Capabilities and Characteristics

On-state resistance (Vbb to OUT), (see page 13)

T

= 25 °C, IL = 5 A, each channel:

j

T

= 150 °C, each channel:

j

T

= 25 °C, two parallel channels:

j

T

= 25 °C, four parallel channels:

j

Nominal load current2)

Ta = 85°C, T

≤ 150°C , one channel active:

j

two channels active, per channel:

four channels active, per channel:

Output voltage drop limitation at small load currents

IL = 0.5 A

R

thJS

R

thJA

R

ON

I

L(nom)

V

ON(NL)

- - 25 K/W

-

40

- K/W

32

-

5.7

4.0

3.1

21

42

11

5.5

6.2

4.4

3.4

25

50

13

6.5

-

mΩ

A

- 40 - mV

Output current while GND disconnected

( see diagram page 12 )

3)

I

L(GNDhigh)

- - 2 mA

VIN = 0 V

1

Soldering point is measured at Vbb-pin

2

Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70µm thick) copper area for Vbb

connection. PCB is vertical without blown air. 3

not subject to production test, specified by design

Page 5

2004-Mar-08

PCN 2004-018-A: BTS 5440G

)

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified min. typ. max.

Load Switching Capabilities and Characteristics

Turn-on time1) to 90% V

R

= 12 Ω, V

L

= 12 V

bb

Turn-off time1) to 10% V

R

= 12 Ω, V

L

= 12 V

bb

Slew rate on1) 10 to 30% V

R

= 12 Ω, V

L

= 12 V

bb

Slew rate off1) 70 to 40% V

R

= 12 Ω, V

L

= 12 V

bb

Operating Parameters

Operating voltage

2)

Overvoltage protection3)

Ibb = 40 mA

Standby current

(see diagram on page 13)

4)

OUT

,

t

on

t

off

dV/dt

-dV/dt

V

bb(on

V

bb(AZ)

I

bb(off)

on

off

- 90 200

- 100 220

0.1 0.25 0.45

0.09 0.25 0.4

4.5 - 28 V

41 47 52

µs

V/µs

µA

T

= -40...+25 °C, VIN = 0 V

j

T

= 150 °C

j

1

See timing diagram on page 14.

2

18V...28V for 100 hours

3

Supply voltages higher than V

See also V

4

Measured with load; for the whole device; all channels off.

Out(CL)

in table of protection functions and circuit diagram on page 11.

bb(AZ)

require an external current limit for the status pin and GND pin (e.g. 150Ω).

-

10

15

-

40

Page 6

2004-Mar-08

PCN 2004-018-A: BTS 5440G

j

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified min. typ. max.

Operating Parameters

Off-State output current (included in I

bb(off)

)

VIN = 0 V, each channel

Operating current1)

VIN = 5 V, per active channel

Protection Functions

2)

Current limit, ( see timing diagrams, page 15 )

Low level; if potential at CLA = high

High level; if potential at CLA = low

Current limit adjustment threshold voltage V

Repetitive short circuit current limit

Tj = T

(see timing diagrams on page 15)

jt

High level one active channel:

two active channels3):

Low level one active channel:

I

L(off)

I

GND

I

L(LIM)

CLA(T-)

V

CLA(T+)

I

L(SCr)

- 1.5 8 µA

- 1.6 4 mA

7

40

2.0

-

11

50

40

7

14

60

-

4.0

-

A

V

A

two active channels3):

Initial short circuit shutdown time low level:

T

Output clamp (inductive load switch off)

= 25°C ; Vbb = 13,5 V high level:

j,start

4)

t

off(SC)

V

Out(CL)

-

7

3.5

0.75

- -15 - V

IL = 40 mA

Thermal overload trip temperature T

Thermal hysteresis ∆T

1

Add IIS, if IIS > 0

2

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 3

At the beginning of the short circuit the double current is possible for a short time. 4

If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest V

Out(CL)

.

Page 7

t

150 170 - °C

- 10 - K

2004-Mar-08

-

ms

-

PCN 2004-018-A: BTS 5440G

)

Electrical Characteristics

Parameter and Conditions, each of the four channels Symbol Values Unit

at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified min. typ. max.

Diagnostic Characteristics

Open load detection voltage V

Internal output pull down1)

V

OUT

= 13.5 V

Current sense ratio, static on-condition

k

ILIS

= IL:I

IS

IL = 0.5 A

IL = 3 A

IL = 6 A

Sense signal in case of fault-conditions

2)

in off-state

Current saturation of sense fault signal I

Sense signal delay after thermal shutdown

3)

Current sense output voltage limitation

IIS = 0 , IL = 5 A

Current sense leakage/offset current

VIN = 5 V, IL = 0 , VIS = 0

OUT(OL

R

OUT(PD)

k

ILIS

V

fault

t

delay(fault

V

IS(lim)

I

IS(LH)

2 3.2 4.4 V

11 23 35

4640

4900

5800

5400

5350

6960

5900

5800

5 6.2 7.5 V

4 - - mA

- - 1.2 ms

5.4 6.5 7.3 V

- - 5 µA

kΩ

Current sense settling time to I

static ±10%

IS

t

son(IS)

after positive input slope4) , IL = 0 to 5A

Current sense settling time to I

static ±10%

IS

t

slc(IS)

after change of load current4), IL = 2.5 to 5A

1

In case of floating output, the status doesn´t show open load. 2

Fault condition means output voltage exceeds open load detection voltage V

3

In the case of thermal shutdown the V

than the restart of the switch ( see diagram on page 16 ). 4

not subject to production test, specified by design

signal remains for t

fault

Page 8

delay(fault)

- - 400

- - 300

OUT(OL)

longer

µs

2004-Mar-08

PCN 2004-018-A: BTS 5440G

)

Electrical Characteristics

Parameter Symbol Values Unit

at Tj = -40...+150 °C, Vbb = 9...16 V, unless otherwise specified min. typ. max.

Diagnostic Characteristics

Status invalid after negative input slope t

Status invalid after positive input slope

d(SToff

t

d(STOL)

with open load

Input Feedback

1)

Input resistance (see circuit page 11) R

Input turn-on threshold voltage V

Input turn-off threshold voltage V

Input threshold hysteresis ∆V

Off state input current

I

IN(off)

VIN = 0.4 V

On state input current

I

IN(on)

VIN = 5 V

Reverse Battery

2)

Reverse battery voltage -V

Drain-source diode voltage (V

T

= 150 °C, Ibb = -10 mA

j

OUT

> Vbb)

-V

I

IN(T+

IN(T-

IN(T

bb

ON

- - 1.2 ms

- - 20

2.0 3.5 5.5

- - 2.4 V

1.0 - -

- 0.5 -

3 - 40 µA

20 50 90

- - 27 V

- 330 - mV

µs

kΩ

1

If ground resistors R

2

Requires a 150Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode

has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and status currents have to be limited. (see max. ratings page 4 )

are used, add the voltage drop across these resistor.

GND

Page 9

2004-Mar-08

Truth Table - for each of the four channels

PCN 2004-018-A: BTS 5440G

Normal

Operation

Input

level

L

H

Output

level

L

V

bb

Diagnostic

output

1)

Z

IIS = IL / kilis

Current

Limitation

2)

H V

Short circuit

to GND

H

Overtemperature L

H

Short circuit

to V

bb

H

Open load L

H

L

>V

bb

L

V

bb

V

bb

out(OL)

V

bb

L = " Low" Level Z = high impedance, potential depends on external circuit

H = "High" Level V

= 5V typ., constant voltage independent of external sense resistor.

fault

V

fault

1)

Z

V

fault

1)

Z

V

fault

V

fault

< IIS = IL / kilis

V

fault

1)

Z

3)

Parallel switching of channels is possible by connecting the inputs and outputs parallel. The current sense ouputs have to be connected with a single sense resistor.

Terms

I

bb

V

bb

V

IN1

I

IN1

3

I

IN2

6

I

4

IS1

V

I

IN2

V

5

IS2

7

V

IS2

IS1

V

CLA1/2

IN1

IN2

IS1

IS2

CLA1/2

Leadframe

V

bb

PROFET

GND1/2

2

I GND

OUT1

OUT2

25 26

27

22 23 24

V

ON2

OUT2

V

ON1

V

bb

I

L1

I

L2

V

OUT1

V

IN3

I

IN3

9

I

IN4

12

I

10

IS3

V

I

IN4

11

IS4

13

V

IS4

IS3

V

CLA3/4

IN3

IN4

IS3

IS4

CLA3/4

V

bb

PROFET

GND3/4

8

Leadframe

I

GND

OUT3

OUT4

19 20

21

16 17 18

Leadframe (Vbb) is connected to pin 1, 14, 15, 28

1

L-potential by using a sense resistor

2

Current limitation is only possible while the device is switched on.

3

Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.

V

ON3

V

ON4

I

L3

I

L4

V

OUT3

V

OUT4

Page 10

2004-Mar-08

PCN 2004-018-A: BTS 5440G

g

f

S

Input circuit ( ESD protection ), IN1...IN4

R

IN

I

ESD-ZD

I

GND

I

The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

Sense-Status output, IS1...IS4

ON-State: Normal operation: IS = IL /

VIS = IS * RIS; R

R

I

IS

V

f

ESD-ZD

= 1kΩ nominal

IS

Sense output lo

ic

GND

> 500Ω

V

IS

R

IS

kILIS

Inductive and overvoltage output clamp, OUT1...OUT4

+V

bb

V

Z

OUT

V

OUT

V

clamped to V

Out

GND

Power GND

Out(CL)

= -15 V typ.

Overvolt. Protection of logic part

OUT1...OUT4

+ V

bb

V

R

I

IN

IS

R

IS

Logic

V

Z1

Z2

PROFET

GND

R

GND

Signal GND

ESD zener diode: V

= 6,1 V typ., max. 14 mA ;

ESD

ON-State: Fault condition so as thermal shut down or current limitation

Sense output

V

logic

fault

V

fault

V

R

V

fault

ESD-ZD

= 6 V typ ; V

GND

fault

< V

IS

under all conditions

ESD

OFF-State diagnostic condition: Open Load, if V

Int. 5V

GND

ESD-Zener diode: 6,1V typ., max. 5mA; R

> 3 V typ.; IN low

OUT

IS - ST

ESD-

ZD

R

I

ST(ON)

< 375Ω

at 1,6mA.. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended.

VZ1 = 6,1V typ., VZ2 = 47V typ., R

R

= 1kΩ , RI = 3,5kΩ typ.

IS

GND

= 150Ω ,

Page 11

2004-Mar-08

PCN 2004-018-A: BTS 5440G

Reverse battery protection

OUT1...OUT4

- V

bb

V

GND

-I

Z2

OUT

GND

Load GND

R

Load

= 150Ω

GND

R

I

IN

IS

V

PROFET

R

IS

Logic

Z1

R

Signal GND

VZ1 = 6,1V typ., VZ2 = 47V typ., R

R

= 1kΩ, RI = 3,5kΩ typ.

IS In case of reverse battery the load current has to be limited by the load. Protection functions are not active.

Open load detection, OUT1...OUT4

Off-state diagnostic condition: Open load, if V

OFF

Logic

unit

Open load

detection

> 3 V typ.; IN = low

OUT

Signal GND

V

bb

R

EXT

V

OUT

Vbb disconnect with energized inductive load

V

high

V

VbbV

bb

V

bb

IN

OUT

GND

OUT

PROFET

IS

For inductive load currents up to the limits defined by ZL each switch is protected against loss of Vbb.

(max. ratings and diagram on page 12) Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection.

Inductive load switch-off energy dissipation

E

bb

E

AS

E

V

bb

IN

GND

OUT

Z

L

{

=

PROFET

IS

Load

L

E

L

E

R

L

GND disconnect

IN

PROFET

IS

GND

V

bb

IN

IS

Any kind of load.

Energy stored in load inductance: EL = ½ * L * I

2

L

While demagnetizing load inductance, the enérgy dissipated in PROFET is E

= Ebb + EL - E

V

bb

OUT

V

GND

AS

with an approximate solution for R

L

IL

E

AS

*

=+ +

2

*( | )*ln(

L

R

*

Page 12

= V

R

VV

bb OUT CL

ON(CL)

()|

* iL(t) dt,

> 0Ω:

L

LL

IR

1

*

OUT CL

V

||

2004-Mar-08

()

)

PCN 2004-018-A: BTS 5440G

Maximum allowable load inductance

for a single switch off (one channel)

L =f(IL); T

1000

100

10

[mH]

L(s)

Z

1

0,1

= 150°C, Vbb = 12V, R

jstart

0 5 10 15 20

I

[A]

L

= 0Ω

Typ. standby current

I

bb(off)

= f(Tj) ; V

16

14

12

10

[µA]

8

bb(off)

I

6

4

2

0

-40 -20 0 20 40 60 80 100 120 140 160

= 16 V ; V

bb

T

[°C]

j

IN1...4

= low

Typ. on-state resistance

R

= f(Vbb,Tj); IL = 5 A ; V

ON

30

28

26

24

22

[mOhm]

20

on

R

18

16

14

12

0 5 10 15 20 25 30 35

[V]

V

bb

= high

in

Page 13

2004-Mar-08

PCN 2004-018-A: BTS 5440G

IN

Timing diagrams

All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4.

Figure 1a: Switching a resistive load, change of load current in on-condition

V

OUT

t

on

I

L

IS,V

S

tt

Load 1

t

son(IS)

Load 2

The sense signal is not valid during settling time after turn on or change of load current. tslc(IS) = 300 µs typ.

t

off

slc(IS)slc(IS)

t

Figure 1c: Behaviour of sense output: Sense current (IS) and sense voltage (VS)

as function of load current dependent on the sense resistor. Shown is VS and IS for three different

sense resistors. Curve 1 refers to a low resistor, curve 2 to a medium-sized resistor and curve 3 to a big resistor. Note, that the sense resistor may not falls

short of a minimum value of 500Ω.

V

S

V

ESD

V

fault

I

S

3

2

1

I

L

1

Figure 1b: Vbb turn on

V

bb

I

L

IS,V

S

proper turn on under all conditions

IS = IL / k

ILIS

VIS = IS * RIS; R

R

= 1kΩ nominal

IS

> 500Ω

IS

I

L(lim)

2

3

I

L

Page 14

2004-Mar-08

PCN 2004-018-A: BTS 5440G

Figure 2a: Switching a lamp Figure 3a: Short circuit:

IN

Shut down by overtemperature, reset by cooling

IS

V

OUT

I

L

t

Figure 2b: Switching a lamp with current limit: The behaviour of I

and VS is shown for a

S

resistor, which refers to curve 1 in figure 1c

IN

V

OUT

I

L

IN

I

L

V

S

I

L(lim)

I

L(SCr)

V

fault

t

delay

fault

Heating up may require several milliseconds, depending on external conditions.

I

= 50A typ. increases with

L(lim)

decreasing temperature.

Figure 3a: Turn on into short circuit, shut down by overtemperature, restart by cooling ( channel 1 and 2 switched parallel )

V

I

S

fault

t

Page 15

IN1/2

2 x I

VS1, V

L(lim )

IL1 + I 2 x I

L(lim )

t

off(S C )

S2

L2

V

fault

I

L(SCr)

t

delay

fau lt

2004-Mar-08

PCN 2004-018-A: BTS 5440G

Figure 4a: Overtemperature

Reset if T

The behaviour of

which refers to curve 1 in figure 1c.

IN

I

L

I

S

T

J

T

<

j

jt

t

delay(fault)

I

S

and

V

is shown for a resistor,

S

t

Figure 5a:Open-load: detection in OFF-state,

turn on/off to open load. Open load of channel 1; other channels normal opertaion.

Figure 6a: Current sense ratio

7000

6000

5000

4000

k

ILIS

012345678910111213

1)

[A]

I

L

IN1

V

OUT1

I

L1

IS

V

fault

t

= 250µs max.;

off

t

off

t

ST delay

t

ST delay

= 500µs max.

t

off

t

ST delay

with pull up resistor at output

1

This range for the current sense ratio refers to all devices. The accuracy of the

k

be raised by calibrating the value of

for every single device.

ILIS

k

ILIS

can

Page 16

2004-Mar-08

Package and ordering code

all dimensions in mm

P-DSO-28-19

Sales Code BTS 5440G

Ordering Code Q67060-S6136

PCN 2004-018-A: BTS 5440G

Attention please!

The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein.

Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Page 17

2004-Mar-08

INFINEON BTS 5440 G User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual