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'-
>
0
INDUSTRIAL
64K
DYNAMIC RANDOM
MICRO
MODEL
ACCESS
SYSTEMS.
464
MEMORY BOARD
INC.
***********************************.****************************************.*.
2MHZ OR 4MHZ OPERATION
•
PARITY
•
PHANTOM LINE
•
BANK
•
V
FRONT PANEL COMPATIBLE
•
CIRCUITRY
SELECT
(pIN
LOGIC
67)
•
•
•
•
8080
HIDDEN
NO
LOW
.6A
OR
WAIT
POWER
Z80
OPERATION
REFRESH
STATES
CONSUMPTION
+8
VOLTS
(Ml
CYCLE)
'---"
"-'
"-
•
•
MOOELS
"
GENERAL
The
circuits.
reliable
The
configurations,
Two
byte
disabled
Selection),
SELECTABLE PORT
AVAILABLE
PESCRIPTION
Model
464
modes
banks
464
The
operarions.
board
of
occupy
and
each
boards
the
operation
IN
Dynamic
are
may
memory is
contiguous
16K
ADDRESS
HK.
Ram
tested
be
ordered
are
provided,
byte
48K.
Memory
organized
address space.
bank
and
OR
Boardisfully
burned
as a
into
Normal Mode and Bank Mode.
may
64K
in
32K,
16K
be
at
70
48K,
byte
In
the
mapped
buffered
degrees
or
banks.
bank
into
.ZA
.001A
and
centigrade
64K
memory
mode
selected
+16
VOLTS
-16
-
uses 16K X 1
of
op~ation,
VOLTS
under
board.
In
the
quadrants
diagnostic
bit
dynamic memory
test
In
each
normal
the
of
mode,
board
memory (see Bank
to
of
the
is
initially
insure
these
16K
The
464
feature.
board
The
providesa"Phantom
user
may also
configure
Line"
the
input
board
for
to
systems
accept
with
ROM
the
front
INDUSTRIAL
D00464
panel
memories which
deposit
MICRO
REV A
signal,
8/12/80
utilize
M-WRITE.
\
SYSTEMS.
Page1of
this
INC.
6
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The
464
during
reads
checked
indicator
from
the
the
board
every memory
total
are
on
memory
featuresaparity
number
even,
the
board
board's
write
of
Parity
is
I/O
such
"1"
errors
lighted
Port.
circuit
that
bits
are checked.
to
to
the
total
during
indicate
provide
memory reads
the
increased
number
The
error,
of
"1"
parity
The
data
error
can
status
security.
bits
written
interrupt
is
of
set
the
are
if
or
parity
A
odd.
the
stop
parity
number
the
circuit
bit
is
written
During
CPU. A LED
of
may
memory
"1"
bits
be
read
· --
r-
J
CONFIGURING
PHANTOM LINE OACK JO)
The
phantom
Line.
rear
aD
Note:
affected
EN
THE
This
I/O
The
for
shunt.
the
for
1£
this
of
the
must
be
The
by
I/O
OACK JB)
"EN
I/O"
will
be necessary
SELECTION
selection
the
respective
Thus,
bottom
the
board
THE
signal
is
board.
connected
Phantom
the
Phantom
(Enable I/O)
of
the
to
four
shunts
to
respond
464
(pin
not
desirable,
when
for
OACK
boards
address
program
BOARD
67)
Line
Line. . ,
bank
JC)
(4-7)
to
shuntisetched
then
the
using
I/O
I/O
the
the
464
affects
shunt
bits
would
memory
JB
must
modeorparity
address
(AO-A7)
address
be
I/O
command.)
is
OFH
installed
so
etch
board
done
of
that
the
connecting
with
read
operations
be
installed
operations.
on
jack
the
I/O
the
top
("O's"),
board
the
Industrial
for
JC.
address.
four
shunts
(Note
will
be
two
pads
Micro
only.
the
The
Memory
board
jackislabeled
A
"1"
(0-3)
that
disabled
of
JD (PH) may
System
to
respond
is
programmed
would
the
liEN
by
CPU
write
be
1/0"
an
activated
boards,)
operations
to
0-7
(top
removed
shunt
Phantom
be
cut
on
the
are
not
I/O
commands.
to
bottom)
by remoyin¥ a
("l's")
must
be
and
on
-...J
.J
CPU
The
FRONT
(FP)
MEMORY
L
should
If
the
The
position
should
8080
position.
JA
SELECTION
be
464
not
OACK
shunt
removed.
PANEL OACK JH)
SPEED
shunt
be
board
controls
is
for
changed.
(JF)
should
is
to
be
OACK JA)
the
250NS
High
JF)
be
used
timing
RAMS.
speed
installed
with
of
for
systems
an
"IMSAI"
the
memory
This
shunt
operationisrequired
using
front
board.
is
factory
8080
CPU's.
panel,
the
TheHposition
installed
for
the
2-80
shunt
on
For
2-80
JH
must
is
for
the
H
processor.
systems
be
in
200NS
position
this
shunt
the
right-most
RAMS
and
and normally
, i
the
INDUSTRIAL
000464
REV A
MICRO
8/12/80
SYSTEMS.
Page2of
INC.
6
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PARITY
Jack
JG
INTERRUPT
allows
selection
OACK
of
eight
JG)
different
responses
toaparity
error.
The
selections
are:
SHUNT
VIl
VI2
VB
VI4
VI5
INT
NMI
RDY
When
power
error
memory
circuit.
The
A
NORMAL/BANK
The
In
to
using
is
initially
circuit
board.
state
of
"1"
bit
indicatesaparity
"bank"
this
mode
be
bank selected,
the
must
the
mode
the
POSITION
parity
applied
be
reset.
The
Power
parity
MODE
shunt
circuit
board
this
error
to
error
OACK
should
will
shunt
S100 BUS PIN NO.
05
07
09
73
12
72
circuit,
condition
The
On
Clear
may be sensed
has
JE)
be
installed
respond
should
the
all
parity
signal
occurred.
to
all addresses
be
installed.
06
08
user
the
parity
error
circuit
(POC
by
reading
onlyifthe
must
bits.
Pin
from
INTERRUPT
VECTORED INTERRUPT 1
VECTORED INTERRUPT 2
VECTORED INTERRUPT 3
VECTORED INTERRUPT 4
VECTORED INTERRUPT 5
PINT Line
Non-maskable
PRDY Line (Parity
initially
is
reset
99
bit
boardisto
After
on
"0"
0000
write
the
by any
S100
of
be
to
SELECTEp
INT
into
memoryisinitialized,
output
bus)
also
the
I/O
used
in
FFFF
hex.
(Z-80
Error
all memory
port
the
to
the
resets
on
Bank
For
only)
the
Stops
memories
CPU)
locations
I/O
port
the
parity
memory
Switched
the
parity
on
error
board.
mode.
that
after
the
are
NORMAL MODE
In
the
normal mode,
space
to
BANK
In
is
following
can
configuration,
the
the
not
0000
board's
MOPE
be
Bank
done
table.
used
thru
OUTPUT
Mode
on
ina16K,
shunt
FFFF
I/O
Port.
BIT
BIT
BIT 2
BIT
(Shunt
a
bit
Initially,
Bank 3isomitted.
JE removed,
hex.
0
1
3
In
A
"one"
DATA
JE installed)
basis.
the
32K or 48K
the
this
mode, each 16K
bit
disables
CONTROLLED
the
Codes
board
bank
When
are
is
orderedina 32K
four
the
board
provided
deselected
selection
16K memory banks occupy
bank
may be
associated
0000-3FFF
4000-7FFF
8000-BFFF
COOO-FFFF
responds ro a
by
scheme. When
bank.
MEMORY
for
a
the
Power
configuration,
controlled
Control
BANK
(omitted
(omitted
combmation
variety
On
the
of
configurations
Clear signal.
464
Banks 2
the
entire
individually
is
on a
bit
(HEX)
in
32K version)
in
32K & 48K
of
bits
and
board
is ordered
and3are
16
basis,
defined
The
bit
by an
version)
bank
464
address
output
thus:
selection
in
memory
in
a 48K
omitted.
the
INDUSTRIAL
000464
REV
MICRO
A
8/12/80
SYSTEMS,
Page3of
INC.
6
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BANK MODE TABLE
.-
OUTPUT
o
1
2
3
4
5
6
7
8
9
A
B
C
D
B
F
DATA
All
Banks
Banks
Banks
Banks 0 & 1
Banks
Bank
Bank0Occupies
Bank
Bank
Bank
Bank 3 Occupies
Bank
Bank 3 Occupies
Bank
Bank 3
STANDARD CONFIGURATION
IMS
supplies
the
464
board
configured
MEMORY MAPPING
Banks
Deselected
0 & 1
2 & 3
0,
2 & 3 Occupy
0 Occupies Addresses
1 Occupies Addresses
1 Occupies
2 Occupies Addresses
2 Occupies
3 Occupies
Occupy
Occupy
1, & 2 Occupy
Occupy
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
Occupies
as
follows:
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
8000-FFFF
8000-FFFF
OOOO-BFFF (48K)
0000-7FFF
0000-7FFF
COOO-FFFF (16K)
0000-3FFF
0000-3FFF
COOO-FFFF (16K)
0000-3FFF
0000-3FFF
COOO-FFFF (16K)
4000-7FFF
8000-BFFF
COOO-FFFF
(32K)
(32K)
(32K)
(32K)
(l6K)
(l6K)
(l6K)
(l6K)
(l6K)
(l6K)
(l6K)
J
Four
serve
Note:
JACK
JA
JB
JC
JD
JB
JF
JG
JH
spare
as a
464
DESCRIPTION
Memory
En
I/O
Phantom
Normal/Bank Mode
CPU
Parity
Front
shunts
convenient
boards
Speed
I/O
Selection
Selection
Interrupt
Panel
are
installed
place
shipped
Line
to
in
on
store
systems
the
spare
STANDARD
H
Open
All
Shunted(Etch)
Open
Open
All
Left
upper
will
pins
shunts.
normally
Position
Positions
Open
Position
of
be
CONFIGURATION
Shunted
Shunted
Shunted
Jack
G.
These
configured
to
pins
are
all
connected
the
system requirements.
by
etch
.,
and
INDUSTRIAL
000464
REV A
MICRO
8/12/80
SYSTEMS
Page4of
INC.
6