IMS 5000, 5000SX, 5000IS Series Manual

5QQQ

SERIES

MICROCOMPUTERS

..

"-

\

. -

.-----.

'----"

Table

of

Coptents

SECTION

1.0 General

SECTION

2.0

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

1 GENERAL

2

THEORY

SYSTEM
S-100
BOARD
POWER
CENTRAL

2.4.1

2.4.2

2.4.3

2.4.4
MEMORY

2.5.1

2.5.2
I/O

2.6.1

2.6.2

2.6.3

~ULTIPROCESSOR

2.7.1

2.7.2
FLOPPY

2.8.1

2.8.2

WINCHESTER

~10DEL

MOTHERBOARD.

- Model 451

- Model 645

- Model

- Model 881

- Model 465

- Model 961

COr\TROLLERS

- Model

- Model 631

- Model 480 4

- Model 740

- Model 861

- Model 431

- Model

DESCRIPTION

Description

OF

BLOCK

SH

UNTING • • •

SUPPLY

PROCESSOR

•••••••••••••••••

DISKCONTROLLER

662

VIDEO

••••••

OPERATION

DIAGRAM

••••••

Z80

Processor

Z80

Processor

971

Z80

Processor

8088

64K

Dynamic

256KDynamic

•••..••••••

444

I/O

Board

I/O

Controller

Line

BOARDS

I/O

Processor

Multiprocessor

Floppy

930

Floppy

DISK

DRIVE

DISPLAY

AND

••

BOARDS

Processor

••••••

Async.

BOARDS.
Disk
Disk

SUBSYSTEM

SPECIFICATIONS

Board
Board
Board

Board

RAM

RAM

Board

Comm.

•••••
Board

Unit

Controller

Controller

BOARD.

•••••

••

Board

Board

Controller

••

••

Board
Board

• •

••

••

•••••

•

• • • • . • . • 1

•••

• 5

· 7

• 9

11

13

13

16
20

24

27
27
31

33

33

49
58

61
61
66
71

71

75
79

83

./

, "

'-/'

SECTION

3.0

3.1

3.2

SECTION

4.0

4.1

4.2

APPENDIX
APPENDIX

3

DISKDRIVES

TEAC
Rodime-RO
Tape

FD-55

Cartridge

MEMORY,

"

Memory
Floppy
Winchester

A

B IMS

Drive

FLOPPY

Floppy

200

System

FLOPPY

Test

Program

Test

Drive

DISK

SYSTEM

AND

Series

•••

Test.

TAPE

Disk

Winchesters

••••••••

DRIVE

•

CARTRIDGE

Drive

••

AND WINCHESTER

SUBSYSTEM

INFORMATION.....

- 1 -

••

SPECS

UNIT

DRIVE

• •

TESTS

• 90
96

101

106
108

113

122

123

List

of

Figures

and

List

of

Tables

Figure
Figure

Figure

Figure

Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure

1-1
1-2

1-3
1-4

2-0
2-1

2-2
2-3
2-4
2-

5

2-

6
2-7
2-

8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
2-18
2-19
2-20
2-21
2-22
2-

23
2-24
2-25
2-26
2-27
2-28
2-29
2-30
2-31
2-32

5000

SX

5000

IS

Cartridge

5'A"

Floppy

5000

IS

5000

SX

Twelve

DC
Power
Power

Slot

Power

Supply

Supply
Model 451
Model
Model

645

971
Model 881
465

64KB
Model 961
Model

444
Computer
Computer
Computer
Model

631

444

Board
Computer
Computer

631

Parallel
Computer
Computer
Model
Model

631

480
Model 740
Model

431
930

861

5"

Floppy

Floppy
Model 821
Winchester
662

Board
662

Video

Microcomputer

Microcomputer

Tape

Stand

Disk

Drive

Block

Block

Diagram

Diagram

Motherboard

Supply

to

Specifications.

••.••...•..•

CPU

Board

2-

80

Processor
2-80
8088

Memory

256K

to
to
to

I/O

to
to

to
to

I/O

Processor

Processor

Board

CRT
Printer
Centronics

Controller

to

I/O
CRT
Serial

Port

NEC
Centronics

I/O

Controller
Controller

Board

Memory

Block

Connection

Panel

Connection

Printer

Pin

Printer

Multiprocessor

Multiprocessor

Disk

Disk

Drive

Winchester

Interface
Switch
Display

Settings

Board

System

System

Alone

Unit

•••••••••••

Motherboard

•••••••
Board
Board

Board.

••••
Board

Diagram

Connection

Printer

Board

Connection

Connection

Listing

••••••.•

Connection

Printer

Board.
Board.
Board
Board

Drive

Controller

Controller

Controller

Card

. •

••

III

Dimensions

III

Dimensions.

Connection.

.

•

(444

Board).

••••••

Connection.

••.•••
...•

(631

Board).

Connection.

••

•••••••••

Board

Board

••••••

...

Board

•••

••••

• •

••

• • 4

• 5

• • • • • 8

• 6

• 9

11
12

15
19
23
26
30
32

34

38

38
40
48
52
52
53
53
54
55
57
60

65
70
74
78
81
82
86
89

1

2

3

Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure
Figure

3-1
3-2
3- 3
3-4
3-5
3-6
3-7
3-8
3-9
3-10

TEAC

TEAC

TEAC

Rodime
Rodime
Stand

Switch

Tape

Record

Tape

5~"

Floppy

Floppy

Floppy

5'A"

Winchester

Alone

Settings

Cartridge

Winchester

Tape

Disk
Disk

-

System

Disk

Drive

Cartridge

Cartridge

Format-Cartridge

Cartridge

Data

Drive
Drive

Cable

Drive

•
Board
Cable

Disk

Drive

Cable

System

Tape

Controller

Tape

Orientation

- 2 -

Diagram

••••

Diagram

•••

Controller

Board

Controller

••

••••••••

•••

• •

••

••••

90
94
95

96
100
101

•

•••

103
103
104
105

\

SECTION

1

General

1.0 GENERAL

Description

IIvlS

configurations:

their
8000
describing

There
(Integrated
enclosures.

IMS
presents

5000
floppy

slots

the

International

flc::,py

system:. use

are

5000SX

SX

are available

Winchester

andSpecificatioDs

DESCRIPTION

the

disk

8"

each

system

two

different

System).

systems

a pleasing

has

provisions

drives

and

controller

manufactures

5000

drives.

floppy

and each

Each

are

table

modern

for

Winchesters

for

system

board

and the

All 5000

disk

drives.

board

IMS

5000

uses

top

appearance

three

with

expansion.

occupies one

microcomputer

8000.

the

systems

They are

systems

This

in

detail.

systems,

same

while

5

1/4"

up

to

retaining

drives,

two

If

of

systems

differentiated

use51/4"

manual examines

the

boards,

featuring

Winchester

the

system

these

floppy

5000SX

but

an

rugged

allowing

has a Winches

free

slots.

disk

the

and

they

enclosure

construction.

any

drives.

in

two

by

the

size

drives,

5000

systems,

the

5000IS

are

in

different

design

combination

Nine

unused

ter

basic

of

and

which

The

of

drive,

V

PHYSICAL CHARACTERISTICS

7.25

in.

18.42

em

~

~

~

Weight 69 Ibs. (31.30 kg)

Power Requirements 110V: 3 Amps; 60

5000SX

Microcomputer

17.50

44.45

Figure

III

III

III

III

III

III
III

III

III

in.

em

1-1

System

'"

III

I"'

III

• J

II

III

III

::

~

Hz

or 220V: 1.5 Amps; 50 Hz

and

Dimensions

5000

Series

IMS

International

Microcomputers/7.01.83jPage

1

5000IS

has

a

one

Winchester
available
occupies

systems

CRT

for

one

and a

future

slot.

15.5 in.

39.~

14.25In.1

36.20

1

In.

2.53

\

-

are

integrated

detachable

and

two

system

em

em

systems

keyboard.

half-width

expansion.

built

There
floppy
The

into

one

is

room

disk

Winchester

compact

drives.

PHYSICAL CHARACTERISTICS

rr---_~2~1~I~n.~---_

53.34

em

I'~~

~

II

"

~:

"

'"

'"

"

"

unit.

for

three

Five

controller

-I

Each

drives,

card

board,

system

usually

slots

if

•

are

used,

All

standard8bit

- 4 MHz

-

64K

-

Selectable

-

Floppy

- Real

- S

-100

-

Two

Weight
Power

requirements

5000

Z80A

Dynamic

Baud

Disk

Time

Calendar/Clock

Motherboard

year

IMS

Keyboard

IS

Microcomputer

5000

systems

Processor

RAM

with

Rate

Drive

Subsystem

Warranty

51bs(226kg)

110V 1 5 Amps, 60Hzor

Console

Figure

System

contain

the

Parity

up

to

19.2

KB

withBat

tery

1-2

following

with

Backup

40lbs

full

(1814kg)

220V

and

features:

modem

75

Amps50Hz

Dimensions

control

IMS

International

5000

Series

Microcomputers/7.01.83/page

2

The

differences

T1.','O

add-on

and

the

Cartridge

The

Multi-Processor

into

a

multi-processing

microprocessor,
interval
chronous

auto
bus.

each
common

The

timers,

communication

dial.

Up

to

user

the

data

cartridge

performance

files

The
each
is

and
tape
cartridge

mounted

programs

unit

inastand-alone

between

8- bi t

8

high

5000

slot

motherboard

resoution

detached

options

Tape

64

a 2

The

MPU

sixteen

performance

base.

tape

Winchester,

as

uses

varies

the8bit

IS

CRT

keyboard

are

available

System.

Unit

[MPUJ

Kbytes

Kbyte

boot

controller

interfaces

MPUs may

system

and

would

the

standard

depending

enclosure.

5000lS

and

12

for

all IMS

isaboard

environment.

of

dynamic

EPROM, and a dual

with

to

the

host

be

used

inasingle

of a

dedicated

serves
can also

be

as a

required

ANSI

on

the

be

inanormal

cartridge

format

the

8-

blt

5000

slot

motherboard

systems;

which

The

Rk'vI

full

modem

CPU

processor

start/stop

used

asamemory

selected.

5000SX

are

listed

SX

the

Multi-Processor

convertsasingle

with

board

parity,

contains

channel

support,

as

an

I/O

device

system.

while

backup

This

allowing

memory

subsystem

data

processing

(DC

300XL).

The

below.

Unit

user

system

a

Z-80A

four

programmable

synchronous/asyn-

auto

answer

on

the

$-100

board

access

for

provides

to

the

high

for

environment.

The

capacity

tape

cartridge

and

a

data

of

unit

Cartridge

Figure

Tape

1-3

Stand

5000

Alone

Series

Unit

Microcomputer

IMS

s/7.0

International

1.8

3/Page 3

Another
There
density
drives.

are

(48

option

two

tracks

on IMS

types

of

per inch) and

systems

5"

floppy

the

is

the

disk

quad

selection

drives

density

of

the

available

(96

tracks

floppy

from

per inch)

disk

IMS,

drive
the

size.

double

half-width

IMS

International

5000 Series

Microcomputer

Figure

5~..

Floppy

s/7.0 1.8 3/page 4

1-4

Disk

Drive

SBCTION

2

V

TheelY

2.0 SYSTEM BLOCK DIAGRAM

pi

Opc;ui

The

block

IMS

system

capability
In

addition,

adding

multi-processing

••

diagrams for

contains a Central Processing

and some

the

system can be expanded by adding a tape

the

type

of

capabilties

5000IS and

memory

with

the

Unit

storage

the

5000SX are

(CPU), Memory,

(floppy disks or Winchester disks).

MPU

board.

illustrated

Input

cartridge

below. Each

and

Output

unit

and/or

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Block

2-1

Diasram

--

(IJlllJrjl

J

In

an

the

IMS

system

circuit

block

board.

diagrams,

The

actual

each

block

busiscontained

connected

in

to

the

the

motherboard.

S-100

bus

represents

Numbers

Board

Number

451
645
971
881
465
961
444
631
480
740
861
431
930
820

662

The

last

444

I/O

and

abbreviations

Abbreviation

CPU-A

CPU-B

ZPUjIO

8088ZPU
64DRAM
256DRAM
SPIO
SPIO-B

4SIO
MPU
MPU

FDC

FDC

HOC

VDB

digit

boardisthe

in

are

the

board

sameasa 440

used

number

to

identify

2-80

Processor
2-80
2-80

Memory-64K
Memory-256K
Input/Output

2-80
2-80

Winchester

I/O

Processor

Processor

8088

Processor

Input/Output
Input/Output

Multiprocessor

Multiprocessor

5"

Floppy

5"

or

8"

Floppy

Video

Display

indicates

board

except

Disk

Disk

the

each

board.

Description

Board
Board
Board

Board

(for

(2

serial,

(2

serial,38-bit

(4

serial

Drive

Drive

Controller

Board

reV1S10n

for

(16

bit)

16

bit

systems)

3

8-bit

ports)
Board
Board

Controller

Controller

Board

(5000 IS only)

level.

a few

minor

parallel
parallel

Board

Board

For

changes.

ports)
ports)

example, a

2.1

Different
common are

MOTHERBOARD

The
power

the
card
ventilation
not
anywhere
5000IS

combinations

listed

motherboard

and

communication

S-100/IEEE696

can

go

into

between

another

is

you

motherboard

below.

the

want.

is

any

them.
cabling

of

boards

C£lL

451
645
645

the

board

signals.

standard.

slot.

The

considerations;

IMS

has8slots

may be

--971--

which

IMS

Generally,

only

5000

and

used

to

.lLQ. Memory

444
631

480

holds

The

protocol

motherboards

reason

systems

the

5000 SX

the

you

other

have

all

used

boards

might

than

two

has

the

make

465

465

465

465

other
for

are

are

putacard
that,
sizes

12.

upasystem.

boards.

the

signals

not

slot

dependent;

spread

you

of

out

in

may move a

motherboards;

The

mos t

It

provides

is

based

to

one place and

on

any

provide

card

the

5000

Series

IMS

Microcomputers/?O

International

1.8

3/page ?

I

'-....."I

IMS
5000

International

Series

Microcomputers!7.01.83jPage

Twelve

Figure

Slot

8

2-2

Motherboard

Pin

I

2
3
4

5
6
7 GRN, GND
8

9

GRN, GND
WHT,

BLK,
GRN,
NOT

RED,

YEL,

RED,

.sU-

+16

-16
GND
USED

+8

RESET
+8 V

TBI

to

Motherboard

,......

8

8

0

V

V

V

CD~~

@~@

~

rElCD

~

0
0

0
0
0
0

0

7 7

6

5

4·

3

2

I

6

5

4
3

2

1

GRN,

GRN,

GRN,

YEL
WHT,

BLK,
RED,
RED,

GND
GND
GND

RESET
+16 V

-16

V
+8 V
+8

V

2.2

DC

BOARD

Each

Central
address.
instructions
selection
comparesitto

Each

address.
shunt

address

The
bus.
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2.4.2

MOpEL

645 -

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PROCESSOR

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5000

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17

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IMS
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1.8

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19

2.4.3

MODEL

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280

PROCESSOR

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IMS

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5000

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Microcomputers/7.01.83/page

20

SPgCIFICATIONS

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The

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on

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board

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@ 50 rna

@ 50 rna

pins

on

the

top

are

of

the

of

the

662

if

you

rna

the

bottom

edge

of

connected

system.

machine,J

Video

haveamulti-

Display

In

the

to

a
3

"-

The

971
the

cable
are

machine.

signals

shown

Signal

Name

TransmitData

Recei.

ve0ata

Request

Clear

Data

Signal

Data

Data

Ring

to

Send

to

Send

Set

Ready

Ground

Terminal

Carrier

Indicator

below.

Ready

Detect

and

connections

This

connection

RS-232C

Circuit

BA

BB

CA

CB 9

CC

AB

CD

CF

CE 18

for

connecting

is made

971

or

Jl

data

via

J2

Pin

------

3

5 3

------

7

------

------

11

13

------

14

------

15

------

------

terminal

the

I/O

DTE

Pin

2

4

5

6

7

20

8

2

equipment

panel

the

on

Connector

to

back

the

of

Model

971

Serial

Port

to

RS-232C

5000

Series

Connector

Microcomputers/7.01.83;Page

Cable

IMS

International

21

I/O

DEVICE

ADDRESSES

FOR

THE

971 CPU BOARD

18H

1BH

20H-27H

20H

20H
21H
21H

22H

23H

24H
25H

26H
27H

28H-2FH

28H
28H
29H
29H

2AH
2BH
2CH

2DH

2EH
2FH

60H-7FH

60H
61H
62H
63H
64H
65H
66H
67H
68H
69H

6AH
6BH
6CH

6DH

6EH
6FH

70H

7lH

72H

73H
74H
75H
76H

7FH

bit

bit

2716/32/64

0

0

EPROM is

58167

58167
Port08250
Read Receive
Write
R/W
Write
Read
R/W
R;W
R/W
R;W
Nothing
Port18250
Read Receive
Write
R/W
Write
Read
R/W
R;W
R/W
R;W
Nothing
58167
R;W
R/W
R;W
R/W
R;W
R/W
R;W
R/W
R/W
R/W
R/W
RjW
RjW
RjW
RjW
RjW
R/O
W/O
W/O
W/O
R/O
W/O
W/O

Test

Divisor

Interrupt

Divisor

Interrupt
Line
Modem
Line
Modem

Divisor

Interrupt

Divisor

Interrupt
Line
Modem
Line
Modem

Counter-Thousandths

Counter-Hundredths

Counter

Counter-Minutes
Counter-Hours
Counter-Day
Counter-Day
Counter-Month
Latches-Thousandths
Latches-Hundredths
Latches-Seconds
Latches-Minutes
Latches-Hours
Latches-Day
Latches-Day
Latches-Month
Interrupt

Interrupt

Counter

Latch

Status

"GO"

Standby

Mode

CLK

CLK

Control

Status

Control

Status

Clock

EPROM

disabled

Interrupt

Interrupt

ACE

Internal

buffer/

Latch

Enable

Latch

Identification

Register

Control

Register

Status

ACE

Internal

buffer/

Latch

Enable

Latch

Identification

Register

Control

Register

Status

Internal

-

Seconds

Status

Control

Reset

Reset

Bit

Command

Interrupt

Enable

when

Mask

is

Write

least

Register

most

Register

Register

Write

least

Register

most

Register

Register

Register

of

the

of

the

of

the

of

the

Register

Register

bit

0=1.

enabled

Register

Holding

significant

(D

LAB=O)

significant

Register

Register

Holding

significant

(DLAB=O)

significant

Register

Select

of

Seconds

and

Tenths

Week
Month

of

Seconds

and

Tenths

Week
Month

when
Select

Register

byte

byte

Select

Register

byte

byte

of

of

bit

O=l.

(DLAB=O)

(DLAB=1)

(DLAB=O)

(DLAB=1)

Seconds

Seconds

'-./

J

IMS

International

5000

Series

Microcomputers/7.0

l.83/page

22

CONFIGURING

THE

971

State

Wait

This

read.
location

EPROM

This

EPROM,
EP

ROM.

Select

shunt

Normally,

provides

Type

shunt

the

theupper pairisconnec

OA)

indicates

for

Selection

is

used

lower

this

for

pair

the

one

(IC)

different

is

wait

is

number
etched

state.

etched.

types

ted.

so

of

states

there

If

that

are

of

EPROMs.

the 971

the

CPU

no

wait

If

hasa2732

waits

states.

the

afteramemory

The

other

971 has a 2716 (2K)

(4K)

ora2764

shunt

(8K)

Model

971

Figure
Z-80

5000

2-8

Processor

Series

Board

IMS

International

Microcomputers/7.01.83!page

23

2.4.4

MODEL

881 -

8088

PROCESSOR

BOARD

GENERAL

The

DESCRIPTION

881

Processor

International

microprocessor.
architecture.
megabyte

are

eight

The

for

tenths

TheIni

program

Thereis

processor's

The

Model 881

occupies

interfaces
lines

The

of

levds

881

board

of

tialProg

in

also an

the

of

the S

hardware

this

capabilityfor numerical

with

functions.

16-bit

The

It

has

memory.

of

vectored

has a

seconds

ram

EPROM is

option

processor

first

the

-10

0 Bus

on

Board

systems.

8088

20

It

real-time

to

Loader

slot

rest

System.

the

881

is

has

address

also

interrupts,

months.

executed

for

an

consists

in

the

of

Processor

the

an

has

clock

(IPL)

8087

the

8-bit

of a
Series

system

Central

The

main

data

lines,

priority

VIO

circuit

allowing

vectored

to

(the

EPROM is

when

the

Numeric

calculations.

single

5000

through

Board

Processing

part

bus

of

interface

it

VI7;

VIO has

58167

located

system

Data

is

Processor.

Printed

or

8000

the

consists

Unit

this

witha16-bit

to

directly

interrupt

chip),

on

powered

Circuit

Computer

address,

of

(CPU)

board

capability.

the

highest

which

the

881

up

This

Board

data,

the

of

is

the

address

has

board.

or

reset.

increases

that

Systems.

and

following

the

IMS

8088

internal

up

to

There

priority.

counters

The'

normally

control

fficun

1

the

It

SPECIF

8088
8087
8259
58167

•

2732

!CATIONS

Word

•

On-Board
Directly

•
Clock

•

•

Circuit

16-bit
Numeric

Priori

Real-Time

4K by 8

Size:

ROM:

Addressable

Frequency:

Board

Microprocessor

Data

Processor{Optional)

ty V

ect

ored

Clock

bit

EPROM

Address

Data

Memory:

Dimensions:

(CPU)

Interrupt

Circui

20
16

4

Kbytes

1Mbyte

4

MHz

5.25"x10"

tty

bits
bits

IMS

International

5000

Series

Microcomputers/7.01.83/page

24

I/O

DEVICE

ADDRESSES

FOR

THE

881

CPU

BOARD

06H-7FH
60H-7FH

60H

61H
62H
63H

64H
65H
66H
67H
68H

69H

6AH
6BH
6CH

6DH

6EH
6FH

70H
71H
72H
73H
74H
75H
76H

7FH

8259

Command

58167
R/W

R/W
R/W
R/W
R/W

R/W
R/W
R/W
R/W
R/W

R/W

R/W

R/W

R/W

R/W

R/W

RIO
WIO
WIO
WIO

RIO
WIO "GO"
WIO

Test

Clock

Counter-Thousandths
Counter-Hundredths

Counter-Seconds

Counter-Minutes
Counter-Hours
Counter-Day

Counter
Counter-Months
Latches-Thousandths
Latches-Hundredths
Latches-Seconds

Latches

Latches-Hours

Latches
Latches
Latches-Months
Interrupt

Interrupt

Counter

Latch

Status

Standby

Mode

Internal

- Day of

- M1nutes

- 0ayof

- 0

Status

Control

Reset

Reset

Bit

Command

Interrupt

and

ay

Status

Register

of

the
the

the

of

the

Register

Register

Select

of

and

week

month

of

and

week

month

Select

seconds

tenths

seconds

tenths

of

seconds

of secortds

,-,I

CONFIGURING

EPROM

If

location

the

Numeric

If

there

interrupt.

MWRT+

If

S-100

a

2716

lower

the

this

Type

JA

pair

Processor

board

is

no

Normally,

Enable

location

bus.

(2K)

should

THE

Selection

EPROM

be

should

Interrupt

has an

8087,

<IC)

is

shunted,

Normally,

881 BOARD

<IAl

is

used

shunted.

be

shunted.

Enable

8087

in

location

JB

should

JBisetched.

the

it

is

unshunted.

in

location

If

the

<IB)

be

shunted

MWRT+

EPROM

3B,

signal

5B,

then

isa2732

location

to

JB

mask

(Memory Write)

the

should

out

upper

(4K) or a

the

pair

be

unshunted.

numeric

1S

sent

of

pins

2764

processor

out

to

at

(8K),

If

the

5000

Series

IMS

International

Microcomputersj7.01.83;Page

25

v

\

-../

IMS
5000

International

Series

Miceocornputee

s/7.0

Model

1.8

3;Page 26

881

Figure

8088

2-9

Processor

Board

\

2.5

MEMORY

2.5.1

MODEL

The
memory
The

CONFIGURING

465
requirements.

Phantom

The

this

phantom

When

etched
ignored

Enable

When
should
is

unshunted.

465 -

465

space.

board

boards

Line (Jack

phantom

line

line

location

for
by

1.12

the

be

board

can

disables

use

the

(Jack I

memory

shunted

64K

is

The

be

used

THE

shipped

signal

affects

JD

in

rest

B)

DYNAMIC RANDOM

the

dynamic

ninth

as

separate

465 BOARD

in

IMS

TO)

is

activated

all

memory

memory read

is

shunted,

IMS

systems.

of

the

system.

is

used

so

that

the

bit

in

systems

when

except

in

the

board

memory

each

16K

operations

the

banks.

will

the

phantom

If

bank

can

ACCESS

card.

byte

is

normally

system

the

Intial

only,

this

etch

mode

respond

MEMORY BOARD

It

contains

used

as

an odd

be

configured

is

"booting-up".

Program

line

or

to

not

is

is

for

I/O

Loader

memory

enabled.

cut,

the

parity

commands.

64K

by 9

parity

to

When

EPROM.

write

This

phantom

operations,

Normally,

bits

check

the

operations.
location

bit.

system

active,

The

signal

jack

of

is

is

JB
JB

I/O

Address

The

selection

0-7

(top

A

"1"

is
OFH,
shunts
on

shunted.

CPU

The

systems,

Front

If

be

testing;

Memory

This

alwaysbein

the

(4-7)

for

the

Selection

8080

Panel (Jack IH)

the

465

in

the

in

Speed

shunt

Selection

of

the

to

bottom)

programmed

top

four

would

board

(Jack

shunt

this

(JE)

shunt

board

right-most

normal

is

operation,

(Jack

is

dependent

theLposition.

board's

shunts

be

to

IP)

should

should

to

1M

(Jack IC)

I/O

address

for

the

respective

by

removingashunt.

(0-3)

installed

respond

be

(FP)

on

to

be

installed

be

removed.

used

position.

this

the

("O's").

with

would

the

shunt

speed

is

address

be

(Note

I/O

for

an

"IMSAI"

"IMSAI"

should

of

done

on

bits

Therefore,

removed

that

command.)

systems

front

front

be

in

the

memory

Jack JC.

(AO-A?)

("1'S")

the

"EN

Normally,

using

panel,

panels are mainly

the

leftmost

chips

to

8080

The

of

program

and

1/0"

CPUs.

the

used,

jackislabeled

the

1;0

address.

1;0

address

the

bottom

shunt

all

shunt

position.

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positions

F0r

JH

used

an"

~t

four

be

are

2-80

must

for

should

5000

Series

IMS

Microcomputers/7.0

International

1.83jPage

27

Parity

Error

Interrupt

Level (Jack IG)

Jack

The
memory

Normally,

Normal/Bank

JG

sdections

state

allows

board.

selection

are:

Shunt

Position

VIl

VIz

VB

VI4
VI5

INT

NMI

ROY

of

the

parity

If

bit0isa"1",

VI2

is

shunted

Mode (Jack IE)

of

circuit

for

eight

CP/M

different

may

a

parity

systems;

responses

Interrupt

Selected

VECTORED

VECTORED

VECTORED

VECTORED
VECTORED
INT

Line

Non-maskable

PRDY

(Parity

be

sensed

error

there

Line

Error

has

toaparity

INTERRUPT

INTERRUPT

INTERRUPT

INTERR

INTERRlJ'PT 5

INT

Stops

by

reading

occurred.

are

no

shunts

UPT 4

(2-

CPU)

the

BO

1
2
3

Only)

I/O

for

TurboDOS.

error.

port

on

The

the

This

S

addresses

In
the

bank

"one"

In

bits.
table.
memory

wi

shunt

tched

the

entire

may

the

mode.

from

normal

bit

disables

Output

BIT
BIT

BIT2=1
BIT

Bank

Codes

Initially,
board

should

16

be

0=1
1=1

3=1

bit

Mode

are

can

be

In

the

0000

to

mode,

controlled

with

address

the

(Shunt

provided

the

be

used

installed

normal

FFFF

shunt

space

individually

associated

Controlled

0000-3FFF
4000-7FFF

BOOO-BFFF

COOO-FFFF

JE

foravariety

board

is

ina16K,

only

mode

hex.

JE

0000

bank.

installed)

deselected

if

(unshunted)

removed,

through

by

an

Control

Memory

(omitted

(omitted

the

of

configurations

by

32K

or 48K

the

the

FFFF

output

Bank

board

the

board

is on a

in

in

Power

is

to

be

used

in

the

Bank

the

board

four

16K

hex.

to

the

bit

(hex) J

32K

vers.)

32K

& 4BK

responds

On

bank

sdection

will

respond

memory

In

this

mode,

board's

basts,

vers.)

toacombination

defined

Clear

I/O

thus:

in

the

signal.

scheme.

banks

following

occupy
each
port.

The

to

all

16K

A

of

465

IMS
5000

International

Series

Microcomputer

5/7.01.8

3/pag e

28

BANK

MOPE

TABLE

Output

o

1

2

3
4

5

6

7

8

9

A

B

C

D

E
F

Byte

All

Banks

Banks

Banks

Banks

Deselected

0 & 1

2 & 3

1,

2,

Occupy
Occupy

& 3

Bank0Occupies
Bank0Occupies

Bank 0

Bank 1

Occupies

Occupies
Bank1Occupies
Bank 1

Occupies
Bank2Occupies

Bank 2

Occupies

Bank2Occupies
Bank 3

Bank 3

Bank 3

Occupies

Occupies

Occupies

Memory

Addresses

Addresses
Occupy
Address
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses
Addresses

Mapping

Addresses

es

8000-FFFF
8000-FFFF
4000-FFFF

4000-7FFF

8000-BFFF
COOO-FFFF
4000-7FFF
8000

-BFFF
COOO-FFFF
4000-7FFF

8000-BFFF
COOO-FFFF
4000-7FFF
8000-BFFF
CO

OO-FFFF

(32K)
(32
(48K)

(16

K)

(16K)

(16K)

(16K)

(16

(16K)

(16K)

(16K)

(16K)

(16

K)

(16K)

(16

K)

K)

K)

5000

Series

Microcomputer

IMS

International

s/7.0

1.83;1>age

29

465 64

Legend

KB

DYNAMIC

RAM

BOARD

STANDARp

CONFIGURATION

NOTE.
plns

shunts.

JA

JB

Je

JD

JE
JF
JG

JH

are

Four

all

Rescription

Memory

En

I/O
Phant
Normal/Bank
CPU
Parity,I

Front

spare

connected

Speed

I/O

Selection

om

Selection

nter

Panel

shunts

by

Lme

rupt

are

etch

Mode

installed

and

serve

Standard

Normal

and

previous

theHposition.

Open

All

positions
Shunted
Open
Open
All open

for

CP/M & MP;M.

Left

posltion

on

the

upper

asaconvement

Configuration

pOS1t10nisL.

revs,

shunt

shunted

(etch)

for

TurboDOS,

shunted.

pms

of Jack

place

to

On

1S

VIZ

JG.

store

464

10

These

spare

Rev. A

shunted

IMS

Internatlonal

5000

Senes

Microcomputer

s/7.0

465

64KB

1.83/page

Figure

Dynamic

30

2-10

RAM

Board

2.5.2

MODEL

961 - 256 K

pYNAMIC

RAM

BOARD

GENERAL

The

Model
Boards
to

insure

A

standard

Interrupt

LED

read

the

The

Model

memories
memory

The

961

capacity

256K

CONFIGURING

Memory

Since

can

be

sdect

PESCRIPTION

961

are

tested

rdiable

feature

or

indicator

memory

961

which

except

board

of

memory

Board

there

used

shunt,

Memory

and

operation.

of

the

a Wait

1

segment.

Address

isasystem

to

identifying

signal

on

the

board's

board

use

this

the

Initial

decodesafull

Megabyte.

THE

961

supply

Board

burned

961

to

board

I/O

has

feature.

Program

BOARP

Select

memory
a

256K

which

uses

in

at an

boardisbyte

the

CPUifany

lights

port

to

a

"Phantom

The

Loader

lO-bit

Switches

OM

capability

segment

addresses

64K

devated

up

to

clear

phantom

address,

allow

X 1

temperature

parity

single

indicate

the

error

Signal"

signal,

ROM.

allowingasystem

the

system

of1megabyte,

of

memory.

the

board

bit

dynamic

checking

bit

memory

an

error.

indicator.

input

to

Shunt

will

respond

for

when

address

under

which

The

systems

active,

a 971

JA

memory

diagnostic

can

error

CPU

memory

the

memory

is

to.

circuits.

generate

occurs.

can

with

disables

address

board

the

segment

test

then

ROM

all

as

board

an

A

a

JA-l
JA-2
JA-3
JA-4

Parity

Shunt

JB-7

The

state

memory

The

normal

Error

J B

JB-1
JB-2
JB-3
JB-4
JB-5
JB-6

JB-8

shunted

sdects

shunted

of

board.

setting

shunted
shunted
shunted

Response

the

shunted
shunted
shunted
shunted
shunted
shunted

shunted

the

If

addresses

=

addresses

=

addresses

=

addresses

=

Selection

type

of

VII

=

VI2

=

VI3

=

VI4

=

VIS

=

VI6

=

NMI

=

ROY

=

parity

bit0containsa"1",aparity

depends

OB)

response

(Vectored
(Vectored
(Vectored
(Vectored
(Vectored
(Vectored

(Non-Maskable

(Hold

circuit

on

may

the

00000-3FFFF
40000-7FFFF
80000-BFFFF

COOOO-FFFFF

the

CPU

Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt

CPU

be

operating

Interrupt)

inawait

sensed

system

will

give

1)

2)

3)

4)

5)

6)

condition)

by

reading

error

used.

toaparity

the

has

occurred.

I/O

error.

port

on

the

5000

Series

IMS

International

Microcomputers/7.01.83jPage

31

Phantom

If

a

shunt
Signal.
Program
unshunted.

I/O

Device

The

I/O
shunts
A

"1"

shunted

Signal

is

installed

The

Phantom

Loader

Address

Address

are

labeled

is

programmed

foraOOH

(IC)

while

Select

for

1-8

I/O

on

signal

the

(0)

the

memory

for

by

address.

JC,

the
is
system

the

respective

removing

used

board

board

to

is

will

disable

startlng

may

address

a

shunt.

be

all

be

disabled

memory

up.

selected

bus

(AO-A7) of

Normally,

by

an activate'd

other

In

IMS

by

shunts

all

than

the

systems,

on

the

I/O

the

10catlOns are

Phantom

IrUt1al

JC

JO.

address.

1S

The

JO-l
JO-2
JO
JO-4
JO

JO-6

JD-7

JO-8

-3

-5

=
=

=

=
=

=
=
=

AD
Al
A2

A3

A4

A5

A6

A7

\

...J

D1S
5000

International

Senes

Microcomputer

Figure

2-11

s/7.0 1.83/Page

-

Modd

32

961

256K.

Memory

Board

2.6

I/O

CONTROLLERS

2.6.1

MOPEL

444

FUNCTIONAL

The

Model

systems

paralld

Timing

by

ports.

is
Timer/Counter
relative

The

time

Universal
microprocessor
serial
from

The
to
connector
provides

output,

data

parallel

Programmable

three

8-bit

at

for

or

bidirectional

FEATURES

I/O

BOARP

DESCRIPTION

444

I/O

providing

provided

and

functions

interrupts

Asynchronous

to

an

to

parallel

to

serial

Peripheral

parallel

the

top

termination.

Board

timing

by

serves

and

the

Programmable

asageneral-purpose

under

software

Receiverrrransmitter

asynchronous

data

to

be

and placed

Interface

ports.

of

These

the

This

I/O

under

I/O

serial

used

on

444

software

as

an

interfacing

control,

data

by

the

RS-232

circuit

parallel

I/O

parallel

integral

Interval

the

board.

port

control,

for

timing

channel.

system.

port.

interfaces

ports

are

Each

can

part

two

Timer

(UART)

The

Output

the
located
line
be

of

IMS

serial

and

(PIT).

element

interfaces

UART

data

2-80

at

is

TIL

programmed

5000

and 8000

three

The

PIT

that

generates

the

converts

is

converted

8-bit

is

2-80

input

microprocessor

the

50

pin

I/O

buffered

as

and

input,

a

SPECIF

2048

•

Programmable

Two

UART's

Two

RS-232

Three

ICATIONS

On-Board

Serial
8

Bit

Baud

Circuit

Power

by

8-bitEP

Interval

supplying

ports

8-bit

parallel

ROM:

I/O

Ports:

Parallel

Ports:

Rates:

board

Dimensions:

Requirements:

ROM

Timer/Relative

baud

with

ports

rates

partial

Up

2
3

75

5.25"x10"
(13.3

+16V
+8V

-16V

Time

from

modem

control

to4Kbyte

to

19.2K

emx25.4

@ 60 rna

@ 500 rna

@ 40 rna

75

Clock

to

Baud

19.2K

em)

baud.

5000

Series

IMS

International

Microcomputers/7.01.83;Page

33

HARDWARE SUMMARY

S-100
BUS

INT

ERRUPTS

CO

NTROL

DA

TA

AD

DRESS

TTL

INTERFACE

PARALLEL

PORT

1

BUS

BUS

BUS

RS-232

INTERFACE

UART 1

RS-232

INTERFACE

UART 0

PROGRAM

INTERVAL

TIMER

1

1

2048

The

space is

Programmable

The
considered

The
to
one

the

software

assignment

x 8 EPROM

2716

shunt

8253

8253

allows

generate

of

three

delay and

functions

as

overhead

EP ROM

selectable.

Interval

an

array

accurate

counters

interrupt

of

priority

Model ...... Board

contains

Timer

asageneral-purpose,

of

the

programmer

time

with

the

and

levels.

I/O

delays

the

CPU

allows

the

(8253)

ports.

Figure

IMS

Initial

to

set

up
under
desired

whenithas

multiple

software

quantity

delays

2-12

Block

Program

multi-mode

tlmtng

control.

and,

completed

that

Diagram

Loader

timing

loops

upon

its

can

element

in

the

The

command,

tasks.

be

easily

OPL).

system

user

Its

that

software

may

initialize

count

This

minimizes

maintained

address

can

be

out

by

ROM

MEMORY

J

IMS
5000

International

Series

Microcomputer

s/7.0

1.83/page

34

Other

functions

provided

by

the

8253

are:

Uni

versal

The

444 has

of

the

programmable
used
lines

for

of

sections:

The

receiver

data

bits

Parity,

transmission

The

transmitter

contains

Both

The

the

UART may

Relative
Programmable

Event
Binary
Digital

Asynchronous

two

serial

interfacing

the

microprocessor.

the

receiver

accepts

to

paralld

and

Stop

by

checking

section

the

data,

receiver

along

and

be

Time

Counter

Rate

One-Shot

Recd

I/O

interval

an

asynchronous

and

the

the

serial

data.

bits

to

parity

converts

with

transmitter

programmed

Clock
Rate

Generator

Multiplier

ver/rransmitter

ports.

timer

Each
(PIT).

serial

It

is

made

transmitter.

data,

The

decode

parallel

and

decodes

information

the

receipt

the

the

start,

double-buffer

as

follows:

CUART)

port

consists

The

communication

up

of

the

function

ofavalid

parallel

parity,

and

data

UART

two

control

converts

and

data

stop

transfers

of a

CART

and

isaprogrammable

line

to

the

paralld

separate

bits

the

verifies

stop

into

serial

bit.

a

and

and

the

serial

independent

converts
Start,

proper

word

bits.

with

the

one-third

device

data

the

Data,

code

which

processor.

1.

2.

3.

4.

The

word
standard
Parity

odd

be

The

a 5

-bitcode).

is8bits.)

generation

or

number

OMS uses 1

The

baud
standard.)

length

even.

of

stop

stopbit.)

rate

may

and

(No

bits

may be

be

checking

parity

may be

set

either

may be

standard

one

from

75

5,

inhibited,

for

or

to

6,

IMS

two

19.2 K

7,

or

systems.)

(l

and

1/2

baud.

8

when

bits.

the

transmitting

(9600

(The IMS

parity

baud

may

is

5000

Series

IMS

International

Microcomputers/7.01.83jPage

35

I/O

PEVICE

ADDRESSES

FOR

THE

444 BOARD

XOH Comm
X1H

X2H
X3H
X4H
X5H
X6H
X7H

X8H

X9H
XCH
XDH
XEH

XFH

X=Base

Address=

Read;Write

0

Comm

Comm

Comm 1 Read;Write

Timer

Timer
Timer
Timer

Interrupt
Timer
Port

A

Port

B

Port

C

Parallel

Address

20H,

then

Read;Write

0

ReadjWrite

1

Read;Write

0
1 Read;WriteData

Read;Write

2
Control

Enable-Request

2

Interrupt
Data

Data

Data

Control

selected

X=2.)

Write

Write

at

location

Usually,

Control

Data

Control
Data
Data

Data

Reset

X=1.

for UART 0

for

UART 0

for UART 1

for

UART 1

(Baud

(Baud

(RTC)

to

(RTC)

JP

Clock

Send

(If

Clock

Control

Address=

10H,

0)

1)

then

X=1.

If

)

Comm

16

*

Comm

16

*

IMS

International

5000

Series

Mlcrocomputersj7.01,83jPage

I

"-'

36

SERIAL

The

using
interconnection
equipment.
between
different

The
UART's
panel
connecting
follows:

two

12

at

PORT

serial

the

devices,

company.

pin

on

the

......

(Connector

CONNECTIONS

ports

RS-232

I t

connector,J1,(top

the

444

rear

this

12

of

data

defines

and

board

of

the

pin

of

standard.

connector

Boud

JI)

the

processing

a

means

is

of

to

the

IMS

Model 444

The

terminal

of

particular

center

two

D825

computer

and

the

I/O

board

RS-232

exchanging

importance

of

the
female

(CH. 1 and CH. 2).

two

communicate

interface

equipment

control

when

444

I/O

connectors

female

DB25

I/O

(CH.I

and

signals

each is

board)

connectors

Panel

-

Console

with

standard

data

connects

mounted

The

peripherals

is

for

the

communication

and

serial

furnished

on

internal

is

by a

the

the

cable

wired

data

two

I/O

Port)

as

Serial

port

£in..it.

1

2 RD

4

3

5

6

8

7

9

10

1

(CH.

1)

is

normally

Signal

(TransmitData)

TX

(Receive

(Clear

crs

(Request

RTS

GND

(Signal

(Signal

GND

(Request

RTS

crs

(dear

(Receive

RD

(Transmit

TX

connected

Data)

to

Send)

to

Send)

Ground)

(CH.2-Pdnter

Ground)

to

Send) 4

to

Send)

Data)

Data)

to

the

video

£.in...it.

2

3

5

4

7

Port)

7

5

3

2

terminal.

Serial

port

2

(CH.

2)

is

normally

connected

5000

to

Series

the

serial

Microcomputers/7.01.83/page

printer.

IMS

International

37

To

connect

connections:

a

CRT

to

the

IMS

system,

you

will

need a

cable

with

the

following

Figure

Note:

5

manufacturer

To

connections
82,83,84A,

ace

connect

Refer

pins

6,

to

a

shown

and

CH.I-Console

(DB25

2-13

to

printer

the

8,

and 20

another.

below.

Epson

-

CRT

Connector)

..

2
3

•

0

5

0

..

0

6

e

7

8

0

20

0

Computer

manual

together.

to

the

MX80

and

IMS

This

MXIO 0

Port

to

to

determine

computer,

cable

CRT

This

printers.

(DB25

Connection

ifitis

requirement

you

is

used

CRT

Connector)

6

8

20

(RS232)

necessary

will

will

for

CTS

3

•

2

0

0

..

5

0

8--

-I

e 7

0--

0-

need a

I

I

-,

I

--

to

vary

TI8IO/82D,

tie

pins4and

from

cable

one

with

Okidata

CRT

the

/

IMS
5000

Figure

International

Series

Microcomputers/7.0

2-14

CH.2

(DB25

-

Computer

1.83/page

-Printer
Connector)

2

3 0

5

..

6 0 6

7

8

20

Port

(DB2S

•

0

0
0

to

Printer

38

Connection

Connector)

• 3
o 2

o ..

o 5

7

8

11

20

(RS232)

\

J

USINGAPARALLEL

PRINTER

UsingaCentronics

To

useaCentronics

1.

Shunt

the

PCO

PCl

PC2

PC3

PC

Parallel

parallel

following

..

..

1
2

3 0

5
6 0

7
8

9

Printer

printer,

I

0

0

0

0

pins

JC

shunt

located

1

o

o

o
o
o
o

locations

at pad JC:

32
31
30
29
28

27
26
25

2..

JB and

DSTA

IP

JC

as

shown

below.

2.

PC5

PC6

PC7

Remove

JB

1 0

2 0

shunt

I

10
11

0

12

0

0

13

1..

0

0

15
16

0

at pad JB.

I

o
o
o
o
o
o

23
22
21
20
19
18
17

ACK

5000

Series

IMS

International

Microcomputers/7.01.83,IPage 39

A twisted pair s cablewith the £ollowing connectionsisneeded.

IMS COMPUTER

50

pin

IDS

PA7
GNO
PA6
GNO
PA5
GND
PA4
GND
PA3
GND
PA2
G!'\D
PAl

GN['

PAD
GNO
PB3
GND
PB2
PB1
PBO

GND
PC6
GND

PC4
GND
PCO
GND

Connector

3 9

4

Amphenol

5 8

6

7
8

9
10
11

12

13 4

14

15

]6

17
18

27

28

29
31

33

34

37
38

41
42
49
50

CENTRONICS

57-30360

27
26

7

25

6

24

5

23
22

3

21

2 OSl

20

11

29

12

13 SLCT

32
17

10
28
31
30

1

19

PRINTER

Connector

OS8

GNO

OS7
GNO
OS6
GNO

DS5
GNO
DS4
GNO

[,-S3
GND

[,'S2
GND

GND

BUSY
GND
PE

FAULT
GND

ACK

-

GND

IP

­GNO
OSTA
GND

'-.......,I

-

IMS

International

Computer

PAX
PBX

PCX

to

Centronics

=

PARALLEL

=

PARALLEL

=

PARALLEL

Printer

Figure

5000 Series Microcomputers/7.0 1,83/page

PORT
PORT
PORT

2-15

Connection

40

A

B

BITS
BITS

C BITS

(14

Twisted

Pairs

.....,I

Cable)

\

J

Using

a NEC

SQinwriter

5500D

Parallel

Printer

V

Install

l.

16

horizontal

shunts

at pad

JC

(all

pins

shunted).

JC

PCO

PC1

PC2

PC3

PC4

PCS

1 0 0

2 0 0

3 0 0

4 0 o

0 o

5

6 0 0

0 o

7

8 0 o

9 0 0

10

0 o

0 o

11

32
31
30
29
28
27
26

25
24
23

22

DSTA

IP

2.

Installavertical

PC6

PC7

JB

12

0 o

0 o

13

0 0

14
15 0 0

0

16

shunt

at

pad

JB.

21
20

ACK

19
18

0

17

5000

Series

IMS

International

Microcomputers/7.0l.83/page

41

A

cable

with

the

following

connections

is

needed.

50

IMS

Rin

PARALLBL

Computet

IpS

Connector

3

5
7
9

11

13 39

15

17

19
21
23

25
27

NBC

SPINWRITBR

NBC

50

Spinwriter

pin

IpS

45
43
42

40

H

36
37
10

13

17
15

21

PRINTBR

Printer

Connector

CABLB

nal

Sie

Dataline
Dataline
Dataline
Dataline
Dataline

Dataline

Dataline

Dataline

Dataline
Restore
Carriage

Paper
Print

8
7
6

5
..
3
2
1

12

Strobe

Feed

Wheel

Strobe

Strobe

.......

-

/

29 9
31
33
35

37

39

41
43
45
47

49

46

12

27

34

26

28

Dataline

1

3

4

Dataline

Dataline

Check

Paper

Ribbon

(NOT
Print
Paper

Carriage
Printer

11
10
9

Status

Out

Status

Out

Status

USED)

\Vheel Ready

Feed

Ready

Ready

Ready

J

j

IMS
5000

International

Series

Microcomputers/7.0

1.83/page

42

CONFIGURING

THE

444

I/O

BOARP

Parallel

Shunt

location

1 0 0 4

2 0 0 3

Parallel

74

LS24

74LS242

Parallel

Open
For
For

Parallel

Shunt

location

IB

Port

A Modes

JA

Selection

indicates

]A

Port

A

Dri

ver/Recei ver

3

PortATermination

= No

Pull-Up,
Pull-Up/pull-Down,

Port

B Mode

non
inverting

termination

use

a Beckman

Select

JB

indicates

inverting

(Location

the

direction

shunts

No

Shunt

Shunt

Options

(Location

the

No

JA
JA2-3 =

Selection

899-1-Rl.OK

use

a Beckman

mode

shunt=input

1M

of

parallel

=

input

1-4=output

bi-directional

(Location

(Location

899-5-R220/330

IB)

of

parallel

mode

9A)

resistor

port

mode

port

A.

mode

8A, lOA)

pack.

B.

mode

resistor

pack.

,-'

1 0

2 0

Parallel

74
74LS242

Parallel

Open

For
For

Port

B

priver/Receiver

LS24

3

PortBTermination

= No

Pull-Up,

Pull-Up/pull-Down,

non
inverting

termination

use

Shunt

inverting

Options

a Beckman

use

JB

1-2=output

(Location

(Location

899-1-Rl.OK

a Beckman

10B,11A)

11

B)

resistor

899-1-R220/330

mode

pack.

resistor

pack.

5000

Series

IMS

Microcomputers/?O

International

1.83/page

43

Parallel

The

direction

Port

C

pirection

of each

Je

bit

Select

in

PortCcan

(Location

IC)

be

individually

sdected.

1 0

2 0
3 0
4 0

5

6 0

7

8 0

9 0

10
11
12

13

14
15

16

Parallel

74
74L5240

Parallel

PCO

PCl

0

PC2

0

PC3
PC4 0

0

0

PC5 0

0

0

PC6

0
0

PC7

0 0

Port

C PriverfRecei ver

LS244

0

0

0
0
0
0
0
0

0

0
0
0

0

non

32
31
30
29
28

27
26
25
24
23
22
21
20

19

18

17

inverting

PortCTermination

No

Horizontal

Vertical

inverting

Options

shunts=Bit

pair

(Location

(Location

unused

pair

of

shunts

of

shunts=output

13M

12M

=

input

(receiver)

(driver)

Open=no
For
For

EPROM

Any

etched

IMS

International

5000

termination

Pull-Up,

insert

Pull-Up/pull-Down,

Selection

(Locations

connections

Series

Microcomputers/7.01.83/page

a Beckman

insert

ID.

which are

899-1-Rl.OK

a Beckman

IE.

IF.

IG)

not

defined

44

resistor

pack.

899-1-R220/330

in

the

following

resistor

diagrams

pack.

should

be

cut.

To

Usea2708

1 K x 8 EPROM:

'---,

JD

o 4

1 0 o 3 1 2 3

o 2

JG

AI5
AI4
A13
AI2
All
AIO

RE

To

Usea2716

I 0

2 0

3 0
4 0 0

0

5

6 0

0 0 8

7

0

o

0

0

0

2 K x 8 EPROM:

JO

14

13

12

11

10

o--e

9

JE

0 I

JE

JF

Shunt

3

4

I

2

I

Shunt

Shunt

Shunt

Shunt

JO
JE
JF
JF

all

horizontally

1-3

1-2

1-2

3-4

at

JG

JF

1 0 3

AI5
AI4
A13
AI2
All

A10 6 0

RE

I 0

2 0
3

4 0

5

7

I

0

0

0

0 2

JG

4

0

0
0
0
0

0

0

0

I 2 3

14
13

12
11

10

9

8

0-0

I 0

2

0

I

3

4

Shunt
Shunt

Shunt

Remove

10

JE
IF

shunt

3-4

2-3

3-4

A10

at IG

5000

Series

Microcomputer

IMS

International

s/7.0

1.8

3/Page 45

To

Use a 2732 4 K x 8 EPROM:

1 0

A15
Al4
A13
A12

All

Ala

RE

EPROM

JD

I

1 0
2 0
3 0

4 0

0

5

6 0

7 0

Address

o 4

3

2

JG

Selection

0

14

0

13

0

12

0

11

0

10

0

0 8

JB

o

0--0

123

9

(Location

IG)

1 0

2 0

JF

o 3

o 4

Shunt
Shunt
No

shunts

Remove
at

JG

ID
IE

at

shunts

2-3

2-3

IF

Ala

and

All

~

A15
A14
A13
Al2

All
A10

RE

1 0 0

0

2

3 0 0

4 0

0 0

5

6 0 0

0 0

7

EPROM Enable

A15 1
A14 2
A13
Al2
All
AID

RE

0
0

3

0 0 12

4 0 0 11

0

5

0 0 9

6

7 0

JG

(RE

JG

14

0

13

12

0

11

10

9

8

at

Location

0

13

0

10

0

0

14

I

J

Shunt

All

All

OFF

Shunts

Shunts

= I

OFF

ON

Shunt

= EPROM

= EPROM

ON = a

Starting

Starting

Address

Address

X'

X'

FeOO'

0000'

IG)

"RE"

"RE"

8

unshunted=

shunted=

EPROM

EPROM

Disabled

Enabled

IMS

International

5000

Series

Microcomputers/7.01.83jPage

j

46

Timer

Clock

Option

JH

(Location

IH)

1 0 0 4

2 0 0 3

Interrupt

The

listed

Options

installation

below.

JJ

Device

1 0

3 0 0

4

0 0
0

5

6 0 0

0 0

7

0

8

Address

VI7
VI6 2 0 0

VI'
VI4

VB
VI2
VIl
VIO

1;0

Shunt
Shunt
baud

(Locations

ofahorizontal

-

IN

0

16

15

14

13

0

12

11
10

0

9

Selection

JH

JH

rate)

II,

(Location

1-4
2-3

JJ=

JK
JL
JM
IN

=

Enable

=

Enable

IK.

IL.

shunt

Relative
Line0Transmit/Receive

=

Line1Transmit/Receive

=

Parallel

=

Parallel

=

1M. IN)

will

IP)

External
on-board

select

Time

PortBInterrupt

Port

2Mhz

1.2288

the

Clock

A

Interrupt

Clock

Mhz

interrupt

(RTC)

(75

Clock

level

Interrupt
Interrupt
Interrupt

to

9600

(75

for

baud

to

the

rate)

19200

functions

A7
A6

AS

A4

JP

1

00----00

2 0 0 7

3 0 0 6

4 0 0 5

Example:

Shunt

Shunt

Shunt

A7,
A7,

A7.

8

A6,
A6,
A5.

Shunt
All
All

A5

A4 =

A4 =

=

OFF
Shunts
Shunts

I/O

I/O

I/O

=1

OFF

ON =

Address
Address
Address

=

I/O

of
of
of

Shunt

I/O

Addresses

Addresses

10

hex

20

hex

40

hex

ON = 0

FOH

OOH

(Standard)

FFH

- OFH

5000

Series

IMS

International

Microcomputers/7.01.83jPage

47

MODEL

Legend

10. JK -

11.

12.

13.

14. JP -

444 BOARD

Location

Port

1.

JA-Port

2. JB -

3.

JC-Port

EPROM

4. JD - EPROM

5. JE - EPROM

6.

JF

- EPROM

7.

Je-EPROr-.l

8. JH -

9.

JJ

-

JL ­JM-PortBInterrupt
IN -

STA~DARD

and

Descrigtion

Mode

Port

Relative

Line1Trans/Rec

Port
I/O

Sdection

A Mode

B Mode

C

Selection

Sdection

Optional

Line0TranslRec

A

Interrupt

Address

Selection
Sdection

Selection
Selection
Selection

Address

Oscillator

Time

Clock

Selection

FACTORY

Sdection

Enable
Interrupt

Interrupt

Interrupt

CONFIGURATION

Configuration

For
Shunt

Shunt
PCO
PC4
PC6
For
Shunt
Shunt

Shunt
Shunt
(S

tarting
Shunt
ShuntVII
ShuntV13
Shunt
No

shunts

No

shunts

S

hunt

(Address

Centronics

1-4

1-2

vertical
vertical
horizontal

2716

EPROM

3-4

2-3

3-4
all

except

Address

2-3

(75

VB

all

except

10

H)

Printer

shunts
shunts

shunts

AIO.

to

A4

(output)
(output)

(input)

0400H)
19200

baud)

IMS

International

5000

Series

Figure

Microcomputers/7.0

2-16

-

Model

1.83/page

48

444

I/O

Controller

Boud

2.6.2

MOPEL

631

I/O

CONTROLLER

BOARD

GENERAL

The

parallel

The

8250
from
is

converted

The
three

the

top

networks.

The

nominally
serial

CONFIGURING

110

Address

The
location

shunt

The

normal

pESCRIPTION

Model

8255

8-bit

Model

RS

mostsignificant

631

ports.

Asynchronous

the

RS-232C

Programmable

parallel

of

631

occupies

-23ZC

Selection

JA.

is

installed.

address

from

the

An

I/O

card.

I/O

port

THE

Controller

port

parallel

ports,

Controller

one

is

brought

631

(Location

bits

address

The

is

ZOH

has

two

Communication

to

parallel

to

serial

Peripheral

which

Each

slot

in

BOARP

and placed on

are

line

is

consists

the

Series

out

1M

of

the

I/O

bit

isa"1"

correspondence

(AS

unshunted,

asynchronous

Element

data

to

Interface

located

TIL

ofasingle
5000

toa3M

addresses

if

of

be

used

circuit
at

buffered

or 8000

26

pin

the

shunt

shunts

A6

and

(ACE)

the

13,

header.

for

to

A7

serial

converts

by

the

RS-Z32C

interfaces
the

50

and

provides

printed

Computer

the

631

is

removed,

address

shunted).

ports

input

system.

port.

the

pin

I/O

circuit

board

bits

and

three

serial

Output

S-100

connector

for

termination

board

Systems.

are

selected

anda"0"

is

shown

8-bit

data
data

bus

which

Each

if

below.

to

at

at

a

"----

A7 1
A6

AS

I/O

Address(hex)

00-13
20-33
40-53

60-73
80-93
AO-B3 1 0
CO-03
EO-F3

0--0

c.-----o

2

3 0 0

JA

6
5
4

I/O

6L

M-

0
0
0 1 0
0

1 1

a 0

0

1

1 0

1 1 0

Device

Al.

1

1

0

1

1

Address

SERIAL

PORT

00-07
20-27
40-47
60-67
80-87

AO-A7

CO-C7
EO-E7

Table

0

SERIAL

PORT

08-0F
28-ZF

48-4F

68-6F
88-8F
A8-AF
C8-CF
E8-EF

PARALLEL

1

PORTS

10-13
30-33
50-53
70-73
90-93
BO-B3

00-03

FO-F3

5000

Series

IMS

International

Microcomputers/7.01.83/page

49

Parallel

The

direction

Port

C

Port

C Bit

PC7 1 0 0

PC6 3

PC5 5 0 0

PC4 7 0 0

PC3

PC2

PC1 13

PCO

prj

verlReceiver

Direction

of each

2 0 0 31
4

6

8

9

10

11

12

14

15

16

Selection

bit

in

portCcan

JB

32

0 0 30

0 0 29

28

0

0

27
26

0

0

25

0 0
0
0 0
0 0 21

0
0 0 19
0 0 18
0 0

Selection

24

0

23
22

0

20

17

(Location

be

Bit

Input

Output

(Location

individually

unused

--

pair

--

l1C)

--

palr

IB)

no

of

of

sdected.

shunts.

horizontal

vertical

shunts

shunts

PCx

PCx

0--0
0--0

74LS240

74LS244

PortCTermination

Open

lK

Pull

220/330

Parallel

Shunt

=
=

Up
Pull

Port

location

Inverting

Non

A Mode

JC

Je

1 0 0 6

2 0 0 5

3 0 0 4

NO SHUNTS

SHUNT
SHUNT
SHUNT

Port

JC

1-6

JC

2-5

JC

3-4

A PriverlReceiver

Inverting

Options

Up/Pull

Selection

indicates

=

Output

=

Bidirectional

=

Bidirectional

=

Input

Selection

(Location

Down

(Location

the

direction

mode

mode

(Location9B)

9M

=

No

=

Beckman

=

Beckman

IC)

of

mode
mode

Termination

899-1-R1.0K
899-5-R220/330

paralld

port

controlled
controlled

A.

by
by

PC7

PC6

8303
8304

IMS

5000

=

Inverting

=

Non-Inverting

International

Series

MicrocomputeIS/7.0

1.83/page

50

PortATermination

Options

(LOe.

lOA)

Open

1K

Pull

220/330

Parallel

Port

Up
Pull

B Mode

JD

1 0

2 0

Port

B

DriverlReceiver

8303
8304

PortBTermination

Open

lK

220/330

=
=

Pull

Inverting

Non-Inverting

UP

Pull

Up/Pull

Selection

Selection

0

pdom

Up/Pull

Down

(Location

NO SHUNT
SHUNT

(Location

(Location

Down

JD

8A)

=

=

-

=

No

=

Beckman

=

Beckman

10)

1-2

7e·)

No

Beckman
Beckman

Termination

899-1-R1.0K
899-5-R220/330

=

Output

=

Input

Termination

899-1-Rl.0K
899-5-R220/330

Mode

Mode

Interrupt

Level

JF-JJ

V I 7 1 0

V I 6 2 0

V I 5 3 0

VI4

V I 3 5 0

V I 2 6 0

V

V

Installingashunt

JF
JG

JH
JJ

II
10

4 0

7 0
8 0

=

=
=
=

Serial
Serial
Parallel
Parallel

o

o

o

o
o

o
o
o 9

Selection

16

15
14
13
12

11

10

will

Port
Port

Port
Port

(Locations

select

0
1

B

A

the

Interrupt

Interrupt
Interrupt

Interrupt

Interrupt

IF,

IG.

IH.

level

(PCO

(PC3

II>

for

INTRB)

INTRA)

the

ports

listed

below.

5000

Series

IMS

International

Microcomputers/7.01.83/page

51

SERIAL

The

two

the

I/O

board,

1

is

the

631

J 2

are

internal

PORT

connectors,

panel

Jl

and

connected

board

connected

cables

Signal

CONNECTIONS

Jl

on

the

J2

are

connected
toaterminal,
is

used

the

have

the

Name

and

rear

of

to

increase

next

following

J2,

the

to

and

pair

RS

-23

Circuit

on

the

upper

computer.

channels1and2respectively.

Channel2is

I/O

capability

of

free

connections:

2

edge

If

channels

631

Board

J

(x)

of

the

the

system

connected

inamore

after

the

ri!LiL

board

toaserial

are

hasa645

Usually

recent

slave

I/O

DTE

Connect

(D

B25)

LlliLit.

connected

processor

printer.

version

channels.

Panel

or

Channel

Jl

and

The

to

If

Transmit

Receive0ata
Requestto
Clear
Data
Signal
Data

Data

Ring

Figure

O1annel1is

Data

Send

to

Send

Set

Ready

Ground
Terminal
Car

rier0et

Indicator

2-17

connected

Ready

ect

631

Boud

toaCRT

CH.I-Console

(0

B2 5

Connector>

z

3 0

5

..

6

7

8

20

BA

BB
CA
CB

CC

AB

CD

CF
CE

to

I/O

Pand

usingacable

3

5

7
9

11

13

14

15
18

Connection

with

Port

(0

------------"'""""1)0

0

.--------------0

0
0
0

0

-------------0

0

0

the

B2 5

20

(RS-232)

following

CRT

Connector)

3

2

--0

I

1--0

6

8

~--

0-

0----

..

5

7 I

--

2

3

<I-

5

6
7

20

8

2

connections:

I

I

IMS

5000

Note:

5

and

manufacturer

International

Series

Microcomputers/7.0

Figure

Refer

ptns

to

6,

to

2-18

the

8,

and

another.

Computer

CRT

manual

20

together.

1.83/page

to

to

52

CRT

Connection

determine

This

ifitis

requirement

(RS-232)

necessary

will

vary

to

tie

from

pins4and

one

CRT

Channel
below.

MX80 and MXIOO

2

is

This

connected

cable

serial

is

CH.2

(OB25

to

a

used

for

printers.

-Printer
Connector)

serial

CTS

Port

printer

TIBIO/820,

using

Okidata

(OB25

the

cable

82,83,84A

Connector)

connections

and

shown

Epson

"-

Figure

PARALLEL

Connector

on

the

I/O

1.
3 •

5 •

7 •

9 •

11

13.
15 •

17.

19.

21.

23.

25.

2-19

pand

.

PORT

J3

on

PBI
PC6
PC4

PB2

GND

PB6

PB4

PB5

PB3

GND
GND

0

2

0 o 2

3

5

..

0 o 5

0 6

6

7 7

0

8

20

Computer

CONNECTIONS

the

upper

usingaflat

0

to

edge of

2.
4 •
6 •

8.

10.

12•PC7

14.

16

•

18

•

20.

22.

24.

26.

Serial

ribbon

GND

PC5

GND

GND

PB7

GND

GND

GND

GND

GND

GND

PC1

Printer

the

631isconnected

cable.

The

8

20

Connection

signals

PC3

27.

GND

29.

31.
PA3

33

•

35.

GND

PAO

37.

39.

PA2

41.

GND

43.

PA6
PA7

45

.

47.

GND

49.

to

are

o 3

o ..

11

(RS-232)

the

paralld

listed

28.
30

32.

34.

36.

38.

40.

42

44.

46.

4

50.

bdow.

.

• PA5

B.

data

PCO

GND

PC2
PAl

GND

PA4

GND

PBO

GND

port

PAx
PBx ­PCx

Parallel

­Paralld
Paralld

-

PortAbits

Port

B

bits

Port

C

bits

Figure

2-20

631

Parallel

5000

Port

Series

Pin

Listing

IMS

International

MicrocomputersI7.01.83/Page

53

Using

a NEC

Parallel

Printer

This

conductor

cable

connects

ribbon

I/O

Si&nal

PA7
PA6
PA5
PA4 40

PA3

PA2 39
PAl

PAO

PB7
PB6 13
PB5

PB4
PB3 21

PB2 9

PB1
PBO

the

NEC

cablewitha3M

fiJI.

45
43
42

33

36
37

10

17
15

1

46

Printer

socket

NEC

o

Oataline

o

Dataline

Oataline

Oataline

o

Oataline

oataline 12

Restore
Carriage
Paper
Print
Oataline
Oataline
Oataline

to

connector.

Si&nal

at

aline

at

aline

at

aline 2

Feed

Wheel

the

Strobe

11
10

I/O

8

7

6

5
4

3

1

Strobe

Strobe

9

panel,

and 1S made

from

a 50

Note:

The

PC7 12
PC6 3
PC5 4
PC4
PC3 27
PC2

PCl
PCO

GND 24
GND

Groundison

following

Location
Location
Location

Figure

shunt

J B - all
JC ­JO -

5

34

26
28

23

pins:

2,6,8,11,14,16,18,20,22,25,29,32,35,38,41,44,47,50

2-21

connections

no

no

Computer

horizontal

shunt

shunt

(port

(Port

need

shunts

A -

Check
Paper

Ribbon

Cover

Print

Paper
Carriage

Printer

Select

Ribbon

to

to

be

output)

B -

output)

Status

Out

Status

Out

Status

Open

Wheel Ready

Feed

Ready

Ready

Ready

Printer

Lift

NEC

Printer

made

for

(Port

C -

Connection

use

output)

of

a NEC

./

printer.

IMS

International

5000

Series

Microcomputers/7.01.83/page

54

UsingaCentronics

A

cable

parallel

I/O

wi

printer

Signal

th

the
to

Parallel

connections

the

I/O

fin.

Printer

panel

shown

data

fin.

below

channel.

Centronics

is

used

for

connecting

Signal

a

Centronics

PA7
PA6
PAS
PA4
PA3 33
PAl
PAl
PAO

PB3
PB2
PB1
PBO

PC6
PC4
PCO

I/O

Board

Centronics

Grounds

Grounds

45

43
42
40

39

36 3

37

21

9
1

46

3
5

28 1

50,44,41,24,32,23,35,38,22,47,

27,26,25,24,23,22,21,20,29,17,28,30,19

9

8

7
6
5

4

2

11

12

13

32

10
31

DS8
DS7
DS6
DS5
DS4
DS3
DS2
DS1

Busy
PE
SLCT
Fault

ACK-

IP-

DSTA-

2,

6,29

The

Figure

following

Location

Location

Location

2-22

locations

JB

15-16

17-18

25-26

JC

JD

Computer

need

3-30

4-29

7-8

shunts.

No

1-2

to

be

(

PC6inpu

(PCO

(PC4

to

Centronics

shunted

output)

output)

5000

for

t )

Series

Printer

use

with

Microcomputers/?O

Connection

the

Centronics

IMS

printer.

International

1.83/page

55

MOpEL

Legend

631

Location

JA

JB

JC

JD

JF

JG

JH

JJ

Jl

J2

J3

liD

BOARP

I/O

Address

Normally

(A5

unshunted,
Parallel
Normal
PC6 ­PC4 - V
PCO-Vertical
Parallel

Normal =

Parallel

Normal =

Serial
Normally

Serial
Normally
Parallel
Normally

Parallel

Normally

Serial

Serial
Parallel

Port

Shunting:

Horizontal

cttical

PortADirection

PortBDirection

channel a

Channel1TransmIt/Receive

PortBInterrupt

Port

Porta(usually
Port1(usually

Port

Select

20R

A6

C

Select

pais:

pair

no

shunt

shunted

Transmit/Receive

VB.

VB.

unshunted.

A

Interrupt

unshunted.

(connected

and

(for

pair

(for

(for

A7

shunted).

Centronics

Select

Centronics

Select

Centronics

connected
connected

to

parallel

printer)

printer)

printer)

Interrupt

Interrupt

to

channel 1)

to

channel 2)

printer

port)

IMS

International

5000

Series

Microcomputers/7.0

1.83/page

56

Model

631

Figure

I/O

2-23

Controller

5000

Series

Board

Microcomputers/7.0

IMS

International

1.83/page

57

2.6.3

MOpEL

480

FOUR-LINE

The

IMS

Model

Asynchronous

The

Model

brought

toa3M

ASYNCHRONOUS

480

has

Communication

480

controller

26

pin

header on

COMMUNICATIONS

four

requires

RS-232

Element

the

one

(ACE).

slot

I/O

serial

in

panel

CONTROLLER

ports,

the

S-lOO

on

the

controlled

bus.

back

of

Each

the

by the 8250

serial

port

machine.

is

CONFIGURING

I/O

Address

The

mostsignificant

at

of

location

shunts

JA. Each

corresponding

"0"

value.

board

the

Normally,

address

address

addresses

range

is EOH (all

OOHto1FH.

A7

of

20H.

JA

A7
A6

A5 0 0

0 0

0 0

THE

Select

to

address

address

So

and

480

(TA)

bits

shunt

bit

at

location

are

EOH

A6

If

the

unshunted).

BOARP

of

indicates

bits

has

to

FFH.

are

shunted

4SIO

the

I/O

is

shown

a value of

JA,

if

bits

With all

(480)

boardisused

addresses

the

value

below.

"1";

A7,

and

A5

used

by

for

one

If

ifashunt

A6

and

the

shunts

is

unshunted,

as

the

address

a

shunt

is

A5

are

on,

an

additional

480

board

bit.

is

installed,

unshunted,

the

resulting

are

The

removed,

the

addresses

in

I/O

board,

selected
relation

bit

has

the

are

an

the

a

480

in

I/O

the

IMS

5000

Baud

Clock

With

the

upper

be

generated.

International

Series

Microcomputers/7.01.83/page

Option

lower

pair

pair

shunted,

In

normal

JB

o 0 2MHZ

0-

0

4.9152

(TB)

shunted,

the

OSC

MHz

baud

board

uses

operation,

base

on

board

(from

58

rates

the

the

to
2MHz base and
lower

S-100

bus)

oscillator

19.2 Kbaud are
allows

pair

is

shunted.

(normally

shunted)

allowed.

up

to

7600

With

baud

the

to

Interrupt

Level

Selection

00

cations

IC.

1o.

IE.

IF)

PORT

The

the

Locations
port.

CONNECTIONS

four

following

serial

connections:

IC,

10, JE and

Inastandatd

JC

Port

0

0

0
0 0
0

0

0 0 0 0

0----0

0 0 0 0
0 0 0
0 0 0

ports

ate

system,

JD

Port

0
0

0

G---O

connected

IF

allow

VB

is

the

user

shunted

IE

1

Port

2

Port

0
0
0 0 0 0

0
0

to

0 0

0

0 0 0

0

0 0 0

0----0

0 0 0

0

0

0

0

four

connectors

JF

C)---O

0
0

to

for

0

0

0

0
0
0

3

sdect

all

on

VI7
VI6
VI5
VI4
VB
VI2
VII

VIO

the

four

the

I/O

interrupt

ports.

pand

using

levd

for

cables

each

with

\.....-'

Signal
Name

TransmitData
(Data

Receive
Q)ata

Request
Cleat
Data

Signal

Data

Data

Ring

to

Modem)

Data

from

to

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to

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rierDet

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ect

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BA

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CA

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CC 11

AB

CD

CE

CE

480

Boud

j(X)

Pin

Number

3

,

7

9

13

14

15 8

18

I/O

Panel

Connector

Pin

Number

2

3

<4

5

6

7

20

2.2

5000

Series

Microcomputer

IMS

s/7.0

International

1.8

3/Page

59

MODEL

Legend

480 BOARD STANDARD

JA

I/O
Normally
A7=shunt
A6=shunt
A5=no

FACTORY

Address

20H

shunt

CONFIGURATION

Select

in

"C"

verS10n of

system.

JB

JC

JD
JE

JF

Serial
Senal
Serial

Senal

port

port
port
port

Oscillator
Normally

VB -
VB

VB -
VB

0 -

Pin

-

Pin1on

1

2 -

Pin

-

Pin

3

shunted

-

shunted
shunted

-

shunted

on

1

on

1

on

1

Option:

lower

left

left
left
left

pair

shunted.

1S

--.,/

IMS

5000

International

Series

Microcomputers/7.01.83/page

Figure

2-24

Model

480

60

I/O

Controller

Board

\

-.;

2.7

MULTIPROCESSOR

BOARDS

2.7.1

MODEL

GENERAL

The

contains
is

used

The

occupies
232C

740

I/O

PESCRIPTION

Model 740

a

processor,

for each

740

I/O

one

slot

port

is

Processor

brought

SPECIFICATIONS
Processor:
Instruction

PROM
PROM

RAM

Capacity:

RAlvl

Type:

set:

Capacity:

Type:

PROCESSOR

board

is

used

memory,

addi

tiona!

in

the

Series

out

BOARD

to

and

user.

board

5000

toa3M

4MHz

158

instructions

2 K

bytes

2716

or

64K

bytes

4164

Dynamic

add

multi-user

serial

consists

or

26-pin

Z-80A

equivalent

with

and

ofasingle

8000

Computer

header

CPU

Parity

capability

parallel

on

I/O

Systems.

the

to

ports.

printed

I/O

panel.

an IMS

One

circuit

Each

system.

740

board

serial

It

board

that
RS-

Serial

Serial

Channels:

Channel

Parallel

Parallel

Parallel

Parallel

Interval

Timer

Type:

Vectored

Power

Requirements:

Operating

Type:

Channel:

Channel
Channel:

Channel

Timer

s:

Interrupts:

Environment:

Type:

Type:

Two

modem
Z-80A
Ten

with

Z-80A
24

the

8255A

4

for

Z-80A

As

ynchr

control
SIO/O (or

bit-programmable

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PIO

bit

programmable

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Timers;

programmable

CTC

Internally

Z-80A

+ 8

+16

-16

0-55

microprocessor

volts

volts

volts

deg C

onous

Z-80A

Automatic

bus

for

two

for

time

prioritized

@

800

rna

@ 80 rna

@ 70 rna

Host

baud

or

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DART

parallel

Calling

parallel

interface

rate

interval

vector

Asynchronous

I/O

Unit

I/O

lines

control

and

interrupt

channels

Only)

lines

compatible

compatible

two

cascaded

structure

of

wi

with

the

th

5000

Series

IMS

International

Microcomputers/7.01.83jPage

61

CONFIGURING

I/O

Address

The

most
location
shunt
bit

has

exanople

A7
A6
A5
A4
A3
A2

JE.

is

installed,

a

below

1

2 0
3
4
5
6

significant

'0'

0--0

0---0

0--0

0--0

0--0

THE

Selection

The

value;

results

JE

o 11

MODEL

(Location

correspondence

the

address

if

in

12

10

9

8
7 Address

bits

the

I/O

740

HPU

TEl

of

the

I/O

between

bits

are

shunt

addresses

is

A7 A6

0 1

addresses

shunts

shown

removed,

of

40H

LJ

below.

to

A5

and

the

43H.

used

address

address

A4

Byte

by

the

740

board

bits

are

If

a

shunt

bit

is

has

installed,
a value

A3

0

0

40H

-

shown

shown

Al

0

are

below.

of

]

defined

the

address

'I'.

Al

X

at

If

a

The

AO

[-;]

Example

When a
below:

Port

A

The

upper
"Receive"
slgnal.

shown

system

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1st
2nd

3
4th
5th
6th
7th
8th

ve

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two

clock

Normally,

places 740

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ro

and

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for

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of

than

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are

board

pins

shunted

one

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at

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at

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740

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40E
44H

48

ti

4CH
50L
54H
58H
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location

lower

as

addresses

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JA

two

shown

401-1-43H.

each

must

allow

pairs

select

below.

haveadifferent

liQllil.

9th

10th

lIth
12tr.
13th
14th

15th
16th

OA)

the

user

the

to

choose

source

of

address,

I/O

Address

EOH

E4H
E8H

EeH

FOI1
F4H

F8H

FGH

the

source

the

transmitdock

as

shown

of

the

J

IMS
5000

JA

I

0---0

2 0 0 7

0--0

3

4 0 0 5

International

Series

Mlcrocomputers/7.0

8

6

RxCA-

RxCA­TxCA­TxCA-

from
from
from
from

1.83/page

Z-80A
RS-232
Z-80A

RS-232

erc

TO

Interface

erc

TO

Interface

62

(This

pin

(This

pin

connection

17

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connection

15

(Signal

is

etched.)

DO - Receive
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DB -

Transmit

Clock)

Clock)

Port

B Receive

and

Transmit

Baud

Clock

Selections

GBl

Location
connect

S-1

00 Reset

A

shunt

1S only

JB

defines

is etched and

JB

1

0--0

2 0 0 5

3 0 0 4

in

shunted

6

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able (Location

this

location

during

the

source

shown

RxTxCB­RxTxCB­RxTxCB-

disables

testing;

of

below.

from
from
from

TO)

the

Z-80A
RS-232
RS-232

RESET

normallyitis

port

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receive and

erc

T1
Interface
Interface

signal

unshunted.

(1bis

pin
pin

going

transmit

connection

17

(Signal

15

(Signal

to

the

8255

clocks.

The

is etched)
DO - Receive
DB-Transmit

chip.

This

normal

dock)
Clock)

location

5000

Series

IMS

International

Microcomputers/7.01.83;Page

63

SERIAL

The

the

I/O

PORT

two

pand

Signal
Protective
Signal
Transmit
Receive
Request
Clear
Data
Data
Ring
C'

ataCarrierDet

TransmitClock

Receive

CONNECTIONS

leftmost

usingacable

Name

Ground

Data

to

to

Send

Set
Terminal
Indicator

Clock

connectors

ground

Data

Send

Ready

Ready

ec t

with

on

the

the

upper

following

RS-232C

Circuit

AA

AB

BA

BB

CA

CB
CC
CD

CE
CF
DB

DD

edge

of

connections.

the

11

board,

740

or

12

Pin

J1

Board

Connect

Number

1

13

3

5

7

9

11

14
18

15

4

8

and

or

12,

are

connected

I/O

Panel

Channel

Pin

Number

1

7

2

3

4

5

6

20

22

8

15
17

-',

to

11

<1r.d

12

The

next

740

etc.

PARALLEL

Connector

compatible

usingacable

Signal
Frarr.c

Signal
DigitPresent
Abandon
Call
Present
Power
Data
Number
Number
Number
Number
Data

on

the
is

PORT

13

with

with

Name

ground

Ground

Request

Next

Indication

~et

Bit
Bit
Bit
Bit

Line

first

740

usually

CQNNECTIONS

on

the

the

Call-Retry

Status

the

Bdl

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connected

right

following

1

2
4

8

Occupied

801

boarc

side

Automatic

connections:

are

to

of

usually

channds

the

upper

Calling

ACU

Circuit

FGD

SGD
DPR
ACR
CRQ

P~'D

PVlI
DSS
NBI
NB2
NB4
NBB
DLO

connected

5

and

edge

of

Unit.

6,

to

the

the

It

740

J3

Pin

channels

third

board

is

conr.ected

Board

Connect

Number

1

13

3

5
7

9

11

25

2

4

6

8

18

740

is

or

3

a

and

to

10
to

4,

respectively.

channels

bit

parallel

the

I/O

I/O

Pin

7

and

Fanel

Panel

Channel

Number

1

7

2

3

4

5

6

13

14
15
16

17

22

8,

port

by

J

\

J

IMS

5000

International

Series

Microcomputers/7.01.83/page

64

MOpEL

Legend

740

MULTIPROCESSOR

BOARD

JA

JB

JD

JE
JF

J1,J2

J3

Recelved and
Normally

Recelve and

Normally1-6isetched

Reset

Normally

I/O

Interrupt

RS-232C

Bell 801

Disable

Device

Transmit

1-8

and

Transmit

Shunt

unshunted

Address

level

for

Paralld

Paralld

3-6

Selectlon

the

Port

Port

Baud Clock
are

shunted

Baud Clock

8255.

Connectors

Connector

Normally

Selectlon

Selections

unshunted.

Figure

2-25

Model

740

Multiprocessor

5000

Senes

Board

Microcomputer

IMS

5/7.0

1.83/p

International

age 65

2.7.2

MOpEL

861

MULTIPROCESSOR

UNIT

GENERAL

The

Model

two

serial

The

Model 861 MPU
slot
brought

DESCRIPTION

I/O

in

the

out

SPECIFICAT

Processor:
Instruction
PROM Capaci
PROM

RAM
RA.\l

$

erial

Type:

Capacity:

Type:

Channels:

861 MPU

ports.

Series

to

a

3M

IONS

set:

t}':

isasingle

It

consists

5000

26-pin

is

or

4MHz
158

2 K

2716

64K

4164

Two

control

used

to

ofasingle

8000

Computer

header

Z-80A

instructions

bytes

or

bytes

Dynamic

asynchronous

board

add

on

the

CPU

equivalent

with

computer'

multi-user

printed

Systems.

I/O

panel.

Parity

or

with

a

capability

circuit

Each

synchronous

processor,

to

the

board

serial

that

RS

channels

memory,

system.

occupies

-23

2C

with

and

one

port

modem

is

$

erial

Channel

Parallel

Parallel
I

ntervalTimer

Timer
Vectored

Power

Channel:

Channel

Type:

Interrupts:

Requirements:

Operating

Type:

Type:

s:

Environment:

Z-80A

24bit
the

$-100
8255A
4

for

PPI

timers;

programmable
Z-80A
Internally

Z-80A

+ 8

volts

+16

volts

-16

volts

0-55

deg C

S10/0

(or

Z-80A

programmable

bus

for

host

two

for

time

CTC

prioritized

microprocessor

@:

800ma

@

80ma

@

70ma

parallel

baud

DART

interface

rate

interval

vector

asynchronous

I/O

lines

control

interrupt

compatible

and

two

structure

only)

cascaded

of

with

the

J

IM$

5000

International

Series

Microcomputers/7.01.83!page

66

CONFIGURING

I/O

Address

The

most

according

hasa'0'

Selection

significant

to

value;

JE

A7

1 0 0

A6 2 0

3
4

5

6

861

2nd

4th

5th
6th

8th

0 0
0
0
0

board

1st

3rd

7th

AS

A4

A3

A2

Each

THE

861 BOARD

(Location

bits

the

shunts

if

a

shunt

12

0

11
10

9

0

8

0

0

7

is

assignedaunique

I/O

Address

J::!u

40H

44H
48H
4CH

50H

54H
58H
5CH

Binary
010000XX
010001XX
010010XX
010011XX
010100XX
010101XX
010
010

of

at

location

is

off,

110XX
ll1XX

the

IE)

I/O

the

address

addresses

JE.

If

bit

has a

9th
10th
11th
12th
13th
14th

15th
16th

used

a

shunt

'I'

value.

according

.l::iu. Binary

EO
E4H
E8H
ECH
FOH
F4H
F8H
FCH

by

is

to

I/O

H

the

861

on,

the

the

table

Address

111000XX
111001XX
111010XX
111011XX
111100XX
111101XX

111110XX
111111XX

board

are

assigned

corresponding

bdow:

values

address

bit

Interrupt

The

interrupt

V

10

1 0

V

II

2 0

V I 2 3 0

V

13

4 0
V I 4 5 0
V I 5 6 0

VI6

VI7

7 0

8 0

Level

JF

Selection

levd

o

16

o

15

o

14

o

13

o

12

o

11

o

10

o 9

for

(Location

the

861

board

JF)

can

be

sdected

5000

byashunt

Series

Microcorrputer

on

JF.

IMS

s/7.0

International

1.8

3;Page

67

Port

A Receive

The

shunts
serial
and

ports.

11

JA

10

20

30

40

50
60
70
80

Port

The

and4are

016
015
014
013
012
011

010

0 9

B Receive

shunt

JB

10
20

04
03

are

shunted.

at

location

Normally,

shunted

RxDA
RxDA
RxCA­RxCA-

RxCA-

TxCA-

TxCA-

T xCA -

at

IB

RxDB
RxDB

and

Transmit

together.

from
from

Clock

indicates

from

from

Baud

IA

indicate

pins1and

RS-232

RS

- 4

22
from
from
from
from
from
from

Selections(JB)

Z-80A

RS-232
RS-422

Z-80A

RS-232

Z - 8 aA

the

source

RS-232
RS-422

Clock

the

16

are

(Signal
(S

erc

(Signal
(Signal

erc

(Signal

er

of

(Signal

(Signal

Selection

source

shunted,

i gn a 1

TO

TO

C T 0/ 2

the

'receive'

of

BB
RD

BB

RD

GAl

the

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pins3and

-

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- Re c e i v e D a t

DD -

RT

DB

-

-

clock

-

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-

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Receive
Receive

Transmit

for

and

14

port

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are

Data)

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Clock)

B.

Data)
Data)

clocks

shunted,

a)

t\ormally,

and

for

pins

plnS 1

the

6

Reset

A

shunt

during

JO

10
20

Disable

at

testing;

(Location

location

normally

Normal
Local

ID

861

To>

disables

there

mode

test

is

-

the

no

shunt

mode

RESET
shunt.

off.

-

signal

shunt

to

on.

the

861

board.

JD 1S

only

shunted

IMS
5000

International

Series

Microcomputers/7.01.83/page

68

PORT

The

given

CONNECTIONS

861

is

connected

below:

to

the

I/O

panel

usingaflat

ribbon

cable.

The

pins

and

signals

are

Signal

Name

Signal

Transmit

Receive

Request
Clear
Data
Data
Transmit

Terminal

In

To
Terminal
Carrier

Receive

Receive

Receive

Send

Data

a

50001S,

processor

addi

tional

Ground

Data

Data

To

Send

Clock

Clock

Data

Timing

Timing

board

861

Send

Ready

Detect

boards

the

and

first

are

861

J2

on

connected

RS-232C

Circuit

AB
BA
BB

CA

CB

CD
CF

DB

DO

RS-422

RD-A'
RD-B'

RT-A'

RT-B'

SD-A

SD-B

II-A

IT-B

has

the

861

connector

is

connected

in

the

7

2
3

4

5

20

8

15

17

11

23

9

21

13

25

12

24

J3

following

(Data
(Data

(Clock

(Clock

connected

to
from

to

channel

manner:

MCDEM)

MODEM)

From
From

to

MODEM)
MODEM)

connector

2

on

the

I/O

I

I

I

J4

on

panel.

the

971

Any

Ina5000SX

The

odd

numbered

are

used

for

system,

printers.

~

Second

Third

Fourth

the

861

~

First
Second

Third

Fourth
Fifth
Sixth
Seventh
Eighth

channels

861

861

861

861

861

861

861

boards

861

861

861

861

are

have

usually

11.

Ch. 3

Ch.

Ch. 7

the

11.

Ch.

Ch. 5

Ch.
Ch.
Ch.

Ch.
Ch.
Ch.

used

5

following

3

7

9

11

13

15
17

for

terminals

5000

Ch. 4

Ch.6

Ch. 8

Ch.4

Ch.6

Ch.

Ch.

Ch.

Ch.

Ch.

Ch.

Series

.lZ..

connections

to

the

I/O

I

lZ.

8

10
12

14
16
18

and

the

even

numbered

IMS

International

Microcomputers/7.01.83jPage

panel:

channels

69

MODEL

Legend

JA
JB

JD Reset

JE

JF

J1

J2

861

MULTIPROCESSOR

Port

A

Clock

PortBClock

Disable

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Address
Interrupt
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Serial

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Port

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1

Selection

Selection

(Normally

Selection

Selection

BOARD

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(Normally

unshunted.)

1-16,

1-4

3-14

are

and

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6-11

are

shunted.)

IMS

International

5000

Series

Model

Microcomputers/7.01.83/page

861

Figure

Multiprocessor

2-26

70

Board

)

2.8

FLOPPY

DIS

K CONTROLLER BOARDS

2.8.1

MODEL 431

The

Industrial

5

-1/4"

The

single
provides

floppy

431

and

DMA

is

double

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by

value
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the

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values of

the

to

bit.

normal

shunts

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A7

A6
A5
A4

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setting.

0 0
0 0

0

__

0

__

FLOPPY

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drives.

based

operation.

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the

mos t

at

location

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__
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0 0

DISK

CONTROLLER

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on

the

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density

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floppy

double

control

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the

right

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in

below are

disk

controller

disk

controller

sided

up

to

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(as

in

A5

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used

chip,

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four

floppy

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to

CFH,

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vectored

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triggered
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pins

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(shunt

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C3H
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disk

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and Commands

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controller

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ter

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CCH).

or

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disk

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interrupt

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sided

for

for

be

5000

Series

IMS

International

Microcornputers/7.01.83;Page

71

C9H

NOT

-

USED

IN

OUT

IN

OUT

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board.

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on

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disk

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one.

one

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drive

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on

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be

OUT

IN

OUT

IN

IMS
5000

CCH

CDH
CDH

CEH

International

Series

Microcomputers/7.01.83/page

-

&

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Board
follows:

DATA

the

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interrupt

are

latc1">ed

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Precisely

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on

on

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mask.

ored

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selected

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in

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significance

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line.

in

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operation

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ation

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on

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./

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5

6

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Set

7

Floppy

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data

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processor

disk

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command

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to

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of

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data

register

send

or

operation

receive

to

data

or

only

processor

to

or

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OUT

CFH

- Read

CFH

-

Write

CONNECTIONS

The

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connector
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other
They
becauseaflat

cable.

drive(s).

are

listed

ALL

disk

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there

The

below.

ribbon

z

..

6

•

10

12

14

16

18

Z1)

ZZ
Z4

26

28

30

32

34

36

38

40

42

44

46

48

50

ODD

data

data

for

on

the

431

is

more

pin

assignments

The

cableisused.

from

disk

pin

data

ir.to

board

than

numbers

Signal

SPARE
IN

SEL

INDX

SEL
SEL
SEL
MON

IN

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TRACKO

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SDEI
SEPDAT

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register

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3

register

drive,

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in

765

on

to

this

same

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cable

cable

for

Controller

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floppy

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daisy-chained

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the

board

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disk

drive

compatible.

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Chip.

the

Chip.

~ith

to

the

drive

a

5000

Series

IMS

Microcomputers/7.0

International

1.83;Page

73

MODEL

Legend

431

5"

FLOPPY

JA

Address

right

JB

Vector

JC

DOuble-sidec'

J1

Connector

DISK

Selection.

and

A5

Interrupt

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and A4 are

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to

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are

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5000

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s/7.0

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1.8

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3/page

Figure

Disk

74

2-27

Drive

Controller

Board

2.8.2

MOPEL

The

930

or

8"

size.

930

disk

FLOPPY

board

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is a

DISK

floppy
A

single

CONTROLLER

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drive

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controller

board

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up

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to

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four

used

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of

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cut

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of

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to

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etch

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ocomputer

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s/7.01.83;P age 75

ItO

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all

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drive

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the

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to

the

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5"

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off off
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off

sided,

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on

off

on

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set

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off off
on
off
on
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on

this

configuration.

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on
off

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per inch)

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on
on
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off
off
off off

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set

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ting

SWl-8

off
off

off
off
off

allows 48

on
on
on
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on

on

or

96

IMS

International

5000 Series

Microcomputers/7.01.83/page

76

CONNECTIONS

If

the

930

boardisused

to

the

disk

drives

connector

J1
listed

below.

liD.

inadaisy-chain.

is

daisy-chained

Flat

ribbon

to

control

to

cables are

8

Inch

(50

the

Jl

Pins)

5"

disk

If

drives.

used

Drives

the

to

drives,

system

The

make

the

contains

signals

the

connection.

Inch

5

(34

J2

connector

for

Drive.

J2

Pins)

8"

each

is

drives,

connection

connected

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are

',,---,

2
4
6

8
10
12

14

16
18

20
22
24

26

28

30 select
32

34

36
38

40
42

44

46 read

48

50

low

2

sided
disk
side

head
index

...

-

select
select

select

ift

step
write
writegate
track
write

write

change

1

load

1
2
3
4

data

0

protected

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current

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index
select
select
select
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side

4

1

2

3

on

data

0

data

1

,6JI

odd

pins

ground

5000

Series

ground

IMS

Microcomputers/7.0

International

1.83/page

77

MapEL 930 FLOPPY

Legend

JA

ProcessorjDMA
JB
SWI

J2

Vector

Drive

Interrupt

Identification

Connector

to

PISK

Control.

Level

Floppy

PRIVE

Selection.

S wi

tches.

Disk

COl'ITROLLER BOARD

Drives.

IMS

International

5000

Series

930

Microcomputer

Figure

Floppy

Disk

s/7.0 1.8 3;Pag e 78

Drive

2-28

Controller

Board

J

J

2.9

511"

WINCHESTER

PISK

PRIVE

SUBSYSTEM

GENERAL

The

disk
interface
shown

below:

S100
BUS

The

function
units.
decodes

PESCRIPTION

subsystem

card

+---.1JI

for

CONTROLLER

POWER

of

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The

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each

controller

select

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CARD

1

.,[,

INTER­FACE
CARD

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to

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sector

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DISK

DISK

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UNIT #3

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,

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as

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DISK

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Capacity:

Transfer

Access

unit

Rate:

Time:

isa51A

as

inch

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Ambient

Relative

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+5VDC

10.4

kilobytes

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18

milliseconds
settling
90

milliseconds

215

milliseconds

8.3

milliseconds

Winchester

Temperature

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1.10%,

±.5

%,

0.65A

per

per

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ty

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typical,

typical

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second

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to

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maximum

average

sealed fixed

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track

seek

seek

rotational

to

during

seek

80%

(non-condensing)

motor

(including

latency

disk

drive

start)

with

5000

Series

Microcomputer

IMS

International

s/7.0

1.83;P

age 79

CONNECTIONS

The

connector

all

of

the

interface

on

the

cards.

upper

edge

Each

of

the

interface

821

controller

cardisattached

cardisdaisy-chained

to

a Winchester

drive.

with

CONFIGURING

Address

The
This

The

ECC

Normally,
TESTECC

Selection

upper
connection

lower

Test

pair is

OQtion

the

command

pair

THE

is

is

ADRS

upper

821

WINCHESTER

(Pad

APRS)

connected

etched.

shunted

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o

(Pad ECC)

pair is

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the

RUN

for

shunted.

test

for

8"

drives,

program.

comROLLER

5"

drives,

which

The

lower

setting

sets

palr is

the

BOARD

the

board

board

shunted

address

address

for

to

use

to

A8H,

with

AOH.

the

IMS

International

5000

Interrupt

Installation
V14is

Series

r

o

o

TEST

Level

etched.

Microcomputers/7.01,83/page

Selection

ofashunt

INT

VIl

o

o

1

(pad

selects

VI2

o

o

2

1m)

the

interrupt

VB

80

level for

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VI5

the

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VI6

o

o

Normally,

1

o

3

o

4

o
5

o

6

MODEL 821

STANDARD

Legend

ADRS

ECC RUN

5"

8"

upper

WINCHESTER

CONFIGURATION

etched

shunt

pal[

CONTROLLER

Sets

Sets

Used
Normally

board

board

with

address

address

TESTECC

in

run

BOARP

to

to

command

posi

tion.

AO

A8H

H

in

test

program.

INT

etched

Set

toV14

interrupt.

Model

821

Figure

Winchester

2-29

Controller

5000

Series

Board

IMS

International

Microcomputersj7.01.83/page

81

CONFIGURING

Pri

ve

Select

A

15

shunted

shunt

is

installed

for

THE

(Location

drive

900 WINCHESTER UITERFACE BOARD

TA)

to

#2,

indicate

etc.

the

drive

number.

1isshunted

for

drive

#1,

2

Normally,

Terminating

The

760-5-R220/330

one

for

resistor

pack

there

the

is

JA

Resistor

last

would

only

one

Winchester

4

3 2 1

0 0 0

0

0 0 0

Pack <Location

resistor

drive.

stay

Normally,

in.

pack

drive,

so 1

1

RPZ>

is

removed on every

there

is

only

would

one

be

shunted.

interface

Winchester

card

except

drive

so

the
the

IMS

International

5000

Series

Microcomputer

Figure

Winchester

s/7.0 1.83/Page 82

2-30

Interface

Cud

j

2.10

MODEL 662

The

662

the

keyboard

the

ability

and

an

RS-422

SPECIF ICATIONS

VIDEO

Video

to

and

emulate
port.

DISPLAY

Display

transmits

BOARD

Boardisused

it

to

four

current

the

CRT

in

the

IMS

processor.

terminals.

5000IS.

It

also
It

controls

has an

It

RS-232

receives

the

data

CRT,

serial

from

with
port

Processor:

ROM

Capaci

ROM

Type:

RAM

Capaci

RAM

Type:

Keyboard

M

oni

torInterf

Screen

Power

F orxr.at:

Requirements:

ty:

ty:

Interface:

ace:

8085

microprocessor

8

Kbytes

2732

or

equivalent

8

Kbytes

6116

2K

x 8

Asynchronous,
+5V
Single
keyboard.

TTL

active-low
rate
bandwidth

24
characters

+ 5

+12

-12

mark

level

is

lines

volts

volts

volts

line

19.4KHz
should

(plus
with2descenders

@

@

@

static

TTL

bit,

sync

active

interface

sync

at

be

status

800ma
30ma

ZOma

EP

ROM

RA.\is

level

bit,

high

signals

signals

60Hz

>20MHz.

serial

8

output

with

available.

and

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in

input,

data

for

either

18KHz

by

80

a 9 x 12

50-9600

bits

and 1

controlling

active-high

Horizontal

at

columns,

matrix.

50Hz.

stop

bdl

baud,

bit.

on

or

sweep

Video

7 x 8

Operating

CONFIGURING

RS-232/RS-422

Shunt
is

used

computer.

Environment

JA

indicates

when

Ina500015

JA

1 T

20

3 0

THE

Mode

whether

the

662

RS-23ZC
RS

-422

0-55

662 BOARD

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RS

board

system,

--

shunt

--

shunt

deg.

C.

(TA)

-232or

is

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this

1-2

2-

3

RS

-422

inaterminal

location

5000

always has

Series

protocol

Microcomputers/7.01.83/page

which

the

is

being

is

far

upper

used.

away

pair

IMS

International

from

shunted.

RS

-422
the

83

vertical

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shunt

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pins

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SYNC

on

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plus

JC

1 0

2 0

3 0

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JC

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polari

ty.

<IC)

the

polarity
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of

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SYNC

signal

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to

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are

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shunted,

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2

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ty.

JB

1 0

2 0

3 0

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JD

1
2
3

4
5 0

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to

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on JB

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selects

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0
0

0

2732

ate

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SW-4)

the

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polarity;

00>

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up

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--

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Kbytes).

signal.

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IMS

Inten:ational

5000

The

first

four

the

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SW1

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select

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in

rate

the

used

when

following

manner: J

Series

~

19,200

9,600
4,800
2,400

1,800

1,200

600

300

150

110

1-

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

Microcomputers/7.0

SWITCH

OFF

OFF

OFF

OFF OFF

1.83/page

z...

ON
ON

ON
ON

ON
ON

84

#

L

ON
ON
ON

ON
OFF
OFF
OFF

~

ON
ON
ON
ON
ON
ON
ON

ON
ON
ON

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OFF

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5,6)

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is

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of

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switch

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at

Frequency

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first

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the

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line

on

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of

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is

Characteristics

six

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#2

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OFF

#3

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OFF

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is

the

(SW1-

on

Z)

on,

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8)

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An 8

-

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~'-odem

- 2

then

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depression

60

Hz

-1.2.3.4.5.6)

pack SW2

bit

bit

stop
stop

the

status

switch

machines

word

word

control

control

bit
bits

line

#7

of any key

and

sdect

is

transmitted

is

transmit

will

is

off

the

off,

be

displayed

the

will

causeitto

for

50

Hz

transmission

ted

at

status

machines.

characteristics

power-up

line

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disappear.

as

be

Switch

Switch

Switch

Power-Up

Switches

If

switch

If

switch
power-up.
duplex

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#5

#6

Operating

7 and 8

#7

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OFF

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ty

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always

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characteristics
IMS

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the

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transmission:

indicates

value.

#1

used

mode

IMS

is

ON and

at

at

950

International

This

terminal

on

Microcomputers/7.01.83,IPage

that

the

switch

switch

power-up.
power-up.

for

full

85

at

The

switch

settings

for

SWl

and

SW2

are

summarized

below:

SWl

(switch
lswitch

1 2 3 4

ON

ON

OFF

ON

ON

OFF

OFf

OFF

ONON10FF

OFf

ON

ON

OFF

OFF

OFFIOFF

ON

ON ON

OFF

ON ON

SW2

(switch

(switch

1 2 3 4 5

ON

I

OFF

I

ON

depressed)

OFF

depressed)

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ON

ON

ON

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ON

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OFF

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depressed)

OFF

depressed)

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OFF

I

ON

OFF

L...-

1·4

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OFF

BAUD

19,200

9,600

4.800

2.400
1,800

1.200

600
300

150
110

ON

OFF

5 6 7 8

ON

OFF

ON

OFF

SWITCHES

6 7 8

I

i

ON

OFf

ON

OFf

SWITCHES

ON

Off

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;

1·8

7

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8

BIT

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MODEM

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STOP

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STOP

NO

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ENABLE

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PARITY

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MARK
HIlS

MODEONPOWER
TV950
FUll
HALF

5·8

DESCRIPTION

REVERSE
UNDERLINE

BLINK
SOLID

25TH
NO

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OFF50HZ

DESCRIPTION

WORD
WORD

BIT
BITS

PARITY

PARITY

(STICK

MODEONPOWER
DUPLEX
DUPLEX

BLOCK

CURSOR
CURSOR

LINE

25TH

LINE

CONTROL

PARITY)

.-J

(STATUS)

......J

UP

UP

IMS

International

5000

Series

662

BoardSwitch

Microcomputers/7.01.83/page

Figure

86

2-31

Settings

..2..21

BOARP

CONNECTIONS

Keyboard

Connector
keyboard

Modem

This

Monitor

Connector
interface
following

Connection

connection

Connection

Jl

on

via a

plug

pin

1

p1n

2

pin

3

ptn

4

pin

5

ptn

6

Connector

J3

on

card

(890)

pin

assignments:

the

··

··· ·

·

(2)

is

not

(13)

the

01>

upper

on

the

·

···

used

lower

which

bottom

+12

·

+12

GND

Bell

GND

Keyboard

111

is

edge

volts
volts

output

the

edge

connected

of

the

of

the

serial

50001S.

of

the

662

board

50001S.

data

662

to

the

board

CRT

is

connected

The

signals

is

connected

monitor

to

are

to

board.

the

as

follows:

the

J3 has

detachable

key!:'oarc

tte

Po wer

Connector

J5

on

Supply

the

pln
pin
pm
pin
p1n
pin
pln
pin
pm
pin

power

pin
pin
pm
pln
pin
p1n

1
2

3

4
5
6

7

8

9

10

Connection

J4

on

supply.

1

2

3

4

5

6

the

lower

·

···

····

GND

Vertical
VIDEO

GND

Horizontal
NOT

USED

Keyboard

Keyboard

NOT

USED

GND

(14)

right

The

pin

GND

GND

-12

volts

volts

+12

+5

volts

+5

volts

SYNC

SYNC

serial

bell

edge

assignments

of

data

output

the

662

for

board

J4

are

is

connected

listed

below:

to

connector

5000

Series

IMS

International

Microcomputers/7.01.83jPage

87

TTL

Compatible

Communications

Connector

(5)

Connector

connected
below:

Graphics

Connector
console.

J5

is

located

to

socket

pin

1

pin

2

pin

3

Adapter

J6

The

pin
pin

pin
pin
pin
ptn

pin

ptn
pin
pin

pin

pin

pin

ptn
pin
ptn

Connection

connects

pin

assignments

1

2 GND

3

4

5

··

6

7

·

8 GND

9

·

10

14

·

·

··

···

·

·

11

12

13

15
16

·.

·

·.

·

·

·.

J3

·.

··

.

·

··

in

to

·

·

·

·

·

·

the

center

on

the

971

Receive
GND

Transmit

the

GOSC+

VSYNC+
GND

HSYNC+

GND

HGLT+

EHSYNC­GND
CHDOTS+
GND

DISPG+

GND

KBUZ­KSD+

(]6)

IMS
are

Data

listed

of

processor

Data

graphics

below:

the

lower

board

edge

board.

to

add

of

the

The

graphic

662

pin

assignments

capability

board.

to

It

is

are

the

IMS

5000

Reset

This

used

The

connection

International

Series

Connector

connector.

to

Light

662

Microcomputers!7.01.83/page

reset

pin
ptn

Pen

board

pin
pin
pin

pm

<IV

located

the

662

1
2

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can

is

made.

1

2

3

4

board.

<I8)

be

connected

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near

External

G~'D

pin

assignments

+5

GND

Pen
Light

the

center

It

is

toalight

volts

down

strobe

88

of

normally

Reset

In

(-)

(-)

the

upper

not

used.

pen

via

connector

areasfollows:

edge

of

the

J8.

board,

Normally,

can

be

no

.J

MODEL

Legend

662

VIDEO

DISPLAY

BOARD

1.

Z.

3.

Jl

Keyboard

J2 Modem

J3

Monitor

4. J4 Po\\oer

5.

6. J6

J5

TTLCompatible
Graphics

7. J7 Reset

8. J8

9.

JA

10. JB

11.

12.

13.

JC

Jf)

loptrast

14. SW2

15.

SWI

Ugh

RS-232C;RS-422
Horizontal
Vertical
Character

Termlnal

Termmal

Connector

Connector

t Pen

Control

Connector

Connector

Connector

Adapter

Connect

SYNC

SYNC

Generator

Potentiometer
parameter
parameter

Communications

Connector

or

!v:oae

Polarity

Polarity

Selection

Select10r.

Selection

Sdection

S

....

1

tch

1

switch

2

Connector

Shunt

~hmt

Shunt

Model

662

Figure

Video

2-32

Display

5000

Series

Board

IMS

InternatlOnal

Microcomputers/7.01.83/Page

89

SECTION

3

Disk

INTRODUCTION

This

floppy,

The
Winchester

a

3.0 TEAC

Driyes

section

Winchester,

floppy

stand-alone

The

SI;~"

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density

tracks

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flexible

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(MEM)

the

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The

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double-

has 96

IMS

International

5000

Series

Figure

Microcomputers/7.01.83/page

3-1

TEAC

90

5~"

Floppy

Disk

Drive

)

SPECIFICATIONS

~/

Physical

Dimensions

Width

Height

Depth

Weight

Electrical
+12V
+5V

Specifications

DC

power

DC

power

Environmental
Operating
Storage
Wet

bulb

Operating

Operational

Number of
Track
Head

temperature

temperature

temperature

humidity

tracks/disk

to

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Characteristics

Average acces s

(including
Motor
Disk

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rotational

Instantaneous

Conditions

access

time

time

settling

time

speed

speed

time

time)

variation

5.75"

1.63"

7.99"

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less

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less

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less

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than

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Recording
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acks/disk
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655.36

International

IMS

Microcomputers/7.01.83/page

91

Reliabili

Mean

Mean

Error

S

Hard

Seek

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time

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Rates
oft

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to

repair

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30

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per

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s/7.0

1.83/page

)

92

Shunting

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Terminating

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Microcomputers/?O

For

IMS

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1.83/page

93

Legend

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2.

3.

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IMS

International

5000

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TEAC

Mlcrocomputersj7.01.83/page

Floppy

Figure

Disk

94

3-2

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Board

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ate

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the

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Figure

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3-3

Drive

5000

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Diagram

Microcomputer

IMS

International

s/7.0

1.8

3;P

age

95

3.1

ROPIME

The
fast
microprocessor
202,
and

A

summary

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access

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ranging

RO

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of

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RO

data

in

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based
and

total

the

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204,

data

important

WINCHESTERS

of

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inch

for

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containing

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from6to

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small

are

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2,

parameters

mm)

business

models

3 and 4

24

megabytes.

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the

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is

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disk

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disks

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drives

terminals

RO

20I,RO

respectively

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and

IMS

International

5000

Series

Figure

Microcomputers!7.01.83/page

3-4

Rodime

5~"

96

Winchester

Disk

Drive

.J

SPECIFICATIONS

Mode1s: R0 201,202,20 3,

Number

Number

Unformatted

Formatted

Transfer

Seek

Average

of

Disks

of

Heads

capacity

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Cylinder

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s

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6.67,

5.89,
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512

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320

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18
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ms

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23.59

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Flux

reversals

Tr

acks

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Rotational

Power

Dimensions

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Vibration

requirements

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per

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speed

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3600

rpm

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5-30
500

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typical

Hz

Hz

Hz

Hz

5000

Series

Microcomputer

IMS

s/7.0

International

L83/page

97

Shock

Operating
(wi

Non-operating
(with

and

non-operating

thouttransitlock)

transit

lock)

3g

pk,

less

max 2 per

20g

pk,

max 1 per

second.

less

10

than

than

second

10

20

ms

ms,

Interface

Indicators

ST506

Two

variant

red
electronics
facia when

The

the

condi

to

indicate

drive.

The
d r i v e

provided
on.

The

"Power-On"

closest

that

to

this

condition

met

since

receive an

of

LED's

board
they

are

"Power-On"

drive

tion

is

present.

fault

"Select"

iss

elected

the

the

center

LED will

2.5.1,
the

microprocessor

initial

reset.

SA1000

fixed

are

to

visible

illuminated.

LED

READY

It

conditions

LED

is

"Power-On"

LED

of

the

not

come

5V

risetime,

the

master

through

is

on

with

no

is also used

on

when

by

the

LED

is

positioned

facia.

on

will

when
error

in

h 0 s t

Note

if

is

the

the

the

is

the

not

not

IMS

International

5000

Series

Microcomputers/7.0

1.83/page

\

J

98