ILC1832
µP Supervisory Circuit
Impala Linear Cor poration
Impala Linear Corporation
1
(408) 574-3939
www.impalalinear.com
October 1999
ILC1832 1.1
The ILC1832 is a multifunction circuit which monitors microprocessor activity, external reset and power supplies in
microprocessor based systems. Ths circuit functions
include a watchdog timer, power supply monitor, microprocessor reset, and manual pushbutton reset input.
The power supply line is monitored with a comparator and
an internal voltage reference. RST is forced low when an
out-of-tolerance condition exists and remains asserted for
at least 250ms after V
CC
rises above the threshold voltage
(2.55V or 2.88V). The RST pin will remain logic low with
V
CC
as low as 1.4V.
The Watchdog input (ST) monitors µP activity and will assert
RST if no µP activity has occurred within the watchdog timeout period. The watchdog timeout period is selectable with
nominal periods of 150, 600, or 1200 milliseconds.
• Power OK/Reset Time Delay, 250ms min.
• Watchdog Timer, 150 ms, 600ms, or 1.2s Typical
• Precision Supply Voltage Monitor, Select Between 5%
or 10% of Supply Voltage
• 18µA Supply Current
• Debounced External Reset Input
• 8-Pin SOIC or DIP Package
• Computers
• Controllers
• Critical Microprocessor Power Monitoring
• Intelligent Instruments
• Portable Equipment
ILC1832
V
CC
Top View
PBRST
RST
TD
2
1 8
6
RST
GND
ST
TOL
4
3
5
7
ETC1832N - 8 Lead Plastic DIP Package
ETC1832M - 8 Lead Plastic SOIC Package
ILC1832
µµ
P
V
CC
V
CC
V
CC
ST
RESET
PBRST
RST
TD
GND
TOL
I/O
General Description
Features
Applications
Ordering Information
Typical Circuit
Pin-Package Configurations
Preliminary
Operating Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec . )
Supply Voltage Range, VCC
VCC = 5V (See Note 1)
VCC = 3.3V (See Note 1)
ST and PBRST Input Levels
VIH, VCC > 2.7V
VIH, VCC < 2.7V
VIL
I
SOURCE
= 350µA, VCC = 3.3V
I
SINK
= 10mA, VCC = 3.3V
I
SINK
= 50µA, VCC = 1.4V
VCC 5% Trip Point (Reset Threshold Voltage)
VCC 10% Trip Point (Reset Threshold V ol t age)
Input Capacitance, ST, TOL
Output Capacitance, RST, RS T
PBRST Min. Pulse Width, tPB
TD = 0V
TD = Open
TD = VCC
0 ns
VCC Detect to RST Low and RST High, tRPD
VCC Falling at 1.66 mV/µs
VCC Detect to RST Open and RST Low, tRPU
VCC= 3 to 5.5V, TA= Operating Temperature Range, unless otherwise noted.
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.
Operating ranges define those limits between which the functionality of the device is guaranteed.
Note 1: ICCis measured with PBRST and all outputs open and inputs within 0.5V of supply rails.
Note 2: PBRST has an internal 40kΩ (typical) pull-up resistor to VCC.
Note 3: Guaranteed by design at TA= 25°C.
Note 4: PBRST must be held low for a minimum of 20ms to guarantee a reset.
µP Supervisory Circuit
Preliminary
Impala Linear Corporation
2
(408) 574-3939
www.impalalinear.com
October 1999
ILC1832 1.1
Electrical Characteristics
Absolute Maximum Ratings