IMD SF104x User Manual

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SF3013M Fingerprint Image Sensor Module User Manual Page - 1

SF104x

Fingerprint Image Sensor Module

User Manual

February 7, 2014

Image Match Design Inc.

http://www.imagematch.com.tw/

B3-2, No. 1, Lising 1st Road, Hisnchu Science

Park, Hsinchu 300, Taiwan (R.O.C.)

Te l：[phone]
Fax：[phone]

Service：[e-mail]

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Revision History

Version Date Content Approved Checked Drawn

P01 2014/02/07 Initial draft Albert Ke

P02 2014/3012 I/O spec AL

P03 2014/03/17

Interface and drawing

update

Eros

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Content

1 OVERVIEW .................................................................................................................... 5

1.1 DESCRIPTION ............................................................................................................ 5

1.2 FEATURES ................................................................................................................. 5

1.3 SENSOR BLOCK DIAGRAM .......................................................................................... 6

1.4 APPLICATIONS ........................................................................................................... 6

2 PHYSICAL DIMENSION ................................................................................................ 7

3 DEVICE OPERATION .................................................................................................... 7

3.1 SETTING UP CLOCK DIVIDER ........................................................................................ 7

3.2 CONFIGURING GAIN AND RANGE OF PRE-AMP AND ADC ................................................. 8

3.3 COMMAND AND REGISTERS ......................................................................................... 9

3.4 SPI COMMAND PROTOCOL ........................................................................................ 11

3.5 COMMAND CODE DETAIL ........................................................................................... 13

3.6 REGISTER DETAIL..................................................................................................... 15

4 OPERATION WORKFLOW ......................................................................................... 22

4.1 GENERAL DESCRIPTION ............................................................................................ 22

4.2 RESET .................................................................................................................... 23

4.3 FINGER DETECTION MODE AND INTERRUPT ................................................................. 23

4.4 TIMING CONSIDERATIONS .......................................................................................... 24

4.5 A SAMPLE SESSION .................................................................................................. 25

5 TIMING CHARACTERISTICS ...................................................................................... 28

5.1 SPI INTERFACE TIMING ............................................................................................. 28

6 MAXIMUM RATINGS AND OPERATING CONDITION ............................................... 31

7 ELECTRICAL CHARACTERIST I CS ............................................................................ 32

8 RELIABILITY TEST ..................................................................................................... 32

8.1 ESD IMMUNITY ........................................................................................................ 32

8.2 ENVIRONMENTAL LIMITS ........................................................................................... 33

8.3 MECHANICAL DURABILITY .......................................................................................... 33

9 PACKAGING INFORMATION ..................................................................................... 34

9.1 THE SF104X PACKAGING ......................................................................................... 34

9.2 SIGNAL DEFINITION................................................................................................... 34

9.3 PART DRAWING ........................................................................................................ 35

9.4 PIN CONFIGURATION ................................................................................................ 35

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9.5 REFERENCE SCHEMATIC ........................................................................................... 36

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1 Overview



1.1 Description

The SF104x fingerprint image sensor module is based on capacitive-contact

technology with hardened surface and enhanced ESD resistivity. The build-in analog and

digital circuitry minimizes the number of external component, and provides easy-to-use,

standard SPI interface to microprocessors.

The operation of SF104x is controlled through fingerprint image sensing by pixel array,

A/D converting, digital process, following is simple interface protocol. The captured image

quality of SF104x can be adjusted by setting gain, offset and reference voltage parameters.

In addition, the internal operation parameter and interface speed can also be configured to

the need.

1.2 Features

 Spatial resolution 508 DPI

 2D sensor array of 160x160 pixels

 Active sensing area 8 mm x 8 mm

 Build-in 8-bit ADC for digitizing image

 Build-in programmable voltage reference

 High speed SPI interface

 0.03 sec read out time

 128-byte on-chip data FIFO

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1.3 Sensor Block Diagram

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1.4 Applications

The compact, thin packaging of SF104x sensor module allows a wide range of

applications

 Security devices

 Fingerprint identification systems

 Fingerprint recognition systems

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2 Physical Dimension

The sensor’s active pixel array is 160x160 pixels, and the SF104xM module is a

13.4mm*13.9mm highly integrated SPI fingerprint module.

3 Device operation

3.1 Setting up clock divider

The fingerprint sensor module has an on-board oscillator of 18Mhz, the sensor’s

internal clock logic is summarized as the following figure:

Sensor

& ADC

128-BYTE

FIFO

SPI

interface

Timing

Generator

Registers

Digital control

Register access

Analog control

D0~D7

D0~D7

ADCCLK

MCU

OTP

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In the above diagram, OPCLK is used for internal timing, and PCLK is for image pixels.

The “detect start” signal starts the short “finger detect” cycle in detect mode.

The PCLK is 1/6 of OPCLK. OPCLK is the system clock pre-scaled by 1~16, controlled

by REG0/REG_CLK bit[3:0]. The detect start clock is controlled by REG9/REG_DDIV

bit[7:0].

For example, given the system clock input of 18Mhz, and REG0/REG_CLK bit[3:0]

value is 2 (divide by 3), then OPCLK is 6Mhz and PCLK is 1Mhz.

3.2 Configuring gain and range of pre-amp and ADC

Divide by

div_opclk

Clock from

external

oscillator

Divide

by 6

Divide by

4096

PCLK

OPCLK

Divide by

(DDIV+1)

detect

start

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Two cascaded programmable gain amplifier are used for conditioning the sensor signal

before converted by ADC. Register REG1/REG_PGA bit [1:0] is for the control of PGA1 gain,

and register REG1/REG_PGA bit [7:4] for the control of PGA2 gain.

The ADC bias current and input voltage range is controlled by BIAS, (VRT-VRB) and

VRB parameters in REG3/REG_ADC. See section 5.0 for the detail of the registers.

3.3 Command and registers

The SF104 operation is controlled by sending commands and setting control registers

through the SPI interface. The SF104 SPI interface follows the SPI protocol with CPHA=0

and CPOL=0 as SPI mode 0.

There are 6 command codes to program the chip:

160x160

Pixel

array

Sample

&hold

ADC

MCU

Gain

Gain

VRT

VCM

VRB

PGA1 PGA2

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command code name function read/write

0x01 rdata read pixel data R

0x02 start start scan W

0x03 status read status R

0xC0 srst software reset W

0x20+N rread read register R

0x40+N rwrite write register W

For the rread and rwrite command, the number N is the register address. The effective

N is in the range of 0x00 to 0x11.

The register content is summarized in the following table:

N Address Name Function RW

Default

Value

76543210

0 0x00 reg_clk clock control RW 0

1 0x 01 reg_pag pag control RW 0 en_test1 en_t est0

2 0x 02 reg_dcoc dc offs et RW 0

3 0x 03 reg_adc adc setting RW 0

4 0x 04 reg_otp_addr OTP address RW 0

5 0x 05 reg_otp_wdat OTP wirte dat a RW 0 otp_wd

6 0x 06 reg_otp_m ode OTP cont rol RW 0 otp_prg otp_rst otp_c eb

7 0x 07 reg_otp_rdat OTP read data RW

8 0x 08 reg_deth finger detection threshold RW 0xFF

9 0x 09 reg_ddiv cloc k divider for detect ion RW 0

10 0x0A reg_enab function enable bits RW 0 en_window en_inscan en_det en_sqwv lowcap en_osc en_analog

11 0x0B reg_mode mode cont rol bits RW 0 en_intr

12 0x0C reg_llx windowing function sett ing RW 0

13 0x0D reg_lly windowing function sett ing RW 0

14 0x0E reg_urx windowing funct ion setting RW 0x9F

15 0x0F reg_ury windowing funct ion sett ing RW 0x9F

16 0x10 reg_c hmd c hange mode W (N/A) ch_mode

17 0x11 reg_inscanline in s can detec tion line number RW 0x40

Reserve

Internal test

otp_rdat

test1 tes t0 div_opclk

pga2_gain pga1_gain

dc_offset

adc_bias adc_vrt adc_vrb

otp_yp

otp_ain

ury

in_sc an_line

deth

ddiv

en_bits

llx

lly

urx

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3.4 SPI command protocol

Command and data are exchanged throught the SPI MISO and MOSI wires. Each byte

of data sent through the MOSI port brings back a received byte through the MISO port.

Commands can be cascaded one by another. The term “SPI command sequence” in

the following context is defined as a sequence of command code and data bytes exchange

within one active SPISEL strobe.

An SF104 command code may or may not have associated data. The “start” and “srst”

commands don’t have associated data, and take effect immediately after the command code

is sent.

For read/write data commands, the second byte will be the beginning of data byte or

bytes, as illustrated below:

 read command

 write command

Writing and reading a series of register content may look different. For writing to

consecutive registers, an internal address counter is incremented automatically after each

byte written. This design eliminates the need to repeat sending the 0x40+N command for

each byte. So the sequence of read/write commands may look like the following.