IFET 2N5021, 2N5020 Datasheet

B-18 01/99

2N5020, 2N5021

P-Channel Silicon Junction Field-Effect Transistor

¥ Analog Switches

Absolute maximum ratings at TA= 25¡C

Reverse Gate Source & Reverse Gate Drain Voltage – 50 V
Continuous Forward Gate Current 50 mA
Continuous Device Power Dissipation 500 mW
Power Derating 4 mW/°C
Storage Temperature Range – 65°C to + 200°C

TOÐ18 Package

Dimensions in Inches (mm)

Pin Configuration

1 Source 1, 2 Gate & Case, 3 Drain

Surface Mount

SMP5020, SMP5021

At 25°C free air temperature: 2N5020 2N5021 Process PJ32
Static Electrical Characteristics Min Max Min Max Unit Test Conditions

Gate Source Breakdown Voltage V

(BR)GDO

25 25 V IG= 1µA, VDS= ØV

Gate Reverse Current I

GSS

11nAV

GS

= 15V, VDS= ØV

Gate Source Cutoff Voltage V

GS(OFF)

0.3 1.5 0.5 2.5 V VDS= – 15V, ID= 1 nA

Drain Saturation Current (Pulsed) I

DSS

– 0.3 – 1.2 – 1 – 3.5 mA VDS= – 15V, VGS= ØV

Dynamic Electrical Characteristics

Common Source

g

fs

1 3.5 1.5 6 mS VDS= – 15V, VGS= ØV

Forward Transconductance
Common Source Output Conductance g

os

20 20 µS VDS= – 15V, VGS= ØV

Common Source Input Capacitance C

iss

25 25 pF VDS= – 15V, VGS= ØV f = 1 MHz

Common Source

C

rss

77pFV

DS

= – 15V, VGS= ØV f = 1 MHz

Reverse Transfer Capacitance

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Databook.fxp 1/13/99 2:09 PM Page B-18