Integrated Device Technology Inc IDT7MP4145S20Z, IDT7MP4145S20M, IDT7MP4145S15Z, IDT7MP4145S15M, IDT7MP4045S20Z Datasheet

2703 drw 01

PD

0

31

29

9
11
13
15
17
19
21
23
25

1

3

5

7

27

33

63

61

41
43
45
47
49
51
53
55
57

35
37
39

59

PD

1

– GND
– GND

32

30

28

8
10
12
14
16
18
20
22
24

2
4
6

26

34

64

62

42
44
46
48
50
52
54
56
58

36
38
40

60

GND

CS

3

A

16

I/O

16

I/O

17

I/O

18

I/O

19

A

10

A

11

A

12

A

13

I/O

20

I/O

21

I/O

22

I/O

23

GND

I/O

0

I/O

1

I/O

2

I/O

3

V

CC

A

7

A

8

A

9

I/O

4

I/O

5

I/O

6

WE

I/O

7

CS

1

PD

0

A

14

CS

4

A

17

OE

I/O

24

I/O

25

I/O

26

I/O

27

A

3

A

4

A

5

V

CC

A

6

I/O

28

I/O

29

I/O

30

I/O

31

PD

1

GND

I/O

8

I/O

9

I/O

10

I/O

11

A

0

A

1

A

2

I/O

12

I/O

13

I/O

14

I/O

15

GND

CS

2

A

15

FEATURES:

• High density 1 megabyte static RAM module
(IDT7MP4145 upgradeable to 4 megabyte, IDT7MP4120)

• Low profile 64 pin ZIP (Zig-zag In-line vertical Package)
or 64 pin SIMM (Single In-line Memory Module) for
IDT7MP4045 and 72 pin SIMM (Single In-line Memory
Module) for IDT7MP4145

• Very fast access time: 15ns (max.)

• Surface mounted plastic components on an epoxy
laminate (FR-4) substrate

• Single 5V (±10%) power supply

• Multiple GND pins and decoupling capacitors for maxi­mum noise immunity

• Inputs/outputs directly TTL-compatible

PIN NAMES

I/O0–31 Data Inputs/Outputs
A0–17 Addresses

CS

1–4 Chip Selects

WE

Write Enable

OE

Output Enable
PD0–1 Depth Identification
VCC Power
GND Ground
NC No Connect

2703 tbl 01

Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE SEPTEMBER 1996

1996 Integrated Device Technology, Inc. DSC-2703/7

1

The IDT logo is a registered trademark of Integrated Device Technology Inc.

NOTE:

1. Pins 2 and 3 (PD

0 and PD1) are read by the user to determine the density

of the module. If PD

0 reads GND and PD1 reads GND, then the module

has a 256K depth.

DESCRIPTION:

The IDT7MP4045/4145 is a 256K x 32 static RAM module
constructed on an epoxy laminate (FR-4) substrate using 8
256K x 4 static RAMs in plastic SOJ packages. Availability of
four chip select lines (one for each group of two RAMs)
provides byte access. The IDT7MP4045 is available with
access time as fast as 10ns with minimal power consumption.

The IDT7MP4045 is packaged in a 64 pin FR-4 ZIP (Zig­zag In-line vertical Package)or a 64 pin SIMM (Single In-line
Memory Module) where as the 7MP4145 is packaged in a 72
pin SIMM (Single In-line Memory Module). The 4045 ZIP
configuration allows 64 pins to be placed on a package 3.65
inches long and 0.365 inches wide. The 7MP4045 ZIP is only

0.585 inches high, this low profile package is ideal for systems
with minimum board spacing while the SIMM configuration
allows use of edge mounted sockets to secure the module.

All inputs and outputs of the IDT7MP4045/4145 are TTL­compatible and operate from a single 5V supply. Full asyn­chronous circuitry requires no clocks or refresh for operation
and provides equal access and cycle times for ease of use.

Identification pins are provided for applications in which
different density versions of the module are used. In this way,
the target system can read the respective levels of PD

pins to

determine a 256K depth.

The contact pins are plated with 100 micro-inches of nickel
covered by 30 micro-inches minimum of selective gold.

PIN CONFIGURATION – 7MP4045

(1)

ZIP, SIMM

TOP VIEW

FUNCTIONAL BLOCK DIAGRAM

OE

WE

2703 drw 02

8

18

256K x 32

RAM

8 8 8

2

CS1CS2CS3CS

4

ADDRESS

I/O

0-31

PD

IDT7MP4045
IDT7MP4145

256K x 32
CMOS STATIC RAM MODULE

15.2

IDT7MP4045/7MP4145
256K x 32 CMOS STATIC RAM MODULE COMMERCIAL TEMPERATURE RANGE

15.2 2

RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE

Ambient

Grade Temperature GND VCC

Commercial 0°C to +70°C 0V 5.0V ± 10%

2703 tbl 04

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol Parameter

(1)

Conditions Max. Unit

C

IN(C) Input Capacitance V(IN) = 0V 20 pF

(CS)

C

IN(A) Input Capacitance V(IN) = 0V 70 pF

(Address & Control)

C

I/O I/O Capacitance V(OUT) = 0V 12 pF

NOTE: 2703 tbl 02

1. This parameter is guaranteed by design but not tested.

RECOMMENDED DC OPERATING
CONDITIONS

Symbol Parameter Min. Typ. Max. Unit

VCC Supply Voltage 4.5 5.0 5.5 V
GND Supply Voltage 0 0 0 V
VIH Input High Voltage 2.2 — 6.0 V
V

IL Input Low Voltage –0.5

(1)

— 0.8 V

NOTE: 2703 tbl 03

1. VIL (min) = –1.5V for pulse width less than 10ns.

TRUTH TABLE

Mode

CSCSOEOEWE

WE

Output Power

Standby H X X High-Z Standby
Read L L H DATAOUT Active
Write L X L DATAIN Active
Read L H H High-Z Active

2703 tbl 05

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Rating Value Unit

V

TERM Terminal Voltage with –0.5 to +7.0 V

Respect to GND
TA Operating Temperature 0 to +70 °C
TBIAS Temperature Under Bias –10 to +85 °C
TSTG Storage Temperature –55 to +125 °C
I

OUT DC Output Current 50 mA

NOTE: 2703 tbl 06

1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.

PIN CONFIGURATION – 7MP4145

(1)

SIMM

TOP VIEW

NOTE:

1. Pins 3,4,6,and 7 (PD

0-3) are read by the user to determine the density of

the module. If PD

0, PD1 read GND and PD2, PD3 read OPEN, then the

module has a 256K depth.

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35

37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36

38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

NC
PD

2

GND
PD

1

I/O8
I/O9
I/O10
I/O11
A0
A1
A2
I/O12
I/O13
I/O14
I/O15
GND
A

15

CS

2

CS

4

A17

OE

I/O

24

I/O25
I/O26
I/O27
A3
A4
A5
VCC
A6
I/O28
I/O29
I/O30
I/O31
NC
NC

NC

PD

3

PD0

I/O0
I/O1
I/O2
I/O3
VCC

A7
A8

A9
I/O4
I/O5
I/O6
I/O7

WE

A

14

CS

1

CS

3

A16
GND
I/O

16

I/O17
I/O18
I/O19

A10

A11

A12

A13
I/O20
I/O21
I/O22
I/O23
GND

NC
NC

PD

0 - GND

PD

1 - GND

PD

2 - OPEN

PD

3 - OPEN

2703 drw 15

15.2 3

IDT7MP4045/7MP4145
256K x 32 CMOS STATIC RAM MODULE COMMERCIAL TEMPERATURE RANGE

Figure 1. Output Load

*Includes scope and jig.

Figure 2. Output Load

(for t

OLZ,tOHZ, tCHZ, tCLZ, tWHZ, tOW)

+5 V

480 Ω

30 pF*

DATA

OUT

255Ω

2703 drw 03

+5 V

480

Ω

5 pF*

DATA

OUT

255

Ω

2703 drw 04

AC TEST CONDITIONS

Input Pulse Levels GND to 3.0V
Input Rise/Fall Times 5ns
Input Timing Reference Levels 1.5V
Output Reference Levels 1.5V
Output Load See Figures 1-4

2703 tbl 09

Symbol Parameter Test Conditions Max. Unit

I

CC Dynamic Operating f = fMAX;

CS

= VIL 1360 mA

Current VCC = Max.; Output Open

I

SB Standby Supply

CS

≥ VIH, VCC = Max. 480 mA

Current Outputs Open, f = fMAX

ISB1 Full Standby

CS

≥ VCC – 0.2V; f = 0 120 mA

Supply Current V

IN > VCC – 0.2V or < 0.2V

2703 tbl

2703 tbl 07

DC ELECTRICAL CHARACTERISTICS

(VCC = 5.0V ±10%, TA = 0°C to +70°C)

Symbol Parameter Test Conditions Min. Max. Unit

|I

LI| Input Leakage VCC = Max.; VIN = GND to VCC —80µA

(Address and Control)
|ILI| Input Leakage (Data) VCC = Max.; VIN = GND to VCC —10µA
|ILO| Output Leakage VCC = Max.; CS = VIH, VOUT = GND to VCC —10µA
VOL Output LOW VCC = Min., IOL = 8mA — 0.4 V
V

OH Output HIGH VCC = Min., IOH = –4mA 2.4 — V